Patents Assigned to Advanced Semiconductor Engineering
  • Publication number: 20240203897
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate having a first surface, an electrical contact disposed over a first region of the substrate, and an EMI shielding layer disposed over the substrate. The EMI shielding layer includes a non-uniform thickness and an elevation of the EMI shielding layer is higher than an elevation of the electrical contact with respect to the first surface of the substrate. A method for manufacturing a semiconductor device package is also disclosed.
    Type: Application
    Filed: December 15, 2022
    Publication date: June 20, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Zheng Wei WU, Cheng Kai CHANG
  • Publication number: 20240203896
    Abstract: The present disclosure provides a semiconductor device package including a carrier, an electronic component, and a shielding layer. The carrier includes a predetermined non-shielding region. The electronic component is disposed over the predetermined non-shielding region. The shielding layer includes a first portion disposed over the predetermined non-shielding region.
    Type: Application
    Filed: December 15, 2022
    Publication date: June 20, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Zheng Wei WU, Cheng Kai CHANG
  • Publication number: 20240194609
    Abstract: An electronic device is disclosed. The electronic device includes a first component, a second component, and a first bridge component configured to electrically connect the first component with the second component. The first component is configured to transmit a first signal downwardly without passing the first bridge component and the second component is configured to transmit/receive a second signal to/from outside of the electronic device. A transmission speed of the second signal is higher than a transmission speed of the first signal.
    Type: Application
    Filed: December 7, 2022
    Publication date: June 13, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Han-Chee YEN, Ying-Nan LIU, Min-Yao CHENG, Eelco BERGMAN
  • Publication number: 20240194493
    Abstract: A substrate includes a dielectric structure, a conductive layer, a first hole and a second hole. The conductive layer is stacked on the dielectric structure. The first hole extends from a top surface of the conductive layer and exposes the dielectric structure. The second hole is spaced apart from the first hole, extends from the top surface of the conductive layer and exposes the dielectric structure. A first depth of the first hole is substantially equal to a second depth of the second hole. An elevation of a topmost end of the first hole is different from an elevation of a topmost end of the second hole.
    Type: Application
    Filed: December 8, 2022
    Publication date: June 13, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Hung YEH, Bing-Xiu LU, Yu Lin LU, Tai-Yuan HUANG
  • Publication number: 20240194620
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes an antenna layer, a first circuit layer and a second circuit layer. The antenna layer has a first coefficient of thermal expansion (CTE). The first circuit layer is disposed over the antenna layer. The first circuit layer has a second CTE. The second circuit layer is disposed over the antenna layer. The second circuit layer has a third CTE. A difference between the first CTE and the second CTE is less than a difference between the first CTE and the third CTE.
    Type: Application
    Filed: February 20, 2024
    Publication date: June 13, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen Hung HUANG
  • Publication number: 20240186226
    Abstract: A semiconductor device package includes a substrate, a first insulation layer and an electrical contact. The first insulation layer is disposed on the first surface of the substrate. The electrical contact is disposed on the substrate and has a first portion surrounded by the first insulation layer and a second portion exposed from the first insulation layer, and a neck portion between the first portion and the second portion of the electrical contact. Further, the second portion tapers from the neck portion.
    Type: Application
    Filed: February 12, 2024
    Publication date: June 6, 2024
    Applicant: Advanced Semiconductor Engineering Korea, Inc.
    Inventors: Soonheung BAE, Hyunjoung KIM
  • Publication number: 20240186223
    Abstract: A semiconductor device package includes a substrate and a conductive lid. The conductive lid is disposed within the substrate. The conductive lid defines a waveguide having a cavity. The waveguide is configured to transmit a signal from a first electronic component to a second electronic component through the cavity.
    Type: Application
    Filed: February 13, 2024
    Publication date: June 6, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Shih-Wen LU
  • Publication number: 20240186193
    Abstract: A semiconductor package structure and a method for manufacturing the same are provided. The method includes: providing a package body includes a first semiconductor device, wherein the first semiconductor device includes a plurality of first electrical contacts disposed adjacent to an active surface of the first semiconductor device; measuring the actual positions of the first electrical contacts of the first semiconductor device; providing a plurality of second electrical contacts outside the first semiconductor device; and forming an interconnection structure based on the actual positions of the first electrical contacts of the first semiconductor device and the positions of the second electrical contacts satisfying a predetermined electrical performance criterion by a mask-less process, so as to connect the first electrical contacts and the second electrical contacts and maintain signal integrity during transmission.
    Type: Application
    Filed: February 12, 2024
    Publication date: June 6, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chen-Chao WANG, Chih-Yi HUANG, Keng-Tuan CHANG
  • Publication number: 20240186201
    Abstract: A semiconductor device package includes a first substrate, a second substrate, and a first electronic component between the first substrate and the second substrate. The first electronic component has a first surface facing the first substrate and a second surface facing the second substrate. The semiconductor device package also includes a first electrical contact disposed on the first surface of the first electronic component and electrically connecting the first surface of the first electronic component with the first substrate. The semiconductor device package also includes a second electrical contact disposed on the second surface of the first electronic component and electrically connecting the second surface of the first electronic component with the second substrate. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Application
    Filed: February 13, 2024
    Publication date: June 6, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Han WANG, Ian HU
  • Publication number: 20240180487
    Abstract: The present disclosure provides an electronic device. The electronic device includes a carrier having a component side and a sensing side opposite to the component side. The sensing side has a thinned portion. The electronic device also includes a first sensing element disposed over the sensing side and a second sensing element disposed over the sensing side. The first sensing element and the second sensing element are arranged along a primary direction of the electronic device. The thinned portion is between the first sensing element and the second sensing element and is configured to provide adjustment to a relative position between the first sensing element and the second sensing element.
    Type: Application
    Filed: December 1, 2022
    Publication date: June 6, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Chun-Kai CHANG
  • Publication number: 20240175745
    Abstract: An optical system and a method of manufacturing an optical system are provided. The optical system includes a carrier, a light emitter, a light receiver, a block structure and an encapsulant. The light emitter is disposed on the carrier. The light receiver is disposed on the carrier and physically spaced apart from the light emitter. The light receiver has a light detecting area. The block structure is disposed on the carrier. The encapsulant is disposed on the carrier and covers the light emitter, the light receiver and the block structure. The encapsulant has a recess over the block structure.
    Type: Application
    Filed: February 6, 2024
    Publication date: May 30, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsin-Ying HO, Ying-Chung CHEN
  • Publication number: 20240178158
    Abstract: A package structure and a manufacturing method are provided. The package structure includes a wiring structure, a first electronic device, a second electronic device, a first underfill, a second underfill and a stiff bonding material. The first electronic device and the second electronic device are disposed on the wiring structure, and are electrically connected to each other through the wiring structure. The first underfill is disposed in a first space between the first electronic device and the wiring structure. The second underfill is disposed in a second space between the second electronic device and the wiring structure. The stiff bonding material is disposed in a central gap between the first electronic device and the second electronic device. The stiff bonding material is different from the first underfill and the second underfill.
    Type: Application
    Filed: February 6, 2024
    Publication date: May 30, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Po-Hsien KE, Teck-Chong LEE, Chih-Pin HUNG
  • Publication number: 20240170302
    Abstract: A method and a system for manufacturing a semiconductor package structure are provided. The method includes: (a) measuring an amount of a molding powder; (b) controlling the amount of a molding powder; and (c) dispensing the molding powder on an assembly structure including a carrier and at least one semiconductor device disposed on the carrier.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Chenghan SHE
  • Publication number: 20240170603
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate having a first surface and a second surface opposite to the first surface, an optical device disposed on the first surface of the substrate, and an electronic device disposed on the second surface of the substrate. A power of the electronic device is greater than a power of the optical device. A vertical projection of the optical device on the first surface is spaced apart from a vertical projection of the electronic device on the second surface by a distance greater than zero.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Mei-Yi WU, Chang Chin TSAI, Bo-Yu HUANG, Ying-Chung CHEN
  • Publication number: 20240168238
    Abstract: A recessed portion in a semiconductor substrate and a method of forming the same are provided. The method comprises: forming a mask on the semiconductor substrate; forming a protection layer on a top surface of the mask and on at least one sidewall of the mask, and on at least one surface of the semiconductor substrate exposed by the mask; performing a first etching process to remove the protection layer on the top surface of the mask and on a bottom surface of the semiconductor substrate exposed by the mask; and performing a second etching process to remove the remaining protection layer and to etch the semiconductor substrate to form the recessed portion. In this way, a recessed portion with relatively smooth and vertical sidewalls can be realized.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shao Hsuan CHUANG, Huang-Hsien CHANG
  • Publication number: 20240170364
    Abstract: A semiconductor device package and a method of manufacturing a semiconductor device package are provided. The semiconductor device package includes at least one electronic component, a heat source, and a heat dissipation element. The heat source is adjacent to the electronic component. The heat dissipation element is disposed adjacent to the heat source and the electronic component. The heat dissipation element includes a heat transmitting structure configured to reduce heat, which is from the heat source, through the heat dissipation element, and transmitting in a direction toward the electronic component.
    Type: Application
    Filed: November 23, 2022
    Publication date: May 23, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hung-Hsien HUANG, Wen Chun WU, Chih-Pin HUNG
  • Publication number: 20240170345
    Abstract: A method of manufacturing a circuit pattern structure, a measurement method, and a circuit pattern structure are provided. The method of manufacturing the circuit pattern structure includes: forming a dielectric layer; forming at least one first pad at least partially in the dielectric layer; forming a second pad adjacent to the at least one first pad and having a height greater than that of the at least one first pad.
    Type: Application
    Filed: November 17, 2022
    Publication date: May 23, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Kai LIN, Chih-Cheng LEE
  • Publication number: 20240170437
    Abstract: A package structure is disclosed. The package structure includes a first substrate, a second substrate, a gap, and a directing structure. The second substrate is disposed under the first substrate. The gap is between the first substrate and the second substrate. The gap includes a first region and a second region. The first region is configured to accommodate a filling material. The directing structure is disposed in a flow path of the filling material and configured to reduce a migration of the filling material from the first region to the second region.
    Type: Application
    Filed: November 23, 2022
    Publication date: May 23, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun Fu KUO, Shang Min CHUANG, Ching Hung CHUANG, Hsu Feng TSENG, Jia Zhen WANG
  • Publication number: 20240170829
    Abstract: The present disclosure provides an electronic package. The electronic package includes an antenna structure having a first antenna and a second antenna at least partially covered by the first antenna. The electronic package also includes a directing element covering the antenna structure. The directing element has a first portion configured to direct a first electromagnetic wave having a first frequency to transmit via the first antenna and a second portion configured to direct a second electromagnetic wave having a second frequency different from the first frequency to transmit via the second antenna. A method of manufacturing an electronic package is also provided.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jenchun CHEN, Ya-Wen LIAO
  • Publication number: 20240170396
    Abstract: A package structure is provided. The package structure includes an encapsulant and an interposer. The encapsulant has a top surface and a bottom surface opposite to the top surface. The interposer is encapsulated by the encapsulant. The interposer includes a main body, an interconnector, and a stop layer. The main body has a first surface and a second surface opposite to the first surface. The interconnector is disposed on the first surface and exposed from the top surface of the encapsulant. The stop layer is on the second surface, wherein a bottom surface of the stop layer is lower than the second surface.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yung-Shun CHANG, Sheng-Wen YANG, Teck-Chong LEE, Yen-Liang HUANG