Patents Assigned to Agere Systems
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Patent number: 7685640Abstract: A virus detection mechanism is described in which virus detection is provided by a network integrated protection (NIP) adapter. The NIP adapter checks incoming media data prior to it being activated by a computing device. The NIP adapter operates independently of a host processor to receive information packets from a network. This attribute of independence allows NIP anti-virus (AV) techniques to be “always on” scanning incoming messages and data transfers. By being independent of but closely coupled to the host processor, complex detection techniques, such as using check summing or pattern matching, can be efficiently implemented on the NIP adapter without involving central processor resources and time consuming mass storage accesses. The NIP adapter may be further enhanced with a unique fading memory (FM) facility to allow for a flexible and economical implementation of polymorphic virus detection.Type: GrantFiled: September 21, 2004Date of Patent: March 23, 2010Assignee: Agere Systems Inc.Inventors: Kameran Azadet, Anil Mudichintala, Fadi Saibi
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Patent number: 7684771Abstract: In the method and apparatus of controlling power of a transmitted communication signal, a communication signal is amplified and transmitted. At least one parameter on the transmitted signal is received, and a measure of interference with the transmitted signal is determined based on the received parameter. An average power level of the communication signal is increased by clipping the communication signal prior to amplification by an amount based on the determined measure.Type: GrantFiled: November 16, 2006Date of Patent: March 23, 2010Assignee: Agere Systems Inc.Inventors: John L. Blair, Ming-Ju Ho, Dukhyun Kim, Michael S. Rawles
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Patent number: 7685493Abstract: A method and system for improving buffer compression in automatic retransmission request (ARQ) systems includes both a compander and decompander for further processing data. A received data string k bits in length is first companded according to a predetermined companding scheme. The companded data string is reduced to a length of k?1 bits for more efficient storage. Upon receipt of a request for retransmission, the stored companded data string is loaded and decompanded back to a length of k bits. Once decompanded, the data string is combined with a retransmitted data string to produce a single data string with an increased likelihood of being correct. By companding the data string before storage, a smaller memory block can be used for the storage of the data string.Type: GrantFiled: September 29, 2006Date of Patent: March 23, 2010Assignee: Agere Systems Inc.Inventors: Benjamin John Widdup, Koen van den Beld
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Patent number: 7685454Abstract: A signal buffering and retiming (SBR) circuit for a plurality of memory devices. A PLL-based clock generator generates a set of phase-shifted clock signals from a received host clock signal. Each of a plurality of phase selectors independently selects a subset of contiguous clock signals from the set of phase-shifted clock signals. Each subset of contiguous clock signals is applied to a different set of one or more verniers, each vernier independently selecting one of the contiguous clock signals as its retiming clock signal for use in generating either (1) an output clock signal or a retimed bit of address or control data for one or more of the memory devices or (2) a feedback clock signal for the PLL-based clock generator. The SBR circuit can be designed to satisfy relatively stringent signal timing requirements related to skew and delay.Type: GrantFiled: November 20, 2006Date of Patent: March 23, 2010Assignee: Agere Systems Inc.Inventors: William P. Cornelius, Tony S. El-Kik, Stephen A. Masnica, Parag Parikh, Anthony W. Seaman
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Patent number: 7679405Abstract: Various embodiments of the present invention provide systems and circuits for processing information through comparison of input signals. For example, various embodiments of the present invention provide differential latch circuits. Such differential latch circuits include an input stage and a latch stage. The input stage provides an interim output that is available during a defined period, and the latch stage is operable to latch the temporary interim output during the defined period using a common clock.Type: GrantFiled: October 24, 2007Date of Patent: March 16, 2010Assignee: Agere Systems Inc.Inventor: William B. Wilson
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Patent number: 7680124Abstract: A network processor or other processing device of a communication system includes scheduling circuitry configured to schedule data blocks for transmission from a plurality of users or other transmission elements in timeslots of a frame. The scheduling circuitry utilizes a weight table and a mapping table. The weight table comprises a plurality of entries, with each of the entries identifying a particular one of the transmission elements. The mapping table comprises at least one entry specifying a mapping between a particular timeslot of the frame and an entry of the weight table. The scheduling circuitry determines a particular transmission element to be scheduled in a given timeslot by accessing a corresponding mapping table entry and utilizing a resultant value to access the weight table.Type: GrantFiled: July 30, 2004Date of Patent: March 16, 2010Assignee: Agere Systems Inc.Inventors: Jinhui Li, Ali A. Poursepanj, Mark Benjamin Simkins
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Patent number: 7678639Abstract: An inductor formed within an integrated circuit and a method for forming the inductor. The inductor comprises an underlying layer of aluminum formed in a first metallization layer and patterned and etched into the desired shape. In one embodiment the aluminum line comprises a spiral shape. According to a damascene process, a conductive runner, preferably of copper, is formed in a dielectric layer overlying the aluminum line and in electrical contact therewith. The aluminum line and the conductive runner cooperate to form the inductor. In another embodiment the aluminum line and the conductive runner are formed in a vertically spaced-apart orientation, with tungsten plugs or conductive vias formed to provide electrical connection therebetween. A method for forming the inductor comprises forming an aluminum conductive line and forming a conductive runner over the conductive line.Type: GrantFiled: December 22, 2008Date of Patent: March 16, 2010Assignee: Agere Systems Inc.Inventors: Edward Belden Harris, Sailesh Mansinh Merchant, Kurt George Steiner, Susan Clay Vitkavage
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Patent number: 7681051Abstract: A method of transitioning a port in a communication system from an active state to a standby state includes the steps of transmitting a signal to transition the port to the standby state, and, upon transmission of the signal to transition the port to the standby state, transitioning the port from the active state into the standby state without entering a suspended state. The port may be a physical layer interface port and the communication system may be an IEEE 1394-compliant communication system.Type: GrantFiled: August 30, 2006Date of Patent: March 16, 2010Assignee: Agere Systems Inc.Inventors: Jinsong Liu, Qiangao Xu, Haifeng Zhou, Wen Zhu
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Patent number: 7679853Abstract: In one embodiment, irregular electronic disturbance signals in a partial-response read channel are detected by a disturbance detector using state metrics generated by maximum-likelihood sequence detector. For example, a thermal asperity (TA) detector detects the occurrence of TAs in the read channel of perpendicularly recorded magnetic media by using the state metrics generated by a Viterbi detector. Changes in state metrics (e.g., magnitudes of the branch metrics of the trellis diagram) used by the Viterbi detector are tracked. If the magnitude of the rise of the path metric increases above a set threshold, then a TA is detected. Alternatively, or additionally, the rate of change of the magnitude of the path metrics is tracked. If the rate of change within a set time window is above a specified threshold, then a TA is detected.Type: GrantFiled: December 28, 2005Date of Patent: March 16, 2010Assignee: Agere Systems Inc.Inventors: Hongwei Song, Weijun Tan
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Patent number: 7675913Abstract: A packet, cell or other data segment received in a physical layer device from a link layer device via an interface bus is processed to determine a port address for the data segment in the physical layer device. The port address, which may be an MPHY address, is determined using a combination of a first address value obtained from a link layer address portion of the data segment and a second address value obtained from a payload portion of the data segment. The data segment is stored in a memory location identified by the port address. The memory location may comprise a particular queue of the physical layer device.Type: GrantFiled: August 24, 2006Date of Patent: March 9, 2010Assignee: Agere Systems Inc.Inventors: Algernon P. Henry, Shaun P. Whalen, Harold J. Wilson
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Patent number: 7676001Abstract: A method for detecting a symbol encoded in one or more received signals, wherein the detected symbol corresponds to a combination of values of n components, n>1, comprises (a) for each of a plurality of different combinations of values of the n components, generating a set of two or more sub-metric values based on the one or more received signals. Each sub-metric is a function of one or more of the n components, and at least one sub-metric is a function of fewer than all n components. The method further comprise (b) detecting the symbol based on the sets of sub-metric values. In another embodiment, an apparatus for detecting a symbol encoded in one or more received signals, wherein the detected symbol corresponds to a combination of values of n components, n>1, comprises (a) means for generating a set of two or more sub-metric values based on the one or more received signals for each of a plurality of different combinations of values of the n components.Type: GrantFiled: March 16, 2005Date of Patent: March 9, 2010Assignee: Agere Systems Inc.Inventors: Nils Graef, Joachim S. Hammerschmidt
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Patent number: 7676201Abstract: The sideband used by a low-intermediate-frequency transmitter for transmitting signals on a channel is selectable. In some embodiments of the invention, the sideband used for transmitting signals is selected based on the location of the channel within a band of channels. In such embodiments, the lower sideband may be selected for transmitting signals if the channel is the lowest-frequency channel in the band, and the upper sideband may be selected for transmitting signals if the channel is the highest-frequency channel in the band. Such sideband selection results in image power falling within the band, which can be helpful in complying with out-of-band power limitations.Type: GrantFiled: November 8, 2004Date of Patent: March 9, 2010Assignee: Agere Systems Inc.Inventors: Roman Z. Arkiszewski, Edward E. Campbell, Gil Ra'anan
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Patent number: 7675955Abstract: A laser assembly comprises a substrate and two or more lasers. The substrate has a substantially planar surface region and a raised feature. The raised feature comprises two or more reflective surfaces. Each of the two or more lasers is mounted to the substantially planar surface region and is configured to emit a laser beam directed towards the raised feature at a nonzero tilt angle in relation to the substantially planar surface region.Type: GrantFiled: July 17, 2006Date of Patent: March 9, 2010Assignee: Agere Systems Inc.Inventor: Joseph Michael Freund
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Patent number: 7675179Abstract: The present invention provides an interconnect that can be employed in an integrated circuit. The interconnect includes a metal line located over a substrate, a dielectric layer located over the metal line, and an interconnect located in the dielectric layer, including a landed portion located over the metal line and an unlanded portion located along at least a portion of a lateral edge of the metal line. The unlanded portion is at least partially filled with a polymer, and the landed portion is substantially filled with a conductive material. A method for manufacturing the interconnect is also provided.Type: GrantFiled: April 20, 2007Date of Patent: March 9, 2010Assignee: Agere Systems Inc.Inventors: Ranbir Singh, Sen Sidhartha, Nace Rossi
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Patent number: 7675967Abstract: A data communication transceiver, such as a PCM or xDSL modem, is operable in a training-while-working mode in which it both trains and communicates user data. In some embodiments, upon initiation of a data communication session, the transceiver operates in a startup training mode in which partial training occurs that is sufficient to enable low rate data communication; the transceiver then enters the training-while-working mode in which it communicates user data and completes training. When training is completed, the transceiver enters a data mode in which it communicates user data but does not train. In some embodiments, if in the data mode conditions arise requiring retraining or making retraining desirable, the transceiver enters the training-while-working mode and retrains while continuing to communicate user data.Type: GrantFiled: December 4, 2006Date of Patent: March 9, 2010Assignee: Agere Systems Inc.Inventor: Zhenyu Wang
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Patent number: 7675168Abstract: An integrated circuit comprises an integrated circuit package and one or more circuit elements disposed within the integrated circuit package. The integrated circuit also comprises at least two differential wire bond pairs providing connections for at least one of the one or more circuit elements. Proximate differential wire bond pairs of the at least two differential wire bond pairs have substantially different wire bond profiles.Type: GrantFiled: February 25, 2005Date of Patent: March 9, 2010Assignee: Agere Systems Inc.Inventors: Gavin Appel, Ashley Rebelo, Christopher J. Wittensoldner
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Patent number: 7673224Abstract: An apparatus and method of reducing power dissipation in a register exchange implementation of a Viterbi decoder used in a digital receiver or mass-storage system without degrading the bit error rate of the decoder, by selectively inhibiting data samples in the Viterbi decoder's register memory from being shifted if the data samples have converged to a single value. FIFO memories keep track of what data samples have converged, the order of the samples, and the converged data value, thereby keeping the decoded data in the FIFO synchronized with data continuing to be shifted through the register memory.Type: GrantFiled: September 12, 2006Date of Patent: March 2, 2010Assignee: Agere Systems Inc.Inventor: Tuhin Subhra Chakraborty
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Patent number: 7672391Abstract: In a multiple-input, multiple-output (MIMO) system, a receiver is implemented with at least one additional receive path beyond the number of transmit antennas used to transmit the signals (e.g., wireless OFDM signals) received at the receiver. In one embodiment, the additional receive path is used to reduced co-channel interference (CCI) in the recovered OFDM signals. In particular, each receive path applies recursive filtering to generate separate subcarrier signals. A processor converts the separate subcarrier signals from the different receive paths into a first set of subcarrier signals corresponding to each transmitted OFDM signal, where each first set of subcarrier signals has desired signal and possibly CCI. The processor also generates a second set of subcarrier signals corresponding to the CCI. The processor subtracts portions of the second set of subcarrier signals from each first set of subcarrier signals to generate recovered OFDM signals having reduced CCI.Type: GrantFiled: October 14, 2008Date of Patent: March 2, 2010Assignee: Agere Systems Inc.Inventors: Adriaan Kamerman, Isabella Modonesi, Tim Schenk, Xiao-Jiao Tao, Allert van Zelst
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Patent number: 7671436Abstract: Assemblies involving integrated circuit dies (e.g. packaged integrated circuits) and packaged dies electrically connected to circuit boards at times mechanically fail at conducting pads used for electrical interconnection. Such failure is mitigated by underlying appropriate pads with a compliant region having specific characteristics.Type: GrantFiled: May 2, 2008Date of Patent: March 2, 2010Assignee: Agere Systems Inc.Inventors: Ahmed Nur Amin, Mark Adam Bachman, David Lee Crouthamel, John William Osenbach, Brian Thomas Vaccaro
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Patent number: 7670203Abstract: A method of making a microelectromechanical microwave vacuum tube device is disclosed. The device is formed by defining structural regions and sacrificial regions in a substrate. The structural regions have flexural members. The substrate is treated to remove the sacrificial regions and release the structural regions such that the structural regions are moveable by the flexural members. The structural regions include a device cathode, a device grid or both a device cathode and a device grid. The cathode comprises electron emitters. The device further includes an output structure where amplified microwave power is removed from the device. In the method, the cathode surface and the grid surface are moved to a position where they are substantially parallel to each other and substantially perpendicular to the substrate. The device further comprises an anode that is substantially parallel to the cathode surface and the grid surface.Type: GrantFiled: January 3, 2007Date of Patent: March 2, 2010Assignee: Agere Systems Inc.Inventors: Peter Ledel Gammel, Richard Edwin Howard, Omar Daniel Lopez, Wei Zhu