Abstract: A bootstrapped switch circuit can include a switch transistor, having a drain configured as an input terminal to receive an input signal, and a voltage-controlled voltage source, configured to provide predetermined constant voltages between a gate and a source of the switch transistor in response to a control signal received at a control terminal. The predetermined constant voltages can include a first predetermined constant voltage to turn on the switch transistor and pass the input signal to the source and a second predetermined constant voltage to turn off the switch transistor. The first and second predetermined constant voltages can be independent of the magnitude of a signal passed to the source of the switch transistor based on the input signal at the drain.

Abstract: A device for amplifying signals over a wide frequency range features stacked amplifying modules connected between a DC voltage source and an electrical ground. The stacking configuration reuses the DC current produced the voltage source, and thus reduces the amount of operational DC current permitting the use of lower voltage, higher frequency devices to be used. The amplifying modules are fed signals which are different versions of an input signal, and the output signals are AC coupled using capacitors to balance out gain imbalances and asymmetries between the amplifying modules.

Abstract: A method of forming an inertial sensor provides 1) a device wafer with a two-dimensional array of inertial sensors and 2) a second wafer, and deposits an alloy of aluminum/germanium onto one or both of the wafers. The alloy is deposited and patterned to form a plurality of closed loops. The method then aligns the device wafer and the second wafer, and then positions the alloy between the wafers. Next, the method melts the alloy, and then solidifies the alloy to form a plurality of conductive hermetic seal rings about the plurality of the inertial sensors. The seal rings bond the device wafer to the second wafer. Finally, the method dices the wafers to form a plurality of individual, hermetically sealed inertial sensors.

Abstract: An analog to digital converter, comprising a first converter adapted to perform a first, more significant, part of a conversion as a successive approximation conversion, a pipeline conversion or a flash conversion to generate a first conversion result and a residue. The ADC also comprising a second converter adapted to perform a second, least significant, part of the conversion as a sigma-delta conversion by sampling the residue to generate a second conversion result, and a processor adapted to combine the first conversion result and the second conversion result to generate a final conversion result.

Abstract: An embodiment of a voltage-measuring circuit includes: a first resistor connected to a first measurement node; a second resistor connected to the first resistor and a second measurement node; a configuration switch configured to, in response to a control signal, selectively interconnect the first and second resistors, during enable and disable phases of the control signal respectively, into and out of either a parallel or a series configuration; and a control and measurement circuit configured to provide the control signal, receive a first measurement voltage from the first and second measurement nodes during the enable phase, and receive a second measurement voltage from the first and second measurement nodes during the disable phase.

Abstract: A microphone system has a package with an interior, a MEMS microphone within the package interior and forming a backvolume between it and the package interior, and a MEMS valve coupled with at least one input aperture in the package. The package defines at least one input aperture (e.g., the prior noted aperture) for receiving an acoustic signal, and the MEMS microphone is mechanically coupled to at least a portion of one input aperture. The valve has a valve opening generally circumscribed by a valve seat. The valve is considered as having an open mode for permitting acoustic signal access into the package interior through the valve opening, and a closed mode for substantially preventing acoustic signal access into the package interior through the valve opening. The valve has a movable member configured to contact the valve seat when in the closed mode. This movable member is configured to move between the open mode and the closed mode in a direction that is generally perpendicular to the valve seat.

Abstract: A low-temperature inorganic dielectric ALD film (e.g., Al2O3 and TiO2) is deposited on a packaged or unpackaged chip device so as to coat the device including any exposed electrical contacts. Such a low-temperature ALD film generally can be deposited without damaging the packaged chip device. The ALD film is typically deposited at a sufficient thickness to provide desired qualities (e.g., hermeticity for the entire packaged chip device, passivation for the electrical contacts, biocompatibility, etc.) but still allow for electrical connections to be made to the electrical contacts (e.g., by soldering or otherwise) directly through the ALD film without having to expose the electrical contacts.

Abstract: An electronics package includes a wafer die substrate containing electronic circuits and having a top surface and a bottom surface. A top protective layer is substantially thinner than the substrate and covers the top surface. A bottom protective layer is substantially thinner than the substrate and covers the bottom surface. Circuit contacts are distributed about the bottom protective layer for electrically coupling the substrate electronic circuits to external electronic circuits.

Abstract: A sealed capacitive sensor includes a substrate having a diaphragm forming a first plate of a capacitor; a second fixed plate of the capacitor spaced from the diaphragm and defining a predetermined dielectric gap and a sealing medium connecting together the substrate and fixed plate in an integrated structure and hermetically sealing the gap.

Abstract: Methods and apparatus are provided for performing a jump operation in a pipelined digital processor. The method includes writing target addresses of jump instructions to be executed to a memory table, detecting a first jump instruction being executed by the processor, the first jump instruction referencing a pointer to a first target address in the memory table, the processor executing the first jump instruction by jumping to the first target address and modifying the pointer to point to a second target address in the memory table, the second target address corresponding to a second jump instruction. The execution of the first jump instruction may include prefetching at least one future target address from the memory table and writing the future target address in a local memory. The second target address may be accessed in the local memory in response to detection of the second jump instruction.

Abstract: A bipolar transistor comprising an emitter region, a base region and a collector region, and a guard region spaced from and surrounding the base. The guard region can be formed in the same steps that form the base, and can serve to spread out the depletion layer in operation.

Abstract: An apparatus including an electrostatic discharge (ESD) protection device comprising a semiconductor having first, second and third regions arranged to form a transistor, wherein the first region is doped with a first impurity of a first conductivity type and is separated from the second region which is doped with a second impurity of a second conductivity type opposite the first type, and wherein a dimensional constraint of the regions defines an operational threshold of the ESD protection device. In one example, the separation between a collector and an emitter of a bipolar transistor defines a trigger voltage to cause the electrostatic discharge protection device to become conducting. In another example, a width of a bipolar transistor base controls a holding voltage of the electrostatic discharge protection device.

Abstract: A field effect transistor having a drain, a gate and a source, where the drain and source are formed by semiconductor regions of a first type, and in which a further doped region is provided intermediate the gate and the drain. Field gradients around the drain are thereby reduced.

Abstract: A bipolar transistor, comprising a collector, a base and an emitter, in which the collector comprises a relatively heavily doped region, and a relatively lightly doped region adjacent the base, and in which the relatively heavily doped region is substantially omitted from an intrinsic region of the transistor.

Abstract: An N-bit DAC (1) comprises a main DAC circuit (5) having a main impedance string (8) of series connected main resistors, which define main nodes on which analogue voltages are produced of progressively increasing values in steps of the value of one MSB value, and a sub-DAC circuit (6) having a secondary impedance string (19) of series connected secondary resistors, which define secondary nodes on which analogue voltages are produced of progressively increasing values in steps of the value of one LSB. A main switch network (12) is provided for coupling the secondary impedance string (19) to a selected pair of main nodes of the main impedance string (8) for moving the secondary impedance string (19) upwardly and downwardly along the main impedance string (8) as the MSB value of the digital input signal varies.

Abstract: A microphone includes a diaphragm assembly supported by a substrate. The diaphragm assembly includes at least one carrier, a diaphragm, and at least one spring coupling the diaphragm to the at least one carrier such that the diaphragm is spaced from the at least one carrier. An insulator (or separate insulators) between the substrate and the at least one carrier electrically isolates the diaphragm and the substrate.

Abstract: A junction field effect transistor having a drain and a source, each defined by regions of a first type of semiconductor interconnected by a channel, and in which a dopant profile at a side of the drain facing the channel is modified so as to provide a region of reduced doping compared to a body region of the drain. The region of reduced doping and the body region can be defined by the same mask and doping step, but the mask is shaped to provide a lesser amount and thus less depth of doping for the region of reduced doping.

Abstract: An analog to digital converter comprising an Nth analog to digital converter and an N+1th analog to digital converter arranged in series such that a residue signal from the Nth analog to digital converter is provided as an input to the N+1th analog to digital converter, characterized in that a bandwidth control means is provided in a signal path for the residue signal and the bandwidth control means is controlled so as to have a first bandwidth during a first period following generation of a conversion result from the Nth analog to digital converter, and a second bandwidth less than the first bandwidth in a second period following the first period.

Abstract: An equalization scheme for a transmission line employs a Taylor series expansion which enables the provided equalization to be adjusted based on line length. Multiple circuit blocks compute respective terms of the Taylor series, which are then summed to provide a compensating frequency response. For example, for a conductor having a frequency response given by H(f)=e?kl(1+j)?{square root over (f)}, where k is a constant dependent on the physical parameters of the conductor, l is the length of the conductor and f is the frequency of the signal propagated via the conductor, the present scheme provides an inverse frequency response H?1 (f) given by H?1 (f)= 1 + kl ? f 1 ! + k 2 ? l 2 ? f 2 ! + k 3 ? l 3 ? f 2 3 ! + … . The kl terms serve as weighting factors which vary with the length of the conductor.

Abstract: An amplifier includes an amplifier section having selectable signal paths to provide discrete gain settings, and logic to incrementally select the signal paths. The logic may be configured to increment the gain in response to digital gain control signals or an analog gain control signal. Another amplifier has an input section with one or more input cells and an output section with one or more output cells. Either the input section or the output section includes at least two cells that may be selected to provide discrete gain settings. A loop amplifier is configured in a feedback arrangement with the input section. The input and output sections may have multiple selectable cells to provide coarse and fine gain steps. The gain of the loop amplifier may be coordinated with the gain of the input section to provide constant bandwidth operation.