Abstract: A system and method for testing capacitance of a load circuit connected to an output pin of a driving circuit In one embodiment, the method may comprise driving a voltage at the output pin to a first voltage; a predetermined current to the output pin; comparing the voltage at the output pin to a reference voltage; and when the voltage at the output pin matches the reference voltage, generating an estimate of capacitance present at the output pin based on a number of clock cycles occurring between an onset of a timed voltage change period and a time at which the voltage at the output pin matches the reference voltage.
Abstract: Embodiments of the present invention provide improved accuracy of displacement control by using a multi-segment transformation of an actuator's non-linear response. The present invention may set intermediate points to effectively divide the actuator response into multiple segments. Each segment may be assigned a transform function that represents the actuator's response in that particular segment. The present invention may operate in two modes, a calibration mode and a normal operations mode. During calibration mode, the intermediate points and the segment transforms may be set. During normal operations mode, a drive signal may be generated according to the calibrated set values.
Type:
Application
Filed:
December 22, 2009
Publication date:
March 3, 2011
Applicant:
ANALOG DEVICES, INC.
Inventors:
Christian JIMENEZ, Eoin ENGLISH, Jose IBANEZ-CLIMENT, Javier CALPE-MARAVILLA
Abstract: An auto-nulled bandgap reference system employing a substrate bandgap reference circuit with primary and auxiliary amplifiers and a switching circuit which in a first mode develops a voltage to null the offset and noise errors of the auxiliary amplifier and then in the second mode uses the nulled auxiliary amplifier to develop a voltage to null the offset and noise errors of the primary amplifier; and a strobe circuit including an output storage device and a strobe control circuit for periodically powering up a bandgap reference circuit to charge the output storage device and powering down the bandgap reference circuit to conserve power.
Abstract: An improved radiation sensor device includes a cap attached to an integrated circuit chip which has a radiation sensor on a surface with a cap spaced from and covering the radiation sensor; the cap and integrated circuit chip with radiation sensor are encapsulated in an encapsulant with a transparent portion of at least one of the cap and integrated circuit chip proximate the radiation sensor being exposed at the boundary of the encapsulant.
Abstract: An analog-to-digital conversion system includes an analog-to-digital converter (ADC), a plurality of receivers, each for capturing input analog signals, a multiplexer having inputs coupled to each of the receivers and an output coupled to the ADC, the multiplexer establishing a signal path between a selected one of the inputs and the output in response to an index signal, and a mux controller to supply a random sequence of index signals to the multiplexer.
Abstract: An integrator is described that may include a level-shifting capacitor, a feedback capacitor, a pre-amplifier stage and a multi-path amplifier module. The integrator may have inputs for connected an input signal source to the level-shifting capacitor. The level-shifting capacitor is connected to an input of a pre-amplifier stage of an integration signal path and to the input. The level-shifting capacitor may level shift the voltage at the input of the circuit to a lower voltage at the input of the pre-amplifier stage. Thereby, the supply voltage to the pre-amplifier stage may be reduced as well as have limited power consumption, limited temperature rise, and reduced noise that may be attributed to any thermal effects.
Abstract: Error sources relating to the drive signal applied to the resonator of an inertial sensor, such as in-phase offset errors relating to the drive signal and/or electronic pass-through of the drive signal to accelerometer sense electronics, are detected by modulating the drive signal and sensing accelerometer signals that are induced by the modulated drive signal. Error sources related to aerodynamics of an inertial sensor resonator are detected by modulating the distance between the resonator and the underlying substrate and sensing accelerometer signals that are induced by such modulation. Compensating signals may be provided to substantially cancel errors caused by such error sources.
Abstract: A circuit die to circuit die interface system includes a first circuit die with a first circuit having a first default signal, at least a second circuit die with a second circuit having a second default signal; and a logic circuit disposed on one of the first and second circuit dies and enabled by a default signal from all but one of the circuits to transmit a communication signal from the remaining circuit.
Abstract: A Galois field divider engine and method inputs a 1 and a first Galois field element to a Galois field reciprocal generator to obtain an output, multiplies in the Galois field reciprocal generator the first Galois field element by the output of the Galois field reciprocal generator for predicting the modulo remainder of the square of the polynomial product of an irreducible polynomial m?2 times to obtain the reciprocal of the first Galois field element, and multiplies the reciprocal element by a second Galois field element for predicting the quotient of the two Galois field elements in m cycles; in a broader sense the invention includes a compound Galois field engine for performing a succession of Galois field linear transforms on a succession of polynomial inputs to obtain an ultimate output where each input except the first is the output of the previous Galois field linear transform.
Abstract: A multi-branch frequency translation system converts a plurality of independent input clocks to a common frequency. One of the converted clock signals is selected as a dominant clock. The remaining converted clock signals are edge-synchronized with the dominant clock. When the system selects another converted clock signal for use as the dominant clock, the newly selected signal already is edge-synchronized with the dominant clock and, therefore, switchover losses can be avoided. The dominant clock can be subject of further frequency translation processes and output from the system.
Abstract: Voltage converter are provided for efficient generation of voltage signals in a load. The converters are formed with a group of inductors and at least two sets of buck and sync transistors that are arranged with the group so that conducted currents through each of the sets are directed through a respective one of the inductors and further directed to magnetically couple induced currents in the respective inductor of at least an associated one of the sets. Efficiency is particularly enhanced with an operational mode that is directed to light load conditions. In this mode and in at least a selected one of the sets, the buck transistor is turned off throughout the operational mode and the sync transistor is turned off for at least the time that an associated buck transistor is turned on in an associated set which couples induced currents in the respective inductor of the selected set.
Abstract: The invention is a novel scheme of calibrating a voltage-mode digital to analog converter using a current-mode digital to analog converter. A DAC system is comprised of a voltage-mode DAC with an R-2R architecture structure and includes a ROM lookup table where calibration codes associated with each of a plurality of input codes are stored. A reference current is scaled with the calibration codes to output a calibration current that induces adjustments in an output voltage to counteract non-linearities that may be induced by resistor mismatch.
Abstract: Disclosed embodiments are directed to an electrical overstress protection circuit. The electrical overstress protection circuit may include an intermediate node receiving a reference voltage, a first pair of clamp devices, having opposite polarity, clamping an input signal line to the intermediate node, and a second pair of clamp devices, each clamping the intermediate node to one of two reference potentials. The electrical overstress protection circuit may also include a filter connected to the intermediate node to reduce noise at the intermediate node.
Type:
Application
Filed:
December 24, 2009
Publication date:
February 17, 2011
Applicant:
ANALOG DEVICES, INC.
Inventors:
Michael COLN, Gary CARREAU, Yoshinori KUSUDA
Abstract: Operational amplifier embodiments are provided to enhance amplifier parameters such as bandwidth, stability, and headroom. In an amplifier embodiment, transistor followers are arranged with first and second differential pairs to facilitate selective positioning of first and second transfer function poles to enhance bandwidth and resistors and inductors are arranged to facilitate selective positioning of complex third transfer function poles to enhance phase margin. In another amplifier embodiment, the transistor followers are arranged to reduce headroom limitations to thereby enhance the voltage swing of output signals.
Type:
Grant
Filed:
September 30, 2009
Date of Patent:
February 15, 2011
Assignee:
Analog Devices, Inc.
Inventors:
Franklin Marshall Murden, II, Scott Gregory Bardsley, Michael Elliott
Abstract: A microprocessor programmable clock calibration device compares, in response to a calibration command from a programmable processor, turns on a normally off reference oscillator clock, compares the frequency of the reference oscillator clock with the frequency of a calibratable oscillator clock, turns off the reference oscillator clock and adjusts, in response to a difference in those frequencies, the frequency of the calibratable oscillator clock towards that of the reference oscillator clock.
Type:
Grant
Filed:
June 15, 2006
Date of Patent:
February 15, 2011
Assignee:
Analog Devices, Inc.
Inventors:
Shaun Bradley, Kieran Heffernan, Tomas Tansley, Yang Ling
Abstract: A sampling-rate conversion method receives N input channels which have been digitized at an input sampling rate, and converts the sampling rate of each input channel to produce N output channels at an output sampling rate. The method comprises computing a common FIR interpolating function which depends upon the input and output sample clocks and the instantaneous output time, and applying the common FIR interpolating function to all N input channels to compute all N output channels.
Abstract: An identification system and method for recognizing a device as one of a plurality of different types of devices connected to at least one terminal of an information handling system includes supplying a test signal to a device in a test mode; measuring an electrical characteristic of the device in response to the test signal being applied to the device in the test mode; and matching a representation of the electrical characteristic of the device with representations of the electrical characteristics of the plurality of devices for recognizing the device connected to the terminal as one of the plurality of different devices.
Type:
Grant
Filed:
June 19, 2003
Date of Patent:
February 15, 2011
Assignee:
Analog Devices, Inc.
Inventors:
Stuart Patterson, Frederick Loeb, John Howley, Ludgero Leonardo
Abstract: Inertial sensors with reduced sensitivity to quadrature errors and micromachining inaccuracies include a gyroscope incorporating two specially-configured single-axis gyroscopes for sensing rotations about two orthogonal axes (the axes of sensitivity) in the device plane, where each single-axis gyroscope includes a resonator having two rotationally-dithered shuttles interconnected by a fork and each shuttle is configured to tilt out-of-plane along a tilt axis perpendicular to the axis of sensitivity and includes corresponding Coriolis sensing electrodes positioned along an axis perpendicular to the tilt axis (i.e., parallel to the axis of sensitivity). The two single-axis gyroscopes may be interconnected, e.g., by one or more in-phase or anti-phase couplings interconnecting the forks and/or the shuttles.
Abstract: A clock system includes a digital phase/frequency detector (DPFD), a buffer, a digitally-controlled oscillator (DCO) including a sigma-delta modulator (SDM), an adder, a first frequency divider. The DPFD may have a first input for a reference input clock and a second input for a feedback signal, and outputting a difference signal representing a phase and/or frequency difference between the reference input clock and the feedback signal. The buffer may be coupled to the DPFD for accumulating the difference signal over time. The sigma-delta modulator (SDM) may have a control input coupled to the buffer. The adder may have inputs coupled to the (SDM) and a source of an integer control word.
Abstract: A microphone includes a diaphragm assembly supported by a substrate. The diaphragm assembly includes at least one carrier, a diaphragm, and at least one spring coupling the diaphragm to the at least one carrier such that the diaphragm is spaced from the at least one carrier. An insulator (or separate insulators) between the substrate and the at least one carrier electrically isolates the diaphragm and the substrate.