Abstract: An offset calibration system includes an analog to digital converter having a first full-scale range with a first offset compensation circuit; a digital to analog converter having a second full-scale range with a second offset compensation circuit; the digital to analog converter having its output connected to the input of the analog to digital converter during calibration of the digital to analog converter; and a range adjustment circuit for accumulating a predetermined number of analog to digital output values and dividing the accumulated values by a preselected power of 2 in the ratio of the voltage corresponding to the analog to digital converter least significant bit to the voltage corresponding to the digital to analog converter least significant bit.

Abstract: An optical switch uses a fixed mirror cover to reflect optical signals to and from fiber collimators and movable mirrors that are formed on a common substrate.

Abstract: Described is an apparatus and a method for pulling an integrated circuit I/O pad to a known state and providing a current path between the pad and a source of potential during periods when an I/O voltage is likely to be floating. At least one I/O transistor coupled between the I/O pad and a source of potential is provided. Also provided is a combinatorial circuit connected to the I/O transistor to turn on the I/O transistor during periods that the I/O voltage is likely to be floating.

Abstract: A die has a part that is sealed with a cap. The seal can be hermetic or non-hermetic. If hermetic, a layer of glass or metal is formed in the surface of the die, and the cap has a layer of glass or metal at a peripheral area so that, when heated, the layers form a hermetic seal. A non-hermetic seal can be formed by bonding a cap with a patterned adhesive. The cap, which can be silicon or can be a metal paddle, is electrically coupled to a fixed voltage to shield the part of the die.

Abstract: Feedback methods and systems are provided to achieve rapid switching of oscillator frequencies without compromising operational feedback loop bandwidths that filter out spurious tones and phase noise to thereby enhance loop spectral and noise performance. The methods respond to frequency changes in a reference signal by providing an open-loop drive current to drive a feedback signal towards the reference signal. The drive current is terminated and the feedback control loop closed when the feedback signal is within a predetermined acquisition range of the reference signal. Preferably, the closed loop is initially configured with a first feedback bandwidth and is subsequently reconfigured with a second steady-state feedback bandwidth that is less than the first feedback bandwidth.

Abstract: A micromachined magnetometer is built from a rotatable micromachined structure on which is deposited a ferromagnetic material magnetized along an axis parallel to the substrate. A structure rotatable about the Z-axis can be used to detect external magnetic fields along the X-axis or the Y-axis, depending on the orientation of the magnetic moment of the ferromagnetic material. A structure rotatable about the X-axis or the Y-axis can be used to detect external magnetic fields along the Z-axis. By combining two or three of these structures, a dual-axis or three-axis magnetometer is obtained.

Abstract: An apparatus for conditioning an output waveform delivered from a testing device produces an output voltage that is the sum of a control voltage and an input voltage. To that end, the apparatus includes an input for receiving the input voltage, and an output capable of producing the output voltage. The output is coupled with the testing device. The apparatus further includes a voltage element coupled between the input and the output, and a switching element to alternatively charge and discharge the voltage element. The switching element controls the voltage element to change the control voltage between a first voltage and a second voltage. Consequently, the output voltage is the sum of the control voltage and the input voltage.

Abstract: A method for selectively and sequentially converting digital video data signals in three formats, namely, standard definition, progressive scan and high definition formats to analogue form such that the same analogue reconstruction filter can be used for filtering the analogue forms of the signals after conversion. The digital signals prior to being converted are over-sampled at respective over-sampling frequencies for displacing image frequencies to frequencies sufficiently spaced apart from the widest band width signal so that the analogue reconstruction filter can be provided for filtering the widest band width signal as well as the other band width signals and also can be provided with a relatively low roll-off rate of attenuation.

Abstract: In order to generate a carrier frequency Fc, a digital modulator must operate (to satisfy the Nyquist criteria) at a system sample rate Rs which is at least twice the carrier frequency Fc. However, digital modulator structures are provided herein that facilitate the use of M quadrature modulators which modulate, at a reduced modulation rate Rs/M, respective ones of M polyphase cosine elements and M polyphase sine elements with respective ones of interpolated I elements and interpolated Q elements to thereby form M polyphase modulated elements. The modulated elements are then sequentially selected in a multiplexer to form a modulated digital signal. The reduced modulation rate simplifies modulator design and lowers fabrication costs.

Abstract: The present invention is connected across a sense resistor which carries a current of interest. A first pair of cross-coupled switches are connected between the sense resistor and respective input capacitors, and a second pair of cross-coupled switches are connected between the input capacitors and the inputs of an amplifier having differential inputs and outputs. Feedback capacitors are connected between each of the amplifier's outputs and inputs. A control circuit operates the cross-coupled switches in accordance with a switching cycle, during which the connections between the sense resistor and the input capacitors are interchanged, after which the connections between the input capacitors and the differential amplifier are interchanged. When so arranged, the sensed voltage is sampled on the input capacitors and transferred to the feedback capacitors to produce a differential output voltage Vout from the differential amplifier which is proportional to the current of interest.

Abstract: A CPU includes a number of functional units that cooperate together to execute instructions. On-chip memory is divided into several sections, each of which is connected to an associated internal bus. All of the functional units are connected to each of the internal busses so that each of the functional units can read from and write to all memory locations. To conduct a transaction with memory, a functional unit determines which memory location it requires, and then arbitrates for mastership of the bus associated with the section of memory containing that memory location. By providing two or more internal busses, two or more bus transactions can occur simultaneously. A virtual bus is provided to facilitate transactions between functional units. The virtual bus is a bus arbiter without an associated physical bus.

Abstract: A static Random Access Memory (RAM) has a sense enable circuit. A user-determinable number of timing cells produces a timing bit line output in response to a wordline enable input. A sense timing control circuit is triggered by the timing bit line output. The sense timing control circuit produces a sense enable signal for enabling a sensing amplifier to read the logic state of memory cells in communication with the sensing amplifier. A user can change the number of timing cells to optimize operation.

Abstract: Methods and apparatus are provided for processing N equally-weighted digital signals, where N is an arbitrary integer not necessarily an integer power of 2. The methods and apparatus are particularly useful in noise-shaping, mixed-signal converters. The apparatus includes a rotator for rotating the N equally-weighted digital signals in a sequence of rotator states in respective clock cycles to provide N rotated digital signals, and a data-directed scrambler having N inputs and N outputs for data-directed scrambling of the rotated digital signals to distribute the N equally-weighted digital signals to each of the N outputs of the scrambler such that the usage of the N outputs is dynamically balanced over a relatively small number of clock cycles, leading to a shaped noise spectrum.

Abstract: An auto-ranging current integration circuit includes an operational amplifier which receives an input current to be integrated, and an array of integration capacitors which are switchably connected in parallel between the op amp's output and inverting input. A control circuit initially connects a first capacitor across the op amp, and then connects additional capacitors in parallel with the first whenever the op amp's output exceeds a predetermined voltage, but before the output becomes saturated. In this way, a smaller integration capacitance is automatically employed for a small input current, and larger capacitance values are automatically switched in for larger input currents, which lowers the integration gain, prevents the output from saturating, and keeps the current integration circuit's signal-to-noise ratio high.

Abstract: A micromachined variable capacitor structure is used as a modulation mechanism for a differential parametric amplifier. The capacitance of the capacitor structure is modulated by a control signal while a differential signal is applied to the capacitor structure. Modulation of the capacitance produces a signal representative of the input differential voltage. This signal is provided to an amplifier. Once the signal is amplified, a demodulator demodulates the amplified signal to provide an amplified version of the differential signal. The variable capacitor structure also allows for internal feedback, which permits the parametric amplifier to be used as a galvanically isolated differential measurement amplifier. A number of techniques are used to remove common mode and other errors from the modulated difference signal, thereby eliminating them from the amplified output.

Abstract: An apparatus having a core processor and a plurality of cache memory banks is disclosed. The cache memory banks are connected to the core processor in such a way as to provide substantially simultaneous data accesses for said core processor.

Abstract: A data transmitter is having a source of data. The data is transmitted in response to clock pulses provided by a clock pulse generator. A buffer having a fixed data storage capacity is provided for storing the data transmitted by the source of data, such data being stored in response to the clock pulses. A framer is provided for retrieving the stored data in response to a data strobe signal produced by the framer and fed to the buffer. The buffer produces a control signal representative of the level of the buffer. A level signal is fed to the clock pulse generator. A superframe strobe signal samples the level of the buffer and produces a level signal representative of the sampled level of the buffer. A clock pulse generator is provided for producing the clock pulses for the data source and the buffer at a rate selected in accordance with the level of the buffer.

Abstract: An ESD protection circuit utilizes a trigger network to allow the user to select the breakdown voltage of an avalanche transistor. By implementing the trigger network as a string of diodes coupled between the collector and base of the avalanche transistor, the trigger voltage can be programmed between BVCEO and BVCBO by adjusting the number of diodes. When the voltage across the trigger network reaches a predetermined value at which the diodes are conducting under forward biased conditions, but the transistor is below BVCBO, base charge supplied to the transistor caused the transistor to avalanche. A base-emitter resistor prevents false triggering by removing leakage charge from the base of the transistor, and another resistor coupled in series with the base of the transistor limits the removal of charge, thereby causing the avalanche to be self-sustaining once initiated by the trigger network.

Abstract: A clock selection circuit for selecting one of a plurality of clocks as an output clock. When the selection circuit switches between two of the plurality of clocks for output, the currently output clock is removed from the output. The removal of the currently output clock is performed synchronously to the currently selected clock. The newly selected clock is then coupled to the output. Coupling of the newly selected clock is performed synchronously to the newly selected clock.

Abstract: An interpolator utilizes two ranks of transistors to generate a plurality of interpolator currents within the confines of a low power supply voltage. The first rank of transistors are underdriven, thereby generating a plurality of partially switched currents having shallow Gaussian-shaped functions. The partially switched currents are then spatially amplified by the second rank of transistors to reduce the overlap of the currents from adjacent transistors. The first rank of transistors are driven ratiometrically by the difference of two control currents, thereby eliminating errors caused by inaccurate resistors and current sources. A biasing op-amp senses the interpolator currents and servos the first rank of transistors, thereby regulating the interpolator currents to a value determined by a reference voltage which is temperature compensated. Thus, the biasing op-amp automatically compensates for temperature variations and manufacturing uncertainties in devices throughout the entire interpolator.