Abstract: An improved ?? analog to digital converter system with automatic gain control response to out-of-band interferers including a ?? multibit analog to digital converter responsive to an analog input for providing a digital output including the in-band signal and out-of-band interferers and quantization noise and a signal peak estimator circuit responsive to the out-of-band interferers for generating a gain control signal for adjusting the gain of a variable gain element which may be an independent element such as a variable gain amplifier or it may be the analog to digital converter itself by virtue of its having an adjustable full-scale.
Abstract: The analog-to-digital for converter (ADC) for converting an analog value into a digital equivalent using a parallel digital data path is disclosed. In one example embodiment, the ADC includes a switched capacitor DAC having an input to receive an analog value via analog sample and hold circuit. A comparator is coupled to the switched capacitor DAC. A successive approximation register (SAR) is coupled to the comparator. A plurality of logic blocks is coupled to the SAR. A plurality of thermometric encoders is coupled to the associated plurality of logic blocks. A plurality of MUXs is coupled to the associated plurality of thermometric encoders and the comparator, wherein the plurality of MUXs having associated outputs that is coupled to the input of the switched capacitor DAC.
Type:
Grant
Filed:
May 31, 2007
Date of Patent:
October 21, 2008
Assignee:
Analog Devices, Inc.
Inventors:
Srikanth Nittala, Jeremy Gorbold, Mahesh Madhavan
Abstract: A memory write timing system includes a modified memory bitcell including a storage device and a write/read circuit for writing/reading data to/from the storage device; and an output circuit for detecting the current state of the storage device.
Abstract: A repatterned integrated circuit chip package which balances and/or reduces the package capacitance associated with the gain resistor terminals to reduce the degradation of common mode rejection with frequency.
Abstract: The invention provides a thermal sensor having a first and second temperature sensing elements each being formed on a thermally isolated table in a first substrate.
Type:
Grant
Filed:
October 20, 2006
Date of Patent:
October 14, 2008
Assignee:
Analog Devices, Inc.
Inventors:
William A. Lane, Colin Gerard Lyden, Eamon Hynes, Edward John Coyne
Abstract: A state machine circuit may be used to control a multiplexing circuit that selects and provides respective ones of multiple input clock signals to a clock-synthesizing circuit that generates a synthesized clock signal in response to such input clock signals. The state machine circuit may, for example, be configured so that the synthesized clock signal is a spread-spectrum clock signal and/or a clock signal having a nominal frequency that is greater than a nominal frequency of each of the input clock signals.
Type:
Grant
Filed:
April 14, 2006
Date of Patent:
October 14, 2008
Assignee:
Analog Devices, Inc.
Inventors:
Steven Decker, Jianrong Chen, David P. Foley, Mark T. Sayuk
Abstract: Apparatus and method for performing a high-speed, low-power bit-wise comparison of two digital words. For each bit, a bit comparator is shown, employing a compare node and a discharge node. After both nodes are charged, the discharge node is discharged and the condition of the compare node signals the result of the comparison. For each bit, a bit comparator is provided including a single transistor switch across the compare node and the discharge node. An exclusive-OR circuit connected to receive the corresponding bits of the words drives and selectively actuates the switch when the values of the corresponding bits are mismatched. Words may be segmented such that comparisons may be done segment-wise and the detection of a mismatch in any segment obviates the discharging of the compare node in segments containing more significant bits, to save power.
Abstract: A circuit for synthesising a negative resistance, comprising first and second active devices, the first device having a control terminal connected to a first node, and the second device having a current flow terminal connected to the first node, and the first and second devices interacting with each other such that the circuit synthesises a negative resistance.
Abstract: A tuner having one or more digitally controllable tuning components may be coupled to an analog feedback compensation network in a target switching power supply controller to adjust the compensation while the power supply is operating. A communication interface couples the tuner to a host having a software interface to enable a user to adjust the values of the tuning components. The tuner may include components to adjust the values of a feedback network, an input network, a ramp adjust component, etc., on the target controller.
Type:
Application
Filed:
April 16, 2007
Publication date:
October 9, 2008
Applicant:
ANALOG DEVICES, INC.
Inventors:
Paul A. Perrault, Tod F. Schiff, David I. Hunter
Abstract: A Successive Approximation Routine converter is provided in which a comparator is responsive to an output of a first Digital to Analog Converter, and an output of a second Digital to Analog Converter and to a DAC common mode output reference voltage, and wherein the comparator provides data to a SAR controller indicating which one of the DAC outputs is greater than the other, and how a common mode voltage on the DAC outputs compares to the reference voltage. On this basis the SAR controller can add or subtract a common mode offset to the trial words being presented at a given bit trial such that both differential and common mode convergence is achieved.
Type:
Grant
Filed:
December 4, 2006
Date of Patent:
October 7, 2008
Assignee:
Analog Devices, Inc.
Inventors:
Michael Mueck, Michael Christian Wohnsen Coln
Abstract: An amplifier system includes an instrumentation amplifier arrangement being designed to amplify the difference between two voltage inputs with a defined gain, and to produce a single-ended output referenced to a known reference point. A front end circuit is coupled to the instrumentation amplifier. The front end circuit is configured to include a current clamp to actively limit the current in a gain resistor of the instrumentation amplifier to prevent input currents flowing when the instrumentation amplifier is over-driven.
Abstract: Aluminum or aluminum alloy on each of a pair of semiconductor wafers is thermocompression bonded. Aluminum-based seal rings or electrical interconnects between layers may be thus formed. On a MEMS device, the aluminum-based seal ring surrounds an area occupied by a movably attached microelectromechanical structure. According to a manufacturing method, wafers have an aluminum or aluminum alloy deposited thereon are etched to form an array of aluminum-based rings. The wafers are placed so as to bring the arrays of aluminum-based rings into alignment. Heat and compression bonds the rings. The wafers are singulated to separate out the individual semiconductor devices each with a bonded aluminum-based ring.
Abstract: A battery monitoring system is provided to monitor a battery stack having multiple cells connected in series. The monitoring system includes monitor modules to monitor respective subsets of the cells of the battery stack, each monitor module, in response to one or more control signals, measuring cell voltages of the respective subset of cells and providing at least one readout signal that represents the sampled cell voltages, the monitor modules being electrically connected in a stack such that each monitor module is referenced to the voltage of the respective subset of cells, and the control signals and the readout signal are connected through the monitor modules of the stack, and a system control unit to provide the control signals to the monitor modules and to receive the readout signals from the monitor modules.
Type:
Application
Filed:
February 29, 2008
Publication date:
October 2, 2008
Applicant:
Analog Devices, Inc.
Inventors:
Tom Lloyd Botker, Lawrence Craig Streit
Abstract: Converter systems are provided that use particular combinations of fixed and variable clock skewers to generate interleaved clock signals for the systems. These combinations have been found effective in accurately generating selectively-skewed clocks while simultaneously restricting the jitter that generally accompanies the skewing process.
Abstract: Circuits and methods for reducing distortion in an amplified signal are disclosed. The circuits and methods may use multiple single-ended gain stages to produce multiple amplified signals. The amplified signals may be processed in combination to produce a resulting output signal having little, or no, distortion. The circuits may be implemented on a single chip as integrated circuits.
Type:
Application
Filed:
March 21, 2008
Publication date:
September 25, 2008
Applicant:
Analog Devices, Inc.
Inventors:
Pavel Bretchko, Shuyun Zhang, Royal Gosser
Abstract: Virtual shielding is used to reduce the sources/origins of latchup and switching noise in a synchronous switching regulator. The regulator power stage may be split into two half stages. The ground bond wires of the half power stages may be positioned on opposite sides of the layout to substantially eliminate coupling between the ground bond wires. The power supply bond wire in one half power stage and the ground bond wire in the other half power stage may be positioned such that the mutual inductance between the power supply bond wire and the ground bond wire is maximized. The controller ground may be positioned substantially midway between the power supply bond wire in one half power stage and a respective ground bond wire in the other half power stage. The regulator controller may be placed between the regulator power stage and other analog circuitry to isolate the regulator power stage from the analog circuitry.
Abstract: An open drain driver (7) selectively switches a MOSFET switch (MN1) which is passively held in the conducting state into the non-conducting state. The MOSFET switch (MN1) switches an AC analogue input signal on a main input terminal (3) to a main output terminal (4) and the gate of the MOSFET switch (MN1) is AC coupled by a capacitor (C1) to the drain thereof. The open drain driver (7) comprises a first MOSFET (MN2) and a second MOSFET (MN3) through which the gate of the MOSFET switch (MN1) is pulled to ground (Vss). The gate of the first MOSFET (MN2) is coupled to the supply voltage (VDD) for maintaining the first MOSFET (MN2) in the open state. A control signal is applied to the gate of the second MOSFET (MN3) for selectively operating the open drain driver (7) in the conducting state for operating the MOSFET switch (MN1) in the non-conducting state.
Type:
Grant
Filed:
May 13, 2005
Date of Patent:
September 23, 2008
Assignee:
Analog Devices, Inc.
Inventors:
John J. O'Donnell, Michael Christian Wohnsen Coln, Maria del Mar Chamarro Marti
Abstract: A system and method of calibration develops a function from which is generated a monotonic time response; a gating period is defined from the monotonic time response and any error in the frequency of a reference signal is determined during the gating period; from that error an error signal is generated for adjusting the time constant of a circuit to be calibrated.
Type:
Grant
Filed:
September 12, 2005
Date of Patent:
September 23, 2008
Assignee:
Analog Devices, Inc.
Inventors:
William F. Ellersick, Jennifer A. Lloyd, Daniel J. Mulcahy
Abstract: A method of producing a MEMS device removes the bottom side of a device wafer after its movable structure is formed. To that end, the method provides the device wafer, which has an initial bottom side. Next, the method forms the movable structure on the device wafer, and then removes substantially the entire initial bottom side of the device wafer. Removal of the entire initial bottom side effectively forms a final bottom side.
Type:
Application
Filed:
May 29, 2008
Publication date:
September 18, 2008
Applicant:
ANALOG DEVICES, INC.
Inventors:
John R. Martin, Manolo G. Mena, Elmer S. Lacsamana, Michael P. Duffy, William A. Webster, Lawrence E. Felton, Maurice S. Karpman
Abstract: A controller for a multi-phase switching power supply shuffles the sequence of the phases in response to a load transient to prevent synchronization of one or more phases with high-frequency load transients. The sequence may be shuffled by varying the frequency and/or sequence of the switching control signals to introduce a random variation in the phases.
Type:
Application
Filed:
March 12, 2007
Publication date:
September 18, 2008
Applicant:
ANALOG DEVICES, INC.
Inventors:
David A. Tobin, Xiaogang Feng, Tod F. Schiff