Abstract: A micromachined gyroscope has first and second coplanar bodies suspended over a substrate and movable in their plane relative to the substrate. The first body is dithered along a dither axis and is movable relative to the second body on the dither axis, but is rigidly connected for movement along an axis transverse to the dither axis. The second body is anchored so that it is substantially inhibited from moving along the dither axis, but can move with the first body along the transverse axis. The gyro has stop members and an anti-levitation system for preventing failure.

Abstract: A micromachined gyroscope has first and second coplanar bodies suspended over a substrate and movable in their plane relative to the substrate. The first body is dithered along a dither axis and is movable relative to the second body on the dither axis, but is rigidly connected for movement along an axis transverse to the dither axis. The second body is anchored so that it is substantially inhibited from moving along the dither axis, but can move with the first body along the transverse axis. The gyro has stop members and an anti-levitation system for preventing failure.

Abstract: A clamp for use with a circuit (having an output for delivering an output voltage) forms a voltage boundary for the output voltage based upon a clamp voltage. To that end, the clamp includes a clamp input for receiving the clamp voltage, a clamp transistor in communication with the clamp input, and a control transistor in communication with the output. The clamp also includes a driving source for driving at least one of the clamp and control transistors based upon the voltage at the clamp input and the voltage at the output. The output is clamped at a voltage within the voltage boundary of the clamp voltage after the clamp transistor begins being driven by the driving source.

Abstract: A circuit is presented which sets the transconductance of a FET using a resistor. The circuit comprises a resistor and first and second FETs series-connected in sequence between a supply voltage and a circuit common point, and third and fourth FETs and a bias current source series-connected in sequence between the supply voltage and the circuit common point. The drain and gate of the fourth FET are connected to the gate of the second FET and the gates of the first and third FETs are cross-coupled to the drains of the third and first FETs, respectively. The bias current source provides a starting current for the circuit. When so arranged, and with the threshold voltages of the first and second FETs matched, the transconductance of the second FET is directly proportional to 1/R1. The circuit can in turn be used to bias other transistors in a reproducible way to fix the transconductance of an amplifier according to the selected resistor value.

Abstract: A method for reducing DC offset from a receiver signal. The method includes jointly (i.e., simultaneously) estimating such DC offset and channel impulse response, and reducing the DC offset in accordance with the estimated DC offset and the estimate of the channel impulse response.

Abstract: A digital radio tuner signal estimator receives a digitized in-phase (I) data signal and a digitized quadrature (Q) data signal and provides an estimated amplitude gain signal and an estimated signal-to-noise ratio signal value. The signal estimator includes a symmetrical matched I data digital filter having a first I filter section that filters the received I data signal and provides a first I data signal, and a second I filter section that filters the I data signal and provides a second I data signal. The signal estimator also includes a symmetrical matched Q data digital filter having a first Q filter section that filters the received Q data signal and provides a first Q data signal, and a second Q filter section that filters the Q data signal and provides a second Q data signal. The first and second I data signals and the first and second Q data signals are processed to compute an estimated amplitude gain.

Abstract: An input bias current reduction circuit for multiple input stages having a common input includes a plurality of input stages each including a first input transistor with its base connected to the common input and the first current sensing transistor with its collector-emitter in series with the collector-emitter of the first input transistor and its base current replicating that of the first transistor; and a current compensation circuit for sensing the base current of the first current sensing transistor in each input stage and subtracting that from the base current of the first input transistor in each input stage for maintaining constant reduced current loading of the input.

Abstract: A voltage source circuit adapted to provide a regulated output voltage independent of variations in an input voltage and having an input node adapted to receive an input reference current and an output node adapted to provide a definable voltage output. The circuit comprises a control element adapted to provide an output signal to the output node, an impedance being driven by the output signal of the control element, and a sensing element having a current mirror adapted to sense the current flowing through the impedance, and to provide a feedback signal. The control element is responsive to the difference between the feedback signal and the input reference current, thereby providing a regulated voltage output.

Abstract: A ping-pong amplifier includes two differential amplifiers A1 and A2 and an error amplifier. The error amplifier has one input connected to a predetermined common-mode reference voltage VCMR, its other input switchably connected to the common-mode outputs of A1 or A2, and an output which is switchably connected to the common-mode reference (CMR) voltage inputs of A1 and A2. Respective memory capacitors CM1 and CM2 are connected to the two CMR inputs. The error amplifier is periodically connected between A1's common-mode output and its CMR input to form a closed-loop which forces A1's common-mode output voltage to be equal to VCMR, with the error amplifier's output voltage stored on CM1. A2's common-mode output voltage is similarly calibrated, with the error amplifier's output voltage stored on CM2. Both common-mode output voltages are thus made equal to VCMR, thereby reducing transients that might otherwise appear in the output as the amplifier ping-pongs between A1 and A2.

Abstract: A circuit used for testing an integrated circuit including a chop circuit. A source of a test signal coupled to a first pair of pins of the integrated circuit. A test signal measuring device to measure the test signal coupled to a second pair of pins of the integrated circuit. A chop circuit controller produces a control signal and for feeding such control to the chop circuit and the test signal measuring device. In response to the control signal, the chop circuit couples the first pair of pins to the second pair of pins with a first polarity during a first period of time and couples the first pair of pins to the second pair of pins with an opposite polarity during a second period of time.

Abstract: A circuit comprises a current source providing an input current, first and second transistors having common control terminals and forming a current mirror connected between first and second power supply potentials, with the first transistor having an input coupled to the current source, the current mirror generating a mirror current at an output of the second transistor, and an amplifier connected in a negative feedback loop around the first transistor, wherein the amplifier input is referenced to the first power supply potential, and the amplifier output is referenced to the second power supply potential. A method for improving power supply rejection ratio of a current mirror is also described.

Abstract: A direct digital waveform synthesiser with DAC error correction includes a digital to analog converter system for producing a desired output waveform and having between its digital and analog output a characteristic having a linear component and a non-linear component; and a phase to amplitude converter including a storage device responsive to phase inputs to provide to the digital to analog converter system amplitudes modified to compensate for the non-linear component of a characteristic of the digital to analog converter system.

Abstract: An interpolator utilizes two ranks of transistors to generate a plurality of interpolator currents within the confines of a low power supply voltage. The first rank of transistors are underdriven, thereby generating a plurality of partially switched currents having shallow Gaussian-shaped functions. The partially switched currents are then spatially amplified by the second rank of transistors to reduce the overlap of the currents from adjacent transistors. The first rank of transistors are driven ratiometrically by the difference of two control currents, thereby eliminating errors caused by inaccurate resistors and current sources. A biasing op-amp senses the interpolator currents and servos the first rank of transistors, thereby regulating the interpolator currents to a value determined by a reference voltage which is temperature compensated. Thus, the biasing op-amp automatically compensates for temperature variations and manufacturing uncertainties in devices throughout the entire interpolator.

Abstract: A micromachined device has a first body suspended over a substrate in a plane parallel to the substrate and movable in the plane in a first direction relative to the substrate. A driver moves the first body in the first direction. A stop member, anchored to the substrate, limits motion of the body in the plane in a direction perpendicular to the first direction, and in a direction orthogonal to the plane and away from the substrate.

Abstract: A power amplifier module includes an input for receiving a signal having an input power level, at least one power amplifier coupled to the input to increase the input power level of the signal to an output power level and a power calibration and control module coupled to the power amplifier for measuring the output power level and correcting the output power level measurement based on a set of factors. The power calibration and control module further controls the at least one power amplifier to produce an output power level equivalent to a target power level. The power calibration and control module may include a power detector, a power calibrator and a power controller. The power amplifier module may further include a power set interface coupled to the power calibration and control module for providing the target power level.

Abstract: A bipolar rail-to-rail input stage with emitter degeneration includes a current reduction circuit arranged to reduce the amount of current which the PNP and NPN input pairs would otherwise conduct when the common mode input voltage is such that both pairs are conducting. The current reduction circuit is preferably arranged such that the transconductance (Gm2) of the input stage when both pairs are conducting is equal to its transconductance (Gm) when only one pair is active. The current reduction circuit preferably comprises a current shunt circuit made from four bipolar transistors: a pair of PNP transistors, the emitters of which are connected to respective emitters of the PNP input transistors, and a pair of NPN transistors, the emitters of which are connected to respective emitters of the NPN input transistors, with the bases and collectors of all four shunt transistors connected together at a summing node.

Abstract: A rechargeable battery measurement and calibration system for use with a removable battery pack suitably used to power a mobile computer locates current measurement and battery status intelligence outside of the battery pack, thereby reducing the cost, complexity, and power consumption of the battery pack when compared with prior art systems. A system host controls the measurement and calibration of the battery system; the host requests current measurements under both zero-current and non-zero calibration current conditions, with the resulting calibration values enabling linearity errors that might otherwise be present in the current measurements to be totally and easily identified and accounted for in a fuel gauge measurement. The present system complies with the SBS-IF specification for Smart Battery systems.

Abstract: A current compensation circuit for an amplifier, for example an operational amplifier, having input and output stages coupled at a high-impedance node, compensates for any modulation of current occurring at the high-impedance node. Particularly, the compensation circuit of the present invention reduces the error current at the high-impedance node resulting from a mismatch in beta between PNP and NPN transistors in the output stage, and reduces any error current resulting from the Early voltage effects of transistors in the output stage. In this manner, the present invention serves to substantially isolate the amplifier input stage from the output load, and from any beta mismatch or Early voltage effects in the transistors of the output stage, resulting in greatly improved open-loop gain.

Abstract: A low temperature coefficient (TC) voltage output circuit compensates for the TC of a base circuit's output voltage with a compensation circuit that includes first and second current sources with different TCs. The differential between the current sources is applied to a voltage drop circuit that generates a temperature dependent compensation voltage with a TC of opposite polarity to the TC of the base circuit's output. To provide compensation over a desired temperature range, the two current sources are set equal to each other at one temperature within the range, and the compensated voltage output is trimmed at another temperature within the range to the desired output value. The result is a compensated voltage, with a TC of opposite polarity to that of the base circuit's output, which combines with the base circuit output to yield a low TC compensated output. The compensation scheme is particularly useful for voltage references.

Abstract: A micromachined device has first and second sets of interdigitating fingers movable on a plane parallel to a substrate. A first group of conductive members is formed on the substrate and is at the same DC voltage as a first group of fingers. A second group of conductive members is formed on the substrate and is electrically coupled to the second group of fingers. The conductive members help to prevent one group of fingers from levitating with respect to others.