Patents Assigned to Analog Devices, Inc.
-
Patent number: 7418244Abstract: A radio transmission power control circuit includes a radio frequency (rf) downconverter that produces a downconverter output representative of the difference between a first downconverter input based on a transmitted signal of a radio transmitter and a second downconverter input based on a local oscillator signal. A receiver baseband circuit processes the downconverter output to produce an analog power signal representative of the transmitted signal. A digital to analog converter converts the analog power signal to a representative digital power signal. A feedback control circuit produces a transmitter gain control signal to control transmitted signal power so as to minimize the difference between the digital power signal and a power reference signal.Type: GrantFiled: August 4, 2003Date of Patent: August 26, 2008Assignee: Analog Devices, Inc.Inventor: Antonio J. Montalvo
-
Patent number: 7417390Abstract: A drive circuit for a brushless DC motor includes a switch constructed and arranged to drive the motor with a pulse signal responsive to a control signal, and control circuitry coupled to the switch and constructed and arranged to generate the control signal responsive to rotor position information from the motor so as to synchronize the pulse signal to the rotor position. A current sensing device can be used to provide the rotor position information to the control circuitry by sensing current flowing through the motor.Type: GrantFiled: July 25, 2005Date of Patent: August 26, 2008Assignee: Analog Devices, Inc.Inventors: Robin Laurie Getz, David Edward Hanrahan
-
Patent number: 7418467Abstract: A micro-programmable digital filter includes a plurality of programmable filter elements, an instruction memory for storing a control program, at least one instruction decoder for programming the filter elements based on the control program, and arithmetic logic for selectively scaling and accumulating output values received from the filter elements and providing accumulated values as inputs to the filter elements. The filter elements are typically coupled in series so that a coefficient output from one filter element can be passed to an adjacent filter element for implementing longer filters. A separate instruction decoder may be included for each filter element. Execution of the separate instruction decoders is typically staggered so that the instruction decoders can share the instruction memory and an accumulator without collision. Each filter element can be programmed to implement a different filtering function, or multiple filter elements can be programmed to operate on a single filtering function.Type: GrantFiled: June 18, 2004Date of Patent: August 26, 2008Assignee: Analog Devices, Inc.Inventor: Michael Hennedy
-
Publication number: 20080198056Abstract: An analog to digital converter is provided in which the outputs of first and second digital to analog converters DAC1 and DAC2 are combined in a combining circuit so as to form a plurality of decision thresholds. This enables two or more bits to be determined in a single trial.Type: ApplicationFiled: February 8, 2008Publication date: August 21, 2008Applicant: Analog Devices, Inc.Inventor: Christopher Peter Hurrell
-
Publication number: 20080197826Abstract: A switching power supply controller has a nominal loop gain and transient loop gain that is only activated in response to an abrupt load change in one direction. The transient loop gain may be implemented with a series-connected diode and resistor combination arranged in a feedback configuration with an error amplifier. A large load change in one direction may swing the output of the error amplifier and forward bias the diode to create a non-linear gain change.Type: ApplicationFiled: November 1, 2006Publication date: August 21, 2008Applicant: Analog Device, Inc.Inventors: Tod F. Schiff, Jerry Zhijun Zhai, Jun Zhao, Peng Liu
-
Patent number: 7415175Abstract: An optical communication system includes a transmitter that receives an input optical signal from an optical source and performs filtering so that an output signal from the transmitter includes a specific set of fiber modes that are allowed to pass for further processing. A receiver receives the output signal and performs the necessary operations to retrieve a signal indicative of the input signal.Type: GrantFiled: February 7, 2007Date of Patent: August 19, 2008Assignee: Analog Devices, Inc.Inventor: Shrenik Deliwala
-
Patent number: 7414456Abstract: A constant ratio current source comprises a first current branch which includes a first transistor that conducts a current I1 from a first current input to a first node and a resistor R1 connected between the first node and a circuit common point, and a second current branch which includes a second transistor that conducts a current I2 from a second current input to a second node and a resistor R2 connected between the second node and the circuit common point. The current branches are arranged such that I2 varies with I1. A linear negative resistance circuit connected between the first and second nodes provides an apparent negative resistance that increases the differential output impedance at the first and second current inputs, such that the ratio of I2:I1 is maintained approximately constant for a varying differential voltage applied across the first and second current inputs.Type: GrantFiled: August 17, 2006Date of Patent: August 19, 2008Assignee: Analog Devices, Inc.Inventor: Derek Bowers
-
Patent number: 7414971Abstract: A method converts an input data rate associated with N units of data to an output data rate associated with M units of data. The method includes calculating N write-control parameters each associated with one of M addresses of an output memory, directing each of N values of input data to an associated address of the output memory in response to the N calculated write-control parameters, and reading the output memory to provide output data associated with the output data rate. If N is greater than M, some of the N write-control parameters are associated with at least one shared address of the M addresses. If M is greater than N, all of the N write-control parameters are associated with different addresses of the M addresses. An apparatus is configured to implement this method.Type: GrantFiled: September 3, 2004Date of Patent: August 19, 2008Assignee: Analog Devices, Inc.Inventors: Guolin Pan, Anshoo Tandon, Ravikumar Ramanathan, Michael J. Lopez
-
Patent number: 7414388Abstract: A gain-phase detector differentially processes the outputs from two logarithmic amplifiers to provide ratiometric gain measurement, thereby eliminating intercept as a parameter. Hard-limited outputs from the dual amplifiers are multiplied in a logarithmic scalable phase detector core to provide a calibrated phase measurement output. In the preferred embodiment, two logarithmic amplifiers and other circuitry are co-integrated on a single substrate to provide a high degree of matching between the amplifiers, thereby canceling errors in the individual frequency responses of the individual amplifiers, extending the usable frequency response, and improving effective noise figure. Other numbers of logarithmic amplifiers can be used, and their various outputs can be added, subtracted, multiplied and combined in other manners to produce continuous products, continuous quotients, mixtures of products and quotients, etc., all of RF demodulated signals.Type: GrantFiled: May 30, 2006Date of Patent: August 19, 2008Assignee: Analog Devices, Inc.Inventor: Barrie Gilbert
-
Patent number: 7415542Abstract: A micro-programmable filter (MFE) engine includes multiple programmable filter elements and a microcode controller. The filter elements can be configured, controlled, and combined in different ways to implement different types of filters. The MFE preferably supports multiple-execution instructions that allow a single instruction to perform multiple moves into accumulators for efficient data movement inside MFE.Type: GrantFiled: June 18, 2004Date of Patent: August 19, 2008Assignee: Analog Devices, Inc.Inventors: Michael Hennedy, Vladimir Friedman, Artemas Speziale, Mohammad Reza Sherkat
-
Patent number: 7414564Abstract: Converter systems are provided which complement sample capacitors in at least one converter stage with replica capacitors. The replica capacitors are switched to receive replica charges from the analog input signal during the same operational mode in which the sample capacitors receive undesirable remnant charges. In an initial portion of a subsequent operational mode, the remnant capacitors are briefly switched to the sample capacitors to substantially cancel the remnant charges. The sample capacitors then participate in obtaining input-signal samples during the remainder of the subsequent operational mode. Because the remnant charges have been substantially canceled, the accuracy of the subsequent operational mode is considerably enhanced. In another system embodiment, the replica capacitor is replaced by a discharge switch which provides a discharge path in an initial portion of the subsequent operational mode.Type: GrantFiled: June 18, 2007Date of Patent: August 19, 2008Assignee: Analog Devices, Inc.Inventor: Ahmed Mohamed Abdelatty Ali
-
Patent number: 7412887Abstract: One or more fixed sensing electrodes are employed to sense movement of a mass both within the plane of the mass/electrodes and along an axis normal to that plane. In order to measure movement of the mass along the axis normal to the plane, a reference capacitance is measured between the fixed sensing electrode(s) and an underlying conducting plane and a measurement capacitance is measured between the mass and the underlying conducting plane. A value Cv-KCf may be computed, where Cf is the reference capacitance, Cv is the measurement capacitance, and K is a predetermined constant. In accordance with certain embodiments of the invention, a standard one or two axis acceleration sensor that measures movement of the mass within the plane can be used to also measure movement of the mass in the axis normal to the plane.Type: GrantFiled: August 16, 2005Date of Patent: August 19, 2008Assignee: Analog Devices, Inc.Inventor: John Memishian
-
Publication number: 20080195685Abstract: Multiplication engines and multiplication methods are provided. A multiplication engine for a digital processor includes a first multiplier to generate unequally weighted partial products from input operands in a first multiplier mode; a second multiplier to generate equally weighted partial products from input operands in a second multiplier mode; a multiplexer to select the unequally weighted partial products in the first multiplier mode and to select the equally weighted partial products in the second multiplier mode; and a carry save adder array configured to combine the selected partial products in the first multiplier mode and in the second multiplier mode.Type: ApplicationFiled: January 10, 2008Publication date: August 14, 2008Applicant: Analog Devices, Inc.Inventors: Andreas D. Olofsson, Baruch Yanovitch
-
Publication number: 20080195825Abstract: A processing system includes a processing circuit having one or more buses, a memory interface unit to control access by the processing circuit to a memory, and a metrics module. The metrics module includes one or more metrics registers and a metrics controller to monitor one or more operations selected from memory interface unit operations and bus operations, and to store metrics information corresponding to the monitored operations in the metrics registers. The monitored operations can include memory access operations, arbitration operations, bus operations, and the like. The metrics information can be analyzed to provide a basis for improving performance of a program that is executed on the processing system.Type: ApplicationFiled: February 8, 2007Publication date: August 14, 2008Applicant: Analog Devices, Inc.Inventors: Moinul I. Syed, Richard A. Gentile, Gregory T. Koker
-
Publication number: 20080191915Abstract: A DAC circuit is described which includes a DAC coupled to an amplifier. The circuit is configured to dynamically change the operating range of the amplifier depending on the circuit operating requirements.Type: ApplicationFiled: February 14, 2007Publication date: August 14, 2008Applicant: Analog Devices, Inc.Inventor: Dennis A. Dempsey
-
Patent number: 7411231Abstract: The present invention provides a JFET which receives an additional implant during fabrication, which extends its drain region towards its source region, and/or its source region towards its drain region. The implant reduces the magnitude of the e-field that would otherwise arise at the drain/channel (and/or source/channel) junction for a given drain and/or source voltage, thereby reducing the severity of the gate current and breakdown problems associated with the e-field. The JFET's gate layer is preferably sized to have a width which provides respective gaps between the gate layer's lateral boundaries and the drain and/or source regions for each implant, with each implant implanted in a respective gap.Type: GrantFiled: December 1, 2006Date of Patent: August 12, 2008Assignee: Analog Devices, Inc.Inventors: Craig Wilson, Derek Bowers, Gregory K. Cestra
-
Publication number: 20080187154Abstract: A MEMS microphone has a backplate and a movable diaphragm that together form a variable capacitance. The backplate has a backplate surface and, in a corresponding manner, the diaphragm has a diaphragm surface that faces the backplate surface. At least one of the backplate surface and the diaphragm surface has at least a portion with a Hurst exponent that is less than or equal to about 0.5.Type: ApplicationFiled: February 6, 2008Publication date: August 7, 2008Applicant: ANALOG DEVICES, INC.Inventor: John R. Martin
-
Publication number: 20080186784Abstract: A method of testing a memory cell includes generating a logic low signal, generating a logic high signal, reducing the logic high signal to a level corresponding to the logic low signal plus an offset to produce a reduced logic high signal, providing the logic low signal and the reduced logic high signal to a memory cell, allowing the memory cell to achieve a memory state, and testing the memory cell to determine if the memory state is an expected memory state. A memory array has an array of memory blocks, a write select circuit to provide write data to the array of memory blocks, and a data retention test circuit to reduce write data having a level corresponding to a logic high to a level corresponding to a logic low plus an offset.Type: ApplicationFiled: February 1, 2007Publication date: August 7, 2008Applicant: ANALOG DEVICES, INC.Inventors: Michael D. Eby, Gregory P. Mikol, James E. DeMaris
-
Patent number: 7406866Abstract: A micromachined device has a body suspended over a substrate and movable in a plane relative to the substrate. The body has a perimeter portion, a first cross-piece portion extending from one part of the perimeter portion to another part of the perimeter portion to define at least first and second apertures, a first plurality of fingers extending along parallel axes from the perimeter portion into the first aperture, and a second plurality of fingers extending along parallel axes from the perimeter portion into the second aperture.Type: GrantFiled: July 29, 2005Date of Patent: August 5, 2008Assignee: Analog Devices, Inc.Inventors: John A. Geen, Donald W. Carow
-
Publication number: 20080179730Abstract: An electronics package includes a wafer die substrate containing electronic circuits and having a top surface and a bottom surface. A top protective layer is substantially thinner than the substrate and covers the top surface. A bottom protective layer is substantially thinner than the substrate and covers the bottom surface. Circuit contacts are distributed about the bottom protective layer for electrically coupling the substrate electronic circuits to external electronic circuits.Type: ApplicationFiled: January 25, 2007Publication date: July 31, 2008Applicant: Analog Devices, Inc.Inventors: Alan O'Donnell, Oliver Kierse, Thomas M. Goida