Abstract: Semiconductor devices and methods of manufacturing the same are described. The methods form a 3D DRAM architecture that includes a semiconductor isolation bridge, eliminating a floating body effect. The method includes forming an epitaxial layer in a deep trench isolation opening and creating a semiconductor isolation bridge between adjacent deep trench isolation openings.

Abstract: A method includes receiving a spot beam profile is received for a spot ion beam; receiving a linear scanned beam profile for the spot ion beam; generating a calculated calibration spot profile, based upon the spot beam profile and the linear scanned beam profile; and implementing an adjusted scanned profile for the spot ion beam, based upon the calculated calibration spot profile.

Abstract: Exemplary slurry delivery assemblies may include a slurry fluid source. The assemblies may include a flurry delivery lumen having a lumen inlet and a lumen outlet. The lumen inlet may be fluidly coupled with an output of the slurry fluid source. The assemblies may include a deagglomeration tube fluidly coupled with the lumen outlet. The deagglomeration tube may include a tube inlet and a tube outlet. The assemblies may include one or more ultrasonic transducers coupled with the deagglomeration tube.

Abstract: Exemplary substrate processing systems may include a chamber body defining a transfer region. The systems may include a lid plate seated on the chamber body. The lid plate may define a plurality of apertures. The systems may include a plurality of lid stacks equal to a number of the plurality of apertures. The systems may include a plurality of substrate support assemblies equal to the number of apertures defined through the lid plate. Each assembly may be disposed in one of the processing regions and may include an electrostatic chuck body defining a substrate support surface that defines a substrate seat. Each assembly may include a heater embedded within the chuck body. Each assembly may include bipolar electrodes between the heater and the substrate support surface. Each assembly may include a conductive mesh embedded within the body between the heater and bipolar electrodes.

Abstract: Exemplary methods of semiconductor processing may include delivering a carbon-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include generating a plasma of the carbon-containing precursor and the hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include forming a layer of graphene on a substrate positioned within the processing region of the semiconductor processing chamber. The substrate may be maintained at a temperature below or about 600° C. The methods may include halting flow of the carbon-containing precursor while maintaining the plasma with the hydrogen-containing precursor.

Abstract: Analyzing a sidewall of a hole milled in a sample to determine thickness of a buried layer includes milling the hole in the sample using a charged particle beam of a focused ion beam (FIB) column to expose the buried layer along the sidewall of the hole. After milling, the sidewall of the hole has a known slope angle. From a perspective relative to a surface of the sample, a distance is measured between a first point on the sidewall corresponding to an upper surface of the buried layer and a second point on the sidewall corresponding to a lower surface of the buried layer. The thickness of the buried layer is determined using the known slope angle of the sidewall, the distance, and the angle relative to the surface of the sample.

Abstract: A ferroelectric tunnel junction (FTJ) memory device may include a first electrode and a ferroelectric layer comprising ferroelectric dipoles that may generate a first electric field. The first electric field may be oriented in a first direction when the device operates in an ON state. The device may also include a barrier layer that may generate a depolarizing second electric field that may be oriented in a second direction opposite of the first direction when the device operates in the ON state. The device may further include a second electrode. The first electrode and the second electrode may generate a third electric field that is oriented in the first direction when the device operates in the ON state.

Abstract: A method of correcting bias temperature instability in memory arrays may include applying a first bias to a memory cell, where the memory cell may include a memory element and a select element, and the first bias may causes a value to be stored in the memory element. The first bias causes a bias temperature instability (BTI) associated with the memory cell to increase. The method may also include applying a second bias to the memory cell, where the second bias may have a polarity that is opposite of the first bias, and the value stored in the memory element remains in the memory element after the second bias is applied. The second bias may also cause the BTI associated with the memory cell to decrease while maintaining any value stored in the memory cell.

Abstract: Exemplary methods of semiconductor processing may include etching one or more features partially through a dielectric material to expose material from one or more layer pairs formed on a substrate. The methods may include halting the etching prior to penetrating fully through the dielectric material, and prior to exposing material from all layer pairs formed on the substrate. The methods may include forming a layer of carbon-containing material on the exposed material from each of the one or more layer pairs having exposed material. The methods may include etching the one or more features fully through the dielectric material to expose material for each remaining layer pair formed on the substrate.

Abstract: Embodiments disclosed herein include a semiconductor manufacturing tool with a hybrid model and methods of using the hybrid model for processing wafers and/or developing process recipes. In an embodiment, a method for developing a semiconductor manufacturing process recipe comprises selecting one or more device outcomes, and querying a hybrid model to obtain a process recipe recommendation suitable for obtaining the device outcomes. In an embodiment, the hybrid process model comprises a statistical model and a physical model. In an embodiment, the method may further comprise executing a design of experiment (DoE) on a set of wafers to validate the process recipe recommended by the hybrid process model.

Abstract: Methods and systems for reducing substrate particle scratching using machine learning are provided. A machine learning model is trained to predict process recipe settings for a substrate temperature control process to be performed for a current substrate at a manufacturing system. First training data and second training data are generated for the machine learning model. The first training data includes historical data associated with prior process recipe settings for a prior substrate temperature control process performed for a prior substrate at a prior process chamber. The second training data is associated with a historical scratch profile of one or more surfaces of the prior substrate after performance of the prior substrate temperature control process according to the prior process recipe settings.

Abstract: Memory devices and methods of manufacturing memory devices are provided. The device and methods described suppress oxidation of metal layers exposed to ambient oxygen. After an opening is formed, a nitridation process occurs to nitridate the surface of the exposed metal layer inside the opening. The nitridated region formed on the surface of metal layer inside the opening works as a barrier layer for oxygen diffusion. In addition, the nitridated region works as an electrode for charge trap memory cells.

Abstract: A diagnostic disc includes a disc-shaped body having raised walls that encircle the interior of the disc-shaped body and at least one protrusion extending outwardly from the disc-shaped body. The raised walls of the disc-shaped body define a cavity of the disc-shaped body. A non-contact sensor is attached to each of the at least one protrusion. A printed circuit board (PCB) is positioned within the cavity formed on the disc-shaped body. A vacuum and high temperature tolerant power source is disposed on the PCB along with a wireless charger and circuitry that is coupled to each non-contact sensor and includes at least a wireless communication circuit and a memory. A cover is positioned over the cavity of the disc-shaped body and shields at least a portion of the PCB, circuitry, power source, and wireless charger within the cavity from an external environment.

Abstract: Embodiments described herein relate to magnetic and electromagnetic systems and a method for controlling the density profile of plasma generated in a process volume of a PECVD chamber to affect deposition profile of a film. In one embodiment, a plurality of retaining brackets is disposed in a rotational magnetic housing of the magnetic housing systems. Each retaining bracket of the plurality of retaining brackets is disposed in the rotational magnetic housing with a distance d between each retaining bracket. The plurality of retaining brackets has a plurality of magnets removably disposed therein. The plurality of magnets is configured to travel in a circular path when the rotational magnetic housing is rotated around the round central opening.

Abstract: Exemplary support assemblies may include an electrostatic chuck body defining a substrate support surface. The substrate support assemblies may include a support stem coupled with the electrostatic chuck body. The substrate support assemblies may include a heater embedded within the electrostatic chuck body. The substrate support assemblies may include a first bipolar electrode embedded within the electrostatic chuck body between the heater and the substrate support surface. The first bipolar electrode may include at least two separated mesh sections, with each mesh section characterized by a circular sector shape. The substrate support assemblies may include a second bipolar electrode embedded within the electrostatic chuck body between the heater and the substrate support surface. The second bipolar electrode may include a continuous mesh extending through the at least two separated mesh sections of the first bipolar electrode.

Abstract: Aspects of the present disclosure relate generally to pedestals, components thereof, and methods of using the same for substrate processing chambers. In one implementation, a pedestal for disposition in a substrate processing chamber includes a body. The body includes a support surface. The body also includes a stepped surface that protrudes upwards from the support surface. The stepped surface is disposed about the support surface to surround the support surface. The stepped surface defines an edge ring such that the edge ring is integrated with the pedestal to form the body that is monolithic. The pedestal also includes an electrode disposed in the body, and one or more heaters disposed in the body.

Abstract: Described are microelectronic devices comprising a dielectric layer formed on a substrate, a feature comprising a gap defined in the dielectric layer, a barrier layer on the dielectric layer, a two metal liner film on the barrier layer and a gap fill metal on the two metal liner. Embodiments provide a method of forming a microelectronic device comprising the two metal liner film on the barrier layer.

Abstract: Provided herein are approaches for performing electrodynamic mass analysis with a radio frequency (RF) biased ion source to reduce ion beam energy spread. In some embodiments, a system may include an ion source including a power supply, the ion source operable to generate a plasma within a chamber housing, and an extraction power assembly including a first power supply and a second power supply electrically coupled with the chamber housing of the ion source, wherein the first power supply and the second power supply are operable to bias the chamber housing of the ion source with a time modulated voltage to extract an ion beam from the ion source. The system may further include an electrodynamic mass analysis (EDMA) assembly operable to receive the ion beam and perform mass analysis on the ion beam.

Abstract: The disclosure pertains to a capacitively coupled plasma source in which VHF power is applied through an impedance-matching coaxial resonator having a symmetrical power distribution.

Abstract: Systems and methods for electroplating are described. The electroplating system may include a vessel configured to hold a first portion of a liquid electrolyte. The system may also include a substrate holder configured for holding a substrate in the vessel. The system may further include a first reservoir in fluid communication with the vessel. In addition, the system may include a second reservoir in fluid communication with the vessel. Furthermore, the system may include a first mechanism configured to expel a second portion of the liquid electrolyte from the first reservoir into the vessel. The system may also include a second mechanism configured to take in a third potion of the liquid electrolyte from the vessel into the second reservoir when the second portion of the liquid electrolyte is expelled from the first reservoir. Methods may include oscillating flow of the electrolyte within the vessel.