Abstract: Apparatus, methods and are disclosed for measuring refractive index of an absorber material used in EUV phase shift masks. The method and apparatus utilize a reference measurement and as series of reflectance measurements at a range of EUV wavelengths and thickness values for the absorber material to determine the refractive index of the absorber material.

Abstract: A method of post-treating a dielectric film formed on a surface of a substrate includes positioning a substrate having a dielectric film formed thereon in a processing chamber and exposing the dielectric film to microwave radiation in the processing chamber at a frequency between 5 GHz and 7 GHz.

Abstract: Doped-aluminum nitride (doped-AlN) films and methods of manufacturing doped-AlN films are disclosed. Some methods comprise forming alternating pinning layers and doped-AlN layers including a dopant selected from the group consisting of Sc, Y, Hf, Mg, Zr and Cr, wherein the pinning layers pin the doped-AlN layers to a c-axis orientation. Some methods include forming a conducting layer including a material selected from the group consisting of Mo, Pt, Ta, Ru, LaNiO3 and SrRuO3. Some methods include forming a thermal oxide layer having silicon oxide on a silicon substrate. Piezoelectric devices comprising the doped-AlN film are also disclosed.

Abstract: Exemplary processing methods include forming a nucleation layer on a substrate. The nucleation layer may be formed by physical vapor deposition (PVD), and the physical vapor deposition may be characterized by a deposition temperature of greater than or about 700° C. The methods may further include forming a patterned mask layer on the nucleation layer. The patterned mask layer may include openings that expose portions of the nucleation layer. Gallium-and-nitrogen-containing regions may be formed on the exposed portions of the nucleation layer. In additional embodiments, the nucleation layer may include a first and second portion separated by an interlayer that stop the propagation of at least some dislocations in the nucleation layer.

Abstract: Methods for pre-cleaning substrates having metal and dielectric surfaces are described. A substrate comprising a surface structure with a metal bottom, dielectric sidewalls, and a field of dielectric is exposed to a dual plasma treatment in a processing chamber to remove chemical residual and/or impurities from the metal bottom, the dielectric sidewalls, and/or the field of the dielectric and/or repair surface defects in the dielectric sidewalls and/or the field of the dielectric. The dual plasma treatment comprises a direct plasma and a remote plasma.

Abstract: Described is a memory string including at least one select gate for drain (SGD) transistor and at least one memory transistor in a vertical hole extending through a memory stack on a substrate. The memory stack comprises alternating word lines and dielectric material. There is at least one select-gate-for-drain (SGD) transistor in a first vertical hole extending through the memory stack, the select-gate-for-drain (SGD) transistor comprising a first gate material. At least one memory transistor is in a second vertical hole extending through the memory stack, the at least one memory transistor comprising a second gate material different from the first gate material.

Abstract: Provided is a processing chamber configured to contain a semiconductor substrate in a processing region of the chamber. The processing chamber includes a remote plasma unit and a direct plasma unit, wherein one of the remote plasma unit or the direct plasma unit generates a remote plasma and the other of the remote plasma unit or the direct plasma unit generates a direct plasma. The combination of a remote plasma unit and a direct plasma unit is used to remove, etch, clean, or treat residue on a substrate from previous processing and/or from native oxide formation. The combination of a remote plasma unit and direct plasma unit is used to deposit thin films on a substrate.

Abstract: Substrate supports comprising a top plate positioned on a shaft are described. The top plate including a primary heating element a first depth from the surface of the top plate, a inner zone heating element a second depth from the surface of the top plate and an outer zone heating element a third depth from the surface of the top plate. Substrate support assemblies comprising a plurality of substrate supports and methods of processing a substrate are also disclosed.

Abstract: An ion implanter may include an ion source, arranged to generate a continuous ion beam, a DC acceleration system, to accelerate the continuous ion beam, as well as an AC linear accelerator to receive the continuous ion beam and to output a bunched ion beam. The ion implanter may also include an energy spreading electrode assembly, to receive the bunched ion beam and to apply an RF voltage between a plurality of electrodes of the energy spreading electrode assembly, along a local direction of propagation of the bunched ion beam.

Abstract: Processing chambers and methods to disrupt the boundary layer are described. The processing chamber includes a showerhead and a substrate support therein. The showerhead and the substrate support are spaced to have a process gap between them. In use, a boundary layer is formed adjacent to the substrate support or wafer surface. As the reaction occurs at the wafer surface, reaction products and byproduct are produced, resulting in reduced chemical utilization rate. The processing chamber and methods described disrupt the boundary layer by changing one or more process parameters (e.g., pressure, flow rate, time, process gap or temperature of fluid passing through the showerhead).

Abstract: Electronic devices and methods of forming electronic devices with gate-all-around non-I/O devices and finlike structures for I/O devices are described. A plurality of dummy gates is etched to expose a fin comprising alternating layers of a first material and a second material. The second material layers are removed to create openings and the first material layers remaining are epitaxially grown to form a finlike structure.

Abstract: Examples of the present technology include semiconductor processing methods that provide a substrate in a substrate processing region of a substrate processing chamber, where the substrate is maintained at a temperature less than or about 50° C. A plasma may be generated from the hydrocarbon-containing precursor, and a carbon-containing material may be deposited from the plasma on the substrate. The carbon-containing material may include diamond-like-carbon, and may have greater than or about 60% of the carbon atoms with sp3 hybridized bonds.

Abstract: Embodiments herein include void-free material depositions on a substrate (e.g., in a void-free trench-filled (VFTF) component). In some embodiments, a method may include providing a plurality of device structures extending from a base, each of the plurality of device structures including a first sidewall opposite a second sidewall and a top surface extending between the first and second sidewalls, and providing a seed layer over the plurality of device structures. The method may further include forming a dielectric layer along just the top surface and along an upper portion of the first and second sidewalls using an angled deposition delivered to the plurality of device structures at a non-zero angle of inclination relative to a perpendicular extending from an upper surface of the base, and forming a fill material within one or more trenches defined by the plurality of device structures.

Abstract: Embodiments of the disclosure provided herein include an apparatus and method for the plasma processing of a substrate in a processing chamber. More specifically, embodiments of this disclosure describe a biasing scheme that is configured to provide a radio frequency (RF) generated RF waveform from an RF generator to one or more electrodes within a processing chamber and a pulsed-voltage (PV) waveform delivered from one or more pulsed-voltage (PV) generators to the one or more electrodes within the processing chamber. The plasma process(es) disclosed herein can be used to control the shape of an ion energy distribution function (IEDF) and the interaction of the plasma with a surface of a substrate during plasma processing.

Abstract: Molybdenum(IV) and molybdenum(III) coordination complexes are described. Methods for depositing molybdenum-containing films on a substrate are described. The substrate is exposed to a molybdenum precursor and a reactant to form the molybdenum-containing film (e.g., elemental molybdenum, molybdenum oxide, molybdenum carbide, molybdenum silicide, molybdenum nitride). The exposures can be sequential or simultaneous.

Abstract: Implementations described herein generally relate to metal electrodes, more specifically lithium-containing anodes, high performance electrochemical devices, such as secondary batteries, including the aforementioned lithium-containing electrodes, and methods for fabricating the same. In one implementation, an anode electrode structure is provided. The anode electrode structure comprises a current collector comprising copper. The anode electrode structure further comprises a lithium metal film formed on the current collector. The anode electrode structure further comprises a solid electrolyte interface (SEI) film stack formed on the lithium metal film. The SEI film stack comprises a chalcogenide film formed on the lithium metal film. In one implementation, the SEI film stack further comprises a lithium oxide film formed on the chalcogenide film. In one implementation, the SEI film stack further comprises a lithium carbonate film formed on the lithium oxide film.

Abstract: Embodiments of the disclosure provided herein include an apparatus and method for the plasma processing of a substrate in a processing chamber. More specifically, embodiments of this disclosure describe a biasing scheme that is configured to provide a radio frequency (RF) generated RF waveform from an RF generator to one or more electrodes within a processing chamber and a pulsed-voltage (PV) waveform delivered from one or more pulsed-voltage (PV) generators to the one or more electrodes within the processing chamber. The plasma process(es) disclosed herein can be used to control the shape of an ion energy distribution function (IEDF) and the interaction of the plasma with a surface of a substrate during plasma processing.

Abstract: In embodiments, a process gas supply provides a carrier gas and one or more process gases to a distribution manifold. A back pressure sensor senses back pressure in the distribution manifold and provides a signal to the first controller based at least in part on the back pressure. The first controller determines a back pressure set point based at least in part on the signal. One or more mass flow controllers control the flow of the gas mixture comprising the carrier gas and the one or more process gases into one or more zones of the process chamber. An upstream pressure controller fluidly and operatively connected to the distribution manifold controls flow of the carrier gas based on the back pressure set point.

Abstract: Examples disclosed herein relate to a method and apparatus for inspecting lamp dimensions. The method includes determining an actual measurement of a lamp. The lamp is configured to heat a substrate in a substrate processing apparatus. A window is generated, the window having a width and a height. The window is based upon a target measurement of the lamp. The method further includes generating a deviation based upon a difference between an image of the actual measurement and the window. The deviation is compared to a first threshold. The lamp is rejected if the deviation is outside the first threshold.

Abstract: Aspects of the disclosure relate to apparatus for the fabrication of waveguides. In one example, an angled ion source is utilized to project ions toward a substrate to form a waveguide which includes angled gratings. In another example, an angled electron beam source is utilized to project electrons toward a substrate to form a waveguide which includes angled gratings. Further aspects of the disclosure provide for methods of forming angled gratings on waveguides utilizing an angled ion beam source and an angled electron beam source.