Abstract: A display data format conversion circuit and method facilitates display of data on a plurality of display devices based on display data of a source display device. The system incorporates a resynchronization circuit that dynamically varies a frame rate of one display device based on the instantaneous frame rate of the source device to maintain synchronization of the displays. A display timing generator circuit for a first display, such as an LCD display, produces a first display timing signal. The resynchronization circuit is operatively responsive to the first display timing signal and a second display timing signal wherein the second display timing signal is associated with a second display device, such as a source display device. In one embodiment, the resynchronization circuit includes a vertical blanking time variation circuit that adaptively and continuously varies the frame rate of the first display device by varying a vertical blanking time of the first display device.

Abstract: A graphics system is used with a display capable of displaying a frame of an image via a sequence of scan lines. The graphics system has a memory and an image generator. The image generator is connected to store the data associated with some of the scan lines of the frame in a region of the memory, and before all of the data is retrieved from the region, store other data associated with another scan line in the region. The graphics system also has a display interface that is connected to retrieve the data associated with some of the scan lines from the region and use the data to form some of the scan lines on the display. The display interface is also connected to use the other data to form the next scan line in the sequence after the other scan lines are formed.

Abstract: A method and apparatus for processing video and graphics data is accomplished by receiving display data that includes at least one of video data and graphics data. If the display data includes video data, the video data is converted into graphics formatted video data when a first control signal is in a first state. The graphics formatted video data, which is now in a format consistent with the computer monitor (e.g., an RGB video format), is then provided to the computer monitor based on the enablement of the first control signal. Alternately, or in addition to, the graphics data may be provided to the computer monitor. If the display data includes graphics data, i.e., computer generated data for display on a computer monitor, the graphics data is converted into video formatted graphics data when a second control signal is in a second state. In this conversion, the graphics data, which is in a RGB format, is converted into a video format, e.g., a YUV data format.

Abstract: A method and apparatus for video decoding of compressed video data begins by generating a plurality of coefficients based on run level data of two-dimensional frequency components corresponding to the compressed video data. As the coefficients are generated, they are stored in a coefficient section of memory. Once the coefficients have been stored, they are utilized to generate intermediate results. As the intermediate results are being generated, they are stored in an intermediate section of the memory. Next, representations of the video data are generated based on the intermediate results and stored in an output section of the memory. The storing and retrieving of the coefficients, intermediate results, and representations of the video data are done in a time multiplexed manner.

Abstract: A method and apparatus for rendering an object to have a bump texture begins when object parameters for the object are received. The object parameters include bump mapping coordinates and physical display coordinates. From this information, a first and second axis specific tables are generated to provide a plurality of axis specific bump intensity values. The first axis specific table relates to bump intensity values along a first axis of the bump and the second axis specific table relates to bump intensity values along a second axis of the bump map. In essence, the axis specific tables represent the bump map being mathematically repositioned to be in the same plane, with respect to the fixed coordinates of the display, as that of the object. With the tables generated, the object is rendered on a pixel by pixel basis, wherein the first and second axis specific tables are addressed for each pixel to retrieve a corresponding first and second intensity values (i.e.

Abstract: A method and apparatus for providing video graphics processing that includes anti-aliasing begins when a video graphics processor receives vertex parameters of an object-element and walks a first edge of the object element and a second edge of the object element. The video graphics processor walks the first and second edges based on calculations involving a decision corner and an error term. The calculations indicate which direction to walk on a pixel by pixel basis, i.e., whether the walking should be in the major direction or the minor direction. The calculations also identify pixels that contain fragment pixel information, i.e., the pixels along the edges of the object element. For each fragment pixel, subpixel masks are created for each object element that is present in the fragmented pixel. From the subpixel masks, subpixel sequences are determined, which are used to produce pixel information of the fragment pixel.

Abstract: A method and apparatus for utilizing a data cache in a system with both 2D and 3D graphics applications. In a specific embodiment of the present invention, a mode signal is received by the video system indicating whether a 2D or 3D application is to be used. Depending on the mode signal, either as a unified cache capable of being accessed by two separate data access streams, or two independent caches, each accessed by one data access stream.

Abstract: A method and apparatus for rendering shadows on a three-dimensional scene is accomplished by generating a light source texture map of the given three-dimensional scene. The light source texture map is generated based on a viewing perspective being proximal to a light source projection. Once the light source texture map has been generated, an object element of the three-dimensional scene is rendered based on the light source texture map and image information. The image information includes vertex components corresponding to object elements of the three-dimensional scene.

Abstract: A combination has a booth recoder with at least three input lines; two input lines corresponding to two bits of a multiplier and one input line being an increment select line. In one embodiment, signals representing the two bits of the multiplier are provided on the two input lines corresponding to the two bits. A controller selectively asserts a increment select signal on an increment select line, thereby incrementing the multiplier. Therefore, the present invention has the advantage of incrementing a multiplier while performing booth multiplication without requiring an additional adder for incrementing.

Abstract: A method and apparatus for sequencing palette updates in a video graphics system is accomplished by first storing a first portion of graphics data in a first position of a bus master buffer, where the first portion of the graphics data utilizes a palette. An indication of a palette update is then received, where the palette update will be used by subsequent graphics data. The updated palette is stored in a second position of the bus master buffer. A second portion of the graphics data, which utilizes the updated palette, is then stored in a third position of the bus master buffer. The data in the bus master buffer is then fetched through a direct memory access transfer initiated by the graphics processor in the system. The data is fetched in a sequential manner, which ensures that the palette update does not occur until after the graphics data utilizing the original palette has been drawn.

Abstract: A powerup sequencing circuit and method generates an artificial supply voltage until the actual supply voltage is at a suitable level. An artificial supply source, such as a pull up circuit, is coupled to a node that receives a first supply voltage, such as an I/O buffer voltage. The pull up circuit is also coupled to an isolatable source voltage node. The isolatable source voltage node is the node that causes the actual second supply voltage. A temporary isolation circuit is operatively coupled to the pull up circuit and is operatively interposed between the node that receives the first supply voltage and the isolatable source voltage node. The pull up circuit provides a temporary or artificial second supply voltage level to an on chip circuit, such as an I/O buffer circuit or other suitable circuit that may, for example, be multi-voltage supply dependent.

Abstract: A method and apparatus for processing video data and graphics data with minimal visual differences is accomplished by retrieving the graphics data and the video data at a first clock rate. Having retrieved the video data, it is sampled at a second clock rate to produce sampled video data. The second clock rate is greater than the first such that the video data is sampled at a higher rate than the pixel rate of the computing device. The sampled video data is then filtered by a low-pass filter to produce filtered video data. The filtered video data is then mixed, based on a control signal, with the retrieved graphics data to produce a mixed signal that is subsequently displayed.

Abstract: A video DAC uses a charge pump to maintain a constant peak to peak amplitude within power supply variations over process and temperature, rather than an external reference signal or a band gap reference. The charge pump performs calibration at full scale output during horizontal sync levels or vertical sync pulses.

Abstract: A method and apparatus for dynamically blending a plurality of image input layers include processing that begins by determining color base (e.g., color space, colorimetries and/or any defining characteristics relating to the display of a video signal and/or graphics data) of each of a plurality of image input layers. An image input layer corresponds to a window, display area and/or background of a display capable of presenting separate images at one time, wherein the separate images originate from separate video and/or graphics sources. The processing continues by determining an output color base of an output, where the output color base corresponds to the color base capabilities of the video equipment (e.g., RGB output). The processing then continues by converting, for each of the plurality of image input layers that has a different color base than the output color base, the color base to match the output color base thereby producing converting image layers.

Abstract: A method and apparatus for providing compatibility with synchronous dynamic random access memory (SDRAM) and double data rate (DDR) memory is provided. While memory accessing agents, such a microprocessors, typically have a fixed memory access size (e.g., number of bits or bytes exchanged with a memory device in a single operation), DDR memory provides twice the memory burst capability of SDRAM. A method and apparatus is provided to allow memory access agents to exchange data with both SDRAM and DDR memory. Smaller groups of data may be combined or larger groups of data may be separated to allow compatibility. Buffering is provided to accommodate proper timing. Both SDRAM and DDR memory may be used simultaneously.

Abstract: A method and apparatus for decompression of a two dimensional video texture map such that an object may subsequently be displayed as a three dimensional object is generally accomplished by a set-up engine which receives vertex parameters and generates a plurality of derivatives and Bresenham parameters, therefrom. The derivatives and Bresenham parameters are provided to an edgewalker circuit which produces, therefrom, a plurality of spans which, in turn, is converted in to a set of texel addresses by a texel address generator. A texel fetch circuit receives the set of texel addresses and uses the addresses to retrieve a set of texels, which is subsequently processed by a texel processor to produce a filtered pixel. To retrieve the set of texels, the texel fetch circuit retrieves a set of indexes based on the texel addresses and uses the set of texels to retrieve the set of texels from a codebook.

Abstract: An audio mute control signal generating circuits uses a high gain differential amplifier that switches transitions at the zero-crossing of the input audio so that the clock for a mute enable circuit is more readily controlled. The high gain differential amplifier includes a modification to a conventional type first operational amplifier in a cascaded operational amplifier configuration wherein additional cascade feedback transistors are added in parallel with differential output transistors from the first stage and are connected to an input stage of the second cascaded operational amplifier. With this configuration, when the output common mode voltage drops, the channel conductance of the cascade feedback transistors increases to oppose the change thereby increasing the common mode voltage to a suitable level so that the second stage does not inadvertently shut off.

Abstract: A method for formatting a texture in a frame buffer is accomplished by receiving a lock signal from a processor, where the lock signal is associated with the texture. A pointer to a location in the frame buffer is provided in response to the lock signal, whereupon the processor stores the texture in the frame buffer at the specified location. An unlock signal is then received from the processor, indicating that the texture has been stored. The texture is then copied from the frame buffer to a memory based on a tiling algorithm to produce a tiled version of the texture in the memory. The tiled version is then copied from the memory back to the frame buffer at the specified location.

Abstract: A method and apparatus that combines video streams to reduce interconnection between video processors and rendering devices is presented. Multiple video streams are multiplexed at particular phases of a clock signal so that, at the rendering device, the desired video stream is selected by selecting the appropriate phased clock signal. In a preferred embodiment, the combined signal is compatible with conventional single-port rendering devices, such as displays, video recorders, and video encoders. Also presented is a means for selecting among multiple video streams that minimizes the number of interconnections that are switched.

Abstract: A rasterizer is used with a processor capable of providing raster data indicative of a pattern of pixels to be formed on a display. Each pixel has an attribute represented by a data value. The rasterizer has a replicator connected to form at least two copies of the raster data. A graphics engine is connected to use the at least two copies to store the data values in a memory. An output circuit is connected to use the data values stored in the memory to form the pattern on the display.