Abstract: A wireless network infrastructure supporting a plurality of wireless end point devices containing a wireless access point and a plurality of end point wireless devices that supports single transmission and reception and/or concurrent interfering transmission and reception. The wireless access point transmits data to the end point wireless devices that supports single transmission and reception during a first portion of a first data transmission period and simultaneously transmits data to the end point wireless devices that supports concurrent interfering transmission and reception during a second portion of the first data transmission period. The wireless access point simultaneously receives data from the end point wireless devices that supports concurrent interfering transmission and reception during a second data transmission period.
Type:
Application
Filed:
November 9, 2006
Publication date:
May 15, 2008
Applicant:
Broadcom Corporation, a California Corporation
Abstract: A wireless network infrastructure that adapts encoding approach and frame parameters of concurrent interfering transmission and receptions in response to dynamically varying channel conditions. The channel conditions are determined by number of associated wireless end point devices within a cell, their capabilities, anticipated bandwidth usage, QOS (Quality Of Service) demands, priority of service and idle states, cell overlap interferences, near-far interferences, and noises. The wireless network infrastructure consists of an access point that is adapted to receive and transmit concurrent interfering transmissions utilizing a plurality of encoding approach and frame parameters. In addition, the wireless network infrastructure consists of a plurality of end point devices that are adapted to transmit and receive using concurrent interfering transmissions with one or more of the plurality of encoding approach and frame parameters.
Type:
Application
Filed:
December 18, 2006
Publication date:
May 15, 2008
Applicant:
Broadcom Corporation, a California Corporation
Abstract: A wireless network infrastructure that adapts frame parameters of concurrent interfering receptions in response to the dynamically varying channel conditions. The channel conditions are determined by number of associated wireless end point devices within a cell, their capabilities, anticipated bandwidth usage, QOS (Quality Of Service) demands, priority of service and idle states, cell overlap interferences, near-far interferences and noises. The wireless network infrastructure contains a wireless access point within the cell that assigns a mode to a frame or sub-frame and adapts to channel conditions by varying mode durations and payload lengths. The modes include single transmission mode, plurality of partial concurrent interfering transmission modes and full concurrent interfering transmission mode. These modes allow single as well as concurrent interfering transmissions and receptions of varying payload lengths.
Type:
Application
Filed:
December 18, 2006
Publication date:
May 15, 2008
Applicant:
Broadcom Corporation, a California Corporation
Abstract: Address generation for contention-free memory mappings of turbo codes with ARP (almost regular permutation) interleaves. A novel means is presented by which anticipatory address generation is employed using an index function , that is based on an address mapping , which corresponds to an interleave inverse order of decoding processing (??1). In accordance with parallel turbo decoding processing, instead of performing the natural order phase decoding processing by accessing data elements from memory bank locations sequentially, the accessing of addresses is performed based on the index function , that is based on an mapping and the interleave (?) employed within the turbo coding. In other words, the accessing data elements from memory bank locations is not sequential for natural order phase decoding processing. The index function of also allows for the interleave (?) order phase decoding processing to be performed by accessing data elements from memory bank locations sequentially.
Type:
Application
Filed:
June 7, 2007
Publication date:
May 15, 2008
Applicant:
Broadcom Corporation, a California Corporation
Abstract: A wireless network infrastructure that adapts between single and concurrent interfering transmissions and receptions based on dynamically varying channel conditions. The channel conditions variations are typically determined by the number of associated wireless end point devices within the cell, their capabilities, anticipated bandwidth usage, QOS (Quality Of Service) demands, priority of service, idle states, cell overlap interferences, near-far interferences, and noises. The wireless network infrastructure supports a plurality of end point devices and contains an access point. The access point defines at least one first portion of a frame wherein transmissions and receptions are limited to single transmissions and receptions, and at least one second portion of the frame wherein concurrent interfering transmissions and receptions are permitted.
Type:
Application
Filed:
December 18, 2006
Publication date:
May 15, 2008
Applicant:
Broadcom Corporation, a California Corporation
Abstract: A wireless network infrastructure that adapts frame parameters of concurrent interfering and MIMO transmission and receptions in response to dynamically varying channel conditions. The channel conditions are determined by number of associated wireless end point devices within a cell, their capabilities, anticipated bandwidth usage, QOS (Quality Of Service) demands, priority of service and idle states, cell overlap interferences, near-far interferences and noises. The wireless network infrastructure consists of an access point that is adapted to transmit concurrent interfering transmissions, using a multiple input/multiple output scheme. The access point responds to the dynamically varying channel conditions by adapting the frame parameters of the concurrent interfering transmissions and parameters of multiple input/multiple output schemes.
Type:
Application
Filed:
December 18, 2006
Publication date:
May 15, 2008
Applicant:
Broadcom Corporation, a California Corporation
Abstract: A network monitor includes means for monitoring downstream traffic from a cable modem termination system (CMTS) to a cable modem (CM), means for monitoring upstream traffic from the CM to the CMTS, and means for identifying a data format used by the CMTS and the CM for bi-directional communication.
Type:
Grant
Filed:
May 19, 2003
Date of Patent:
May 13, 2008
Assignee:
Broadcom Corporation
Inventors:
Joel Danzig, Paul Burrell, Shane Tow, Robert J. Hebert, David R. Dworkin, Harold R. Whitehead, Richard Protus, Rennie Gardner, Fred Bunn, David B. Mixson, Vincent Patrick Assini, Taruna Tjahjadi
Abstract: A system and method for synchronizing sub-carriers in a signal processing system. Various aspects of the present invention may comprise method steps and structure that receive a sampled signal. Various aspects may produce a synchronization signal based on the sampled signal. Various aspects may generate and store a cropped version of the received sampled signal. Various aspects may read a cropped sampled signal from memory that corresponds to the received sampled signal. Various aspects may generate a restored sampled signal by adding samples to the cropped sampled signal read from memory. Various aspects may, based on the synchronization signal, output the restored sampled signal coarsely synchronized to the received sampled signal. Various aspects may determine a phase difference between the output restored sampled signal and the output received sub-carrier. Various aspects may adjust the phase of the restored sampled signal in response to the determined phase difference.
Type:
Grant
Filed:
March 5, 2004
Date of Patent:
May 13, 2008
Assignee:
Broadcom Corporation
Inventors:
Alexander G. MacInnis, Aleksandr Movshovich, Brad Delanghe, Ramkumar Prakasam
Abstract: A high output power radio frequency integrated circuit (RFIC) includes an up-conversion module, a plurality of power amplifier input stages, and a plurality of integrated circuit pads. The up-conversion module is coupled to convert a low intermediate frequency (IF) signal into a radio frequency (RF) signal. The plurality of power amplifier input stages is coupled to receive the RF signal and to produce separate RF pre-amp signals. Each of the plurality of integrated circuit pads is coupled to a corresponding one of the plurality of power amplifier input stages and to provide the separate RF pre-amp signals external to the RFIC.
Abstract: A Wireless Local Area Network (WLAN) is operated in conjunction with a wired Local Area Network (wired LAN) to service a premises, e.g., a campus setting. The wired LAN services the wired communication needs of the premises and serves as the wired backbone of the WLAN. A plurality of Wireless Access Points (WAPs) of the WLAN couple to the wired backbone and are serviced by the LAN. With this shared structure, wired network components, e.g., multi-layer switches, manage the operation of WLAN components, i.e., WAPs. Such management includes ensuring that the WAPs provide sufficient bandwidth to support wireless packetized voice communications. Additional management operations include WAP access, wireless terminal registration, and channel resource allocation, among others.
Abstract: An RF transmitter includes a digital processor that includes a time shift signal determination block that produces a time shift signal based upon a bleed over power level in an adjacent channel resulting from downstream phase and magnitude mismatch of a primary signal. In one embodiment, the time shift signal determination block includes logic and circuitry for determining a power ratio for a primary signal between a bleed over power level in an adjacent channel and the primary channel. The time shift signal determination block produces the time shift signal to a time shift block that is operably coupled to receive one of an envelope magnitude component and a phase component from a digital signal generation block, wherein the time shift block generates a time shift in at least one of the envelope signal path and the phase signal path based upon the time shift signal.
Abstract: An integrated packet bit error rate tester includes a packet transmit circuit that has a first memory for storing transmit packet data and is connectable to a channel under test. A packet receive circuit includes a second memory for storing received packet data and is connectable to the channel under test. An interface is used for programming the packet transmit and packet receive circuits. The packet transmit circuit can generate an arbitrary 10G SERDES packet in response to commands from the interface. The packet receive circuit can determine a bit error rate of the channel under test. The second memory can capture received packet data upon any one of (a) after a pre-programmed pattern is detected, (b) after a pre-programmed pattern is lost, and (c) after an error is detected.
Abstract: Presented herein are systems and methods for global positioning system based secure access. A request for access to a computer network is received. A determination is made whether a mobile terminal is within a predetermined location. If the mobile terminal is within the predetermined location, access is granted. If the mobile terminal is outside of the predetermined location, access to the computer network is denied.
Abstract: Techniques are disclosed for providing system manageability for computing systems operating under OS-absent conditions. In particular, techniques are disclosed for providing fully functional system management capabilities even when the primary power source for the computing system is disabled. One aspect of the invention relates to a power supply control that facilitates the realization of low power consumption integrated circuit systems. Another aspect of the invention relates to providing fully functional ASF support when operating on auxiliary power. In one embodiment, this is implemented in a local bus adapter/controller that integrates network communication, management, and support features.
Type:
Grant
Filed:
April 24, 2002
Date of Patent:
May 13, 2008
Assignee:
Broadcom Corporation
Inventors:
Andrew S. Hwang, Andrew M. Naylor, Steven B. Lindsay, Habib Anthony Abouhossein, Scott Sterling McDaniel
Abstract: A radio receiver includes a single analog to digital converter, a 1st digital mixing module, and a 2nd digital mixing module. The single analog to digital converter is coupled to convert the filtered IF signal into a digital IF signal, which includes information regarding an in-phase component and a quadrature component of a modulated RF signal. The 1st and 2nd mixing modules each receive the digital IF signal and mix the digital IF signal with an in-phase and quadrature digital local oscillation to produce a 1st baseband signal component and a 2nd baseband signal component.
Abstract: A method of parameter estimation in a shared channel communications system includes the steps of receiving a preamble including a first sequence corresponding to a sequence having zero autocorrelation, a second sequence having zero autocorrelation, and a third sequence having zero autocorrelation, performing a coarse carrier frequency estimate based on the first sequence, and performing a fine carrier frequency estimate based on the second and third sequences.
Type:
Application
Filed:
January 4, 2008
Publication date:
May 8, 2008
Applicant:
Broadcom Corporation
Inventors:
Jonathan Min, Fang Lu, Bruce Currivan, Tom Kwon
Abstract: A method for packaging an integrated circuit. A barrier metal pattern is disposed on a baseplate. A conductive layer is disposed on the barrier metal pattern. A photoresist having a pattern is applied to the conductive layer. A via is then disposed on the conductive layer. An integrated circuit is coupled to the via and encapsulated. Then, at least a part of the baseplate is removed. An integrated circuit package is produced by the method.
Abstract: A method to detect the presence of battery protection circuits in any battery powered product. The major advantage of the method is to make the battery voltage very smooth during the charging process. The proposed circuit can give a good prediction of protection switching turn on time. This can provide the battery powered system work smoothly by avoiding any battery voltage discontinuity. The proposed invention addresses the issue of deep discharge and provides a solution through a discharge test procedure.
Abstract: A system for encrypting and decrypting data formed of a number of bytes using the ARCFOUR encryption algorithm is disclosed. The system includes a system bus and an encryption accelerator arranged to execute the encryption algorithm coupled to the system bus. A system memory coupled to the system bus arranged to store a secret key array associated with the data and a central processing unit coupled to the system bus wherein encryption accelerator uses substantially no central processing unit resources to execute the encryption algorithm.
Abstract: A high-speed bit stream interface module interfaces a high-speed communication media to a communication Application Specific Integrated Circuit (ASIC) via a Printed Circuit Board (PCB). The high-speed bit stream interface includes a line side interface, a board side interface, and a signal conditioning circuit. The signal conditioning circuit services each of an RX path and a TX path and includes a limiting amplifier and a clock and data recovery circuit. The signal conditioning circuit may also include an equalizer and/or an output pre-emphasis circuit. The limiting amplifier applies respective gains to the RX path and to the TX path that are based upon respective dynamic ranges of the incoming signals.