Abstract: An apparatus and method for a low voltage drop and thermally enhanced integrated circuit (IC) package are described. A substantially planar substrate having a plurality of contact pads on a first surface is electrically connected through the substrate to a plurality of solder ball pads on a second surface of the substrate. An IC die having a first surface is mounted to the first surface of the substrate. The IC die has a plurality of I/O pads electrically connected to the plurality of contact pads on the first surface of the substrate. A heat sink assembly is coupled to a second surface of the IC die and to a first contact pad on the first surface of the substrate to provide a thermal path from the IC die to the first surface of the substrate. The heat sink assembly can also provide an electrical path from the IC die to the first surface of the substrate. The heat sink assembly may have one or two heat sink elements to provide thermal and/or electrical connectivity between the IC die and the substrate.

Abstract: A primary multi-layer protocol stack that allows a secondary multi-layer protocol stack to communicatively couple into one or more of its layers. End point device circuitry implements both the primary and secondary protocol stacks. A communication application running on the end point device initiates interaction, e.g., a session, via a primary radio and primary intermediate protocol stack layers. Based on a change in communication characteristics, for example, an operation is invoked to bridge between one of the intermediate protocol stack layers of the primary stack to one from the secondary stack. Such bridging establishes a secondary pathway via the secondary radio. The primary and secondary radios may support the same or differing protocols. To avoid having to fully reestablish a session, at least one session parameter is carried forward through the bridge. The bridge may have multiple entry points in and out of both protocol stacks and operate as two half-duplex bridges.

Abstract: An integrated circuit radio transceiver and method therefor is operable to flexibly and efficiently de-interleave a received communication signal by initially changing a received signal from the time domain to the frequency domain to generate a plurality of tones that are then rearranged in a first de-interleaving step to an order expected by a downstream decoder. Thereafter, the tones are detected to generate a soft bit sequence and are then reverse-swizzled and de-interleaved. The de-interleaving step is performed in a manner that compensates for row/column offset interleaving performed by a transmitter that transmitted the received signal being processed.

Abstract: End-point devices, access points and other types of network nodes each employ multi-path management software to manage communication via multiple possible paths to the Internet backbone from communication applications that run on an end-point device. The multi-path management software on an end-point device may operate independently and/or cooperate with the local communication applications and the multi-path management software located on the access points or other network nodes to select one or more pathways for the local communication applications. The multi-path management software depending on data types and data requirements also supports selection and maintenance of two or more paths that simultaneously serve a single communication application. The multi-path management software of an end-point device may pass all or a portion of multi-path management responsibility to a local communication application and/or to multi-path management software of another network node.

Abstract: An end-point device comprises multiple communication transceivers via which the end-point device associates with multiple access points. The multiple access points may belong to packet switched data networks that are communicatively incompatible. Each of the associated access points contributes a separate pathway for flow of data packets between the end-point device and a backbone network that communicatively connects all associated access points. Each of the associated access points receives and stores unique network addresses assigned to the end-point device by the associated access points and information corresponding to the associated pathways in respective memories. Each of the associated access points delivers data packets directly to the end-point device and/or indirectly via the backbone network and one of the remaining associated access points.

Abstract: A number of features for enhancing the performance of a communication system, in which data is transmitted between a base station and a plurality of subscriber stations located different distances from the base station, are presented. The power transmission level, slot timing, and equalization of the subscriber stations are set by a ranging process. Data is transmitted by the subscriber stations in fragmented form. Various measures are taken to make transmission from the subscriber stations robust. The uplink data transmission is controlled to permit multiple access from the subscriber stations.

Abstract: A communication infrastructure, that allows communication pathways to be analyzed and controlled. It consists of packet switched, circuit switched networks, access points, and nodes of which provide sub-pathway characteristics information to end-point devices, when requested. The end-point devices may be PSTN or Internet telephones, personal computers, servers etc., and in accordance with the present invention, send test packets to a destination end-point device, via communication infrastructure, retrieve echo response containing diverging sub-pathway characteristics and analyze the retrieved information. Based upon the analysis of communication pathways, the end-point devices select one or more communication pathways for voice or data packets exchange, automatically or manually based upon user input via user interfaces. Once one or more communication pathways are selected, the end-point devices control the communication pathways by routing the voice or data packets along selected communication pathways.

Abstract: Aspects of the invention provide a method and system for a mixed analog-digital automatic gain control. The received analog signal is amplified by the analog amplifier and then converted to a digital value by an ADC. A clamp reference level of the converted signal is removed prior to applying a digital gain to a digital multiplied. Once the digital gain is applied, the clamp reference level is restored to the digital signal. A loop filter determines the system time response from the error between an amplitude parameter of the received signal and an AGC reference level. A gain separation circuit generates the system gain and separates it into a digital gain and an analog gain in a way to maximize the use of the analog amplifier. The analog gain is applied to the analog amplifier and the digital gain is applied to the digital multiplier.

Abstract: Disclosed herein is a method and system to reduce the area and power dissipation in digital filters or multipliers. Compared to radix-4 Booth coding the proposed method reduces the number of partial products by one, if the input signal has certain limits on its range. One exemplary application is echo cancellation in a full duplex pulse amplitude modulation system with 10 levels (PAM-10). Echo cancellation may be achieved by calculating a digital replica of the echo from the transmission channel. The replica signal may be calculated in a finite impulse response (FIR) filter, which multiplies the transmitted signal with estimates of the echo coefficients of the transmission channel. The replica signal may be subtracted from the received signal to create an echo-free receive signal. The disclosed method may reduce the number of partial products between the PAM-10 transmit signal and each echo coefficient from three, when radix-4 Booth coding is used, to two.

Abstract: A finite state machine (FSM) for a redundant array of independent disk includes a single process context that maintains an entire finite state required for input/output operations performed in a RAID system. The finite state is only updated in response to calls and call-backs. The call-backs can include procedure returns and interrupt signals. The call is received directly from an application program, and the call-backs are received from a driver and passed back directly to the application software by the finite state machine.

Abstract: A circuit for and method of operating a supply tracking clock multiplier is provided. An embodiment of the present invention may permit a less power consuming portion of an integrated circuit to operate at a relatively higher average clock rate than a more power consuming portion operating at a relatively lower clock rate, by adjusting the duration of the cycles of the higher frequency clock. The adjustment may be according to the supply voltage changes that result from logic switching activity of the more power consuming portion, and may be performed in a manner that substantially matches the delay behavior of the logic. The phase of the higher frequency clock remains locked to the lower frequency clock. An embodiment of the present invention may reduce the area and cost of an integrated circuit by minimizing the need for other on-chip power supply noise mitigation approaches, while also improving device throughput and performance.

Abstract: An integrated circuit (IC) low noise amplifier includes an on-chip balun and an on-chip differential amplifier. The on-chip balun is operably coupled to convert a single-ended signal into a differential signal. The on-chip differential amplifier is operably coupled to amplify the differential signal.

Abstract: The present invention provides for a system for operating a communication device (20) for reception of scheduled intermittent information messages (22) with a dual mode timer (70) that extends battery life. A controller (50) schedules the timer (70) to power down all idle components of the device (20) between message receptions in a power saving sleep mode to conserve battery power. During active mode when the device is fully active in reception of messages, the timer (70) uses a reference oscillator (90) with a relatively high frequency to support digital processing by the receiver (26). During sleep mode when only the timer is powered on, a much lower frequency sleep oscillator (96) is used to maintain the lowest possible level of power consumption within the timer itself. The timer (70) has provision for automatic temperature calibration to compensate for timing inaccuracies inherent to the low-power low-frequency crystal oscillator (96) used for the sleep mode.

Abstract: A current mirror with selectable filter poles provides a selected low pass filtering function to a DC bias signal generated by the current mirror. Coupled between a first MOSFET and second MOSFET of the current mirror, a low pass filter with selectable filter poles comprises a plurality of resistor-configured MOSFETs coupled to at least one capacitor-configured MOSFET to provide one of a fast settle time and improved filtering for the current mirror in one embodiment of the invention. A first resistor-configured MOSFETs, biased by logic and bias circuitry, provides a low frequency filter pole that provides an improved filtering for the current mirror. A second resistor-configured MOSFET provides a high frequency filter pole that provides a fast charge time to meet a settle time requirement.

Abstract: Optimizing a radio link is done by acquiring at least OSI layer one and two performance measurements, determining an optimum setting collection for at least OSI layer three to a top layer, then configuring at least the OSI layer three to the top layer based upon the optimum setting collection. The top layer is at least OSI layer four. The invention includes optimized radio links, methods of making optimized radio links, revenue generating making optimized radio links by providing means for optimizing the radio link.

Abstract: A filter settings generation operation includes sampling a communication channel to produce a sampled signal. The sampled signal is spectrally characterized across a frequency band of interest to produce a spectral characterization of the sampled signal. This spectral characterization may not include a signal of interest. The spectral characterization is then modified to produce a modified spectral characterization. Filter settings are then generated based upon the modified spectral characterization. Finally, the communication channel is filtered using the filter settings when the signal of interest is present on the communication channel. In modifying the spectral characterization, pluralities of spectral characteristics of the spectral characterization are independently modified to produce the modified spectral characterization. Modifications to the spectral characterization may be performed in the frequency domain and/or the time domain.

Abstract: A system for servicing data transactions within a processing device using common data paths. The system is broadly comprised of: a plurality of source agents operable to transmit a plurality of data cells; a plurality of destination agents operable to receive a plurality of data cells; a plurality of virtual channels for transporting the data cells between the source agents and the destination agents; and a switch for connecting selected pairs of source agents and destination agents for transmission of data over predetermined virtual channels.

Abstract: A first tag is assigned to a branch instruction. Dependent on the type of branch instruction, a second tag is assigned to an instruction in the branch delay slot of the branch instruction. If the branch is mispredicted, the first tag is broadcast to pipeline stages that may have speculative instructions, and the first tag is compared to tags in the pipeline stages to determine which instructions to cancel. The assignment of tags for a fetch group of concurrently fetched instructions may be performed in parallel. A plurality of branch sequence numbers may be generated, and one of the plurality may be selected for each instruction responsive to the cumulative number of branch instructions preceding that instruction within the fetch group. The selection may be further responsive to whether or not the instruction is in a conditional delay slot.

Abstract: A system for adding multiple sets of numbers via a fixed-width adder includes an adder for receiving each of the sets of binary numbers at corresponding sets of adder inputs, and for generating a sum of each set of binary numbers. Each set of numbers defines a distinct data path through the adder. For each set of numbers, the system further includes a logic gate for inhibiting a carry path, from each portion of the adder corresponding to each carry path, to a next adjacent carry path. The system isolates two or more contiguous data paths through the fixed-width adder corresponding to each of the two or more sets of two binary numbers. The invention prevents unwanted signals from crossing summing lane boundaries in different processing modes. The same adder logic can thus be used for each processing mode by varying the combination of mode select control signals.

Abstract: A block encoder flexibly encodes K codes to produce an encoded data block. The block encoder receives an unformatted block of 10 Gigabit Media Independent Interface (XGMII) data. The unformatted block of data includes data and/or K characters, both of which can be located in any position of the unformatted block. The block encoder inserts data characters into a first set of slots of the encoded data block. The block encoder encodes K characters to produce corresponding encoded K characters. Each encoded K character includes a link field, a position field and a recoded value field. The encoded K characters are inserted into a second set of slots of the encoded data block. A synchronization header is attached to the encoded data block to distinguish control blocks from pure data blocks. The header and encoded data block are subsequently scrambled in preparation for transmission.