Abstract: A programmable attenuator includes a resistor ladder having a plurality of taps to provide a coarse gain control. Coupled to each tap is a plurality of switches. Control logic activates or deactivates individual switches in the plurality of switches to provide a fine gain control. More specifically, a set of activated switches provides fine gain control by determining an overall attenuation level interpolated between an adjacent pair of taps.

Abstract: An integrated communications system. A substrate having a receiver disposed on the substrate for converting a received signal to an IF signal, a digital IF demodulator disposed on the substrate and coupled to the receiver for converting the IF signal to a demodulated baseband signal, and a transmitter disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.

Abstract: Iterative metric updating when decoding LDPC (Low Density Parity Check) coded signals and LDPC coded modulation signals. A novel approach is presented for updating the bit metrics employed when performing iterative decoding of LDPC coded signals. This bit metric updating is also applicable to decoding of signals that have been generated using combined LDPC coding and modulation encoding to generate LDPC coded modulation signals. In addition, the bit metric updating is also extendible to decoding of LDPC variable code rate and/or variable modulation signals whose code rate and/or modulation may vary as frequently as on a symbol by symbol basis. By ensuring that the bit metrics are updated during the various iterations of the iterative decoding processing, a higher performance can be achieved than when the bit metrics remain as fixed values during the iterative decoding processing.

Abstract: A system and method according to the present invention allow two or more peer-to-peer wireless devices to automatically connect to each other with no knowledge or pre-configuration of client/server roles. According to a first aspect of the present invention, a wireless device performs inquiries at a random interval, and performs an inquiry scan and a page scan when not performing the inquiries. Upon receiving a first device address in response to one of the inquiries, the wireless device performs a first page using the device address to establish a connection. And upon receiving an inquiry during the inquiry scan, the wireless device responds with a second device address, and if a second page is received during the page scan, establishes a connection.

Abstract: Various circuit techniques for implementing ultra high speed circuits use current-controlled CMOS (C3MOS) logic fabricated in conventional CMOS process technology. An entire family of logic elements including inverter/buffers, level shifters, NAND, NOR, XOR gates, latches, flip-flops and the like are implemented using C3MOS techniques. Optimum balance between power consumption and speed for each circuit application is achieve by combining high speed C3MOS logic with low power conventional CMOS logic. The combined C3MOS/CMOS logic allows greater integration of circuits such as high speed transceivers used in fiber optic communication systems.

Abstract: A communication device constructed according to the present invention detects impulse noise in a preamble sequence. In detecting impulse noise in the preamble sequence the communication device first receive a preamble sequence that includes a plurality of preamble symbols. The communication device then divides the plurality of preamble symbols by at least one known preamble symbol to produce a plurality of preamble gains and/or a plurality of preamble phases corresponding to the plurality of preamble symbols. Finally, the communication device determines, based upon the plurality of preamble gains and/or the plurality of preamble phases, that at least one preamble symbol has been adversely affected by impulse noise. The communication device may discard at least one preamble symbol that has been adversely affected by impulse noise from the plurality of preamble symbols.

Abstract: A communication device processes a preamble in the presence of impulse noise. The communication device receives a preamble sequence that includes a plurality of preamble symbols and determines that at least one preamble symbol of the plurality of preamble symbols has been adversely affected by impulse noise. Based upon this determination, the communication device masks the at least one preamble symbol of the plurality of preamble symbols to produce a subgroup of preamble symbols. Then, based upon the subgroup of preamble symbols, the communication device determines at least one of a frequency estimate for the subgroup of preamble symbols, a phase estimate for the subgroup of preamble symbols, and a gain estimate for the subgroup of preamble symbols. Based upon these estimates, the communication receiver corrects subgroup of preamble symbols and uses the result to perform channel estimation, to correct subsequently received symbols carrying data, etc.

Abstract: The invention is a balun transformer that converts a single-ended (or unbalanced) signal to a differential (or balanced) signal. The balun is a printed metal pattern on a circuit board in conjunction with several low cost chip capacitors and a low cost chip inductor. The balun transformer is a modified Marchand balun that is implemented using printed transmission lines. The balun has a plurality of coupled transmission lines to improve tolerances to variations in PC board fabrication. To make the balun compact, it is electrically lengthened through the use of capacitive loading, which reduces the required physical size. Additionally, the capacitors increase the bandwidth due to the resonant interaction between the short inductive balun and the capacitors that are placed in series with the input and the output.

Abstract: An iterative multistage detection system and method for orthogonally multiplexing K channels onto a signal processing chain using N orthogonal sequences of length N. The K channels include a first set of N channels and a second set of M channels (the M channels being separate and distinct from the N channels), where K=N+M. In a first iteration, interference from the first set of N channels imparted on the second set of M channels is removed from the multiplexed signal, thereby enabling the symbol values associated with the second set of M channels to be reliably estimated. In a second iteration, interference from the second set of M channels imparted on the first set of N channels is removed from the first set of N channels, thereby enabling the symbol values associated with the first set of N channels to be reliably estimated.

Abstract: A threshold adjustment circuit including: a current DAC for supplying or sinking a varying current; a differential pair of thin oxide transistors coupled to the DAC and coupled together at a common source node; a power supply for providing a supply voltage having a voltage level above reliability of the thin oxide transistors; and a third transistor for maintaining voltage of the common source node above a predetermined level and to disable the threshold adjustment circuit. The bulk and source of each of the differential pair thin oxide transistors is coupled to the common source node and each of the differential pair thin oxide transistors is switched by a signal to keep each of the differential pair thin oxide transistors in saturation region.

Abstract: A method for simplifying common mode feedback circuitry utilized in multi-stage operational amplifiers may comprise generating a first differential output signal by a first amplifying circuit in an amplifying stage and communicating the first differential output signal to a first output of the amplifying stage. A second amplifying circuit in the amplifying stage may generate a second differential output signal that may be communicated to a second output of the amplifying stage. The second differential output signal may be fed back to a first feedback circuit in the amplifying stage, and the first differential output signal may be fed back to a second feedback circuit in the amplifying stage. Additionally, the first and the second differential output signals may be fed back to the second feedback circuit and the first feedback circuit, respectively, in a first amplifying stage and/or any one or more of succeeding amplifying stages.

Abstract: The present invention relates to the field of (micro)computer design and architecture, and in particular to microarchitecture associated with moving data values between a (micro)processor and memory components. Particularly, the present invention relates to a computer system with an processor architecture in which register addresses are generated with more than one execution channel controlled by one central processing unit with at least one load/store unit for loading and storing data objects, and at least one cache memory associated to the processor holding data objects accessed by the processor, wherein said processor's load/store unit contains a high speed memory directly interfacing said load/store unit to the cache and directly accessible by the cache memory for implementing scatter and gather operations. The present invention improves the performance of architectures with dual ported microprocessor implementations comprising two execution pipelines capable of two load/store data transactions per cycle.

Abstract: Digital calculation of an RSSI value begins by digitally calculating a magnitude of a signal (e.g., a received RF signal or representation thereof). The process then continues by filtering the magnitude of the signal to produce a filtered magnitude signal. The process then continues by determining a coarse RSSI value of the filtered magnitude signal, wherein the coarse RSSI value indicates a sliding window of RSSI values. Once the coarse RSSI value is obtained, the process continues by determining a fine RSSI value within the sliding window of RSSI values. The process concludes by summing the fine RSSI value with the coarse RSSI value to produce a digital RSSI value.

Abstract: An on-chip impedance matching includes a transistor and a tank circuit. The transistor is operably coupled to receive an input signal. The tank circuit is operably coupled to the transistor, wherein a tap of the tank circuit provides an output of the on-chip impedance matching power amplifier, wherein the tank circuit is tuned with respect to an antenna load of the on-chip impedance matching power amplifier.

Abstract: An input buffer for use in a differential operational amplifier is disclosed that regulates current through a main input differential pair while preventing output distortion and allowing high linearity. The input buffer includes a main input transistor pair that receives a voltage input, a tail current source, and a squeezable tail current source circuit including a single-ended self-biased folded feedback loop. These are configured such that current through the main input transistor pair is maintained as the voltage input varies. The folded feedback loop includes a folding transistor and a biasing current source that biases the folding transistor. The squeezable tail current source circuit also includes a replica transistor pair, a bias transistor, and a tail transistor pair. The biasing current source and folding transistor isolate the bias transistor and tail transistor pair from a drain voltage of the replica transistor pair, preventing output distortion and allowing high linearity.

Abstract: Cancellation of interference in a communication system with application to S-CDMA. A relatively straight-forward implemented and computationally efficient approach of selecting a predetermined number of unused codes is used to perform weighted linear combination selectively with each of the input spread signals in a multiple access communication system. If desired, the predetermined number of unused codes is always the same in each implementation. Alternatively, the predetermined number of unused codes is selected from within a reordered code matrix using knowledge that is shared between the two ends of a communication system, such as between the CMs and a CMTS. While the context of an S-CDMA communication system having CMs and a CMTS is used, the solution is generally applicable to any communication system that seeks to cancel narrowband interference. Several embodiments are also described that show the generic applicability of the solution across a wide variety of systems.

Abstract: Methods and apparatus are provided for performing authentication and decryption operations. A record including multiple encrypted blocks is received. An encrypted block in the record is extracted and decrypted first in order to obtain context information for performing authentication operations. Each remaining block is then decrypted and authenticated by using the available context information. Authentication operations can be performed without having to wait for the decryption of all of the blocks in the record.

Abstract: A charge pump provides charge based on a phase difference between a reference signal and a feedback signal. The relationship between the charge and the phase difference is referred to as the charge phase relationship. Charge pumps typically have a non-linear charge phase relationship. A non-linear portion of the charge phase relationship occurs about a point at which the charge and the phase difference are substantially zero. Points along charge phase relationship that represent the performance of charge pump are referred to as the charge phase characteristic of the charge pump. The charge pump includes an offset current circuit, which biases the charge pump to have a linear charge phase characteristic. For example, the charge pump is biased to have a charge phase characteristic that does not overlap with the non-linear portion of the charge phase relationship.

Abstract: A plurality of downstream channels enables communications between a CMTS and a plurality of legacy and non-legacy cable modems. A dispersion mechanism optimizes channel bonding, such that the downstream channels are interoperable with DOCSIS™-compliant, legacy cable modems. A program identifier field distinguishes between bonded and non-bonded flows. For bonded flows, a bonding group is defined to bond a set of downstream channels. The packets for each bonding group are classified into channel queues at or near a MPEG level or a packet level. To mitigate congestion and multiplexing inefficiencies, the dispersion mechanism collects real-time information to determine which channel receives the bonded packets. The dispersion mechanism includes a queue manager and a priority manager. The queue manager dynamically creates queues and allocates queue memory. The queue manager also directs the DOCSIS™ processing for each queue.

Abstract: A communication system that includes a supervisory node (e.g., a headend) and one or more remote nodes (e.g., cable modems). Packets are transmitted between the supervisory node and the one or more remote nodes via RF channels. A plurality of the RF channels are bonded, such that packets may be transmitted via any one or more of the RF channels that are bonded. Bonding may include higher-layer bonding and/or lower-layer bonding. In higher-layer bonding, the communication system further includes a forwarder and a plurality of edge modulators. Each edge modulator is connected to a different RF channel or group of RF channels. The forwarder determines to which edge modulator one or more packets or flows are to be transmitted. In lower-layer bonding, a packet is split into pieces. The pieces are assigned to respective RF channels that are associated with an edge modulator for transmission to a remote node.