Abstract: Aspects for measuring receiver mixer IQ mismatch in a transceiver are described. The measuring includes providing a training signal for a receiver mixer, the training signal having periodic, uncorrelated I and Q signals. A phase mismatch in the receiver mixer is determined from IQ correlation over a unit period. A gain mismatch in the receiver mixer is determined from a power estimate of both I and Q signal for the unit period.

Abstract: Training signals can be chosen based on stored prior connection information to reduce the use of extra tones in transmitted training signals and thereby improve receiver performance. By choosing training signals based on the stored prior connection information, it is possible to make the training signals indirectly a function of the loop impairments. One advantage of this scheme is that we can choose to omit certain tones in the training signals, based on previous connection information, on a loop-by-loop basis. For example, in an ADSL Transceiver Unit-Central office end (ATU-C) device, per-local-loop prior connection information may be employed to select DMT tones to be included in downstream training signals. Similarly, in an ADSL Transceiver Unit-Remote terminal end (ATU-R) device, prior connection information may be employed to select DMT tones to be included in upstream training signals.

Abstract: A method and apparatus for providing local control of processing elements in a network of multiple context processing elements (MCPEs). A MCPE stores configuration memory contexts and maintains data of a current configuration. State information is received from at least one other MCPE. A configuration control signal is generated in response to the state information and current configuration data. A MCPE is selected in response to the configuration control signal to control the MCPE. Each MCPE in the networked array has an assigned physical and virtual identification. Data comprising control data, configuration data, an address mask, and a destination identification is transmitted to a MCPE. The transmitted address mask is applied to either a physical or a virtual identification, and to a destination identification. The masked physical or virtual identification is compared to the masked destination identification.

Abstract: A signal strength indicator circuit including a set of rectifiers. The set of rectifiers include an asymmetric switching pair of rectifiers that may be configured to provide an output signal that is inversely proportional to an input signal obtained from a device in a telecommunications system. The pair may be connected directly on one side thereof to a power supply and may be connected on another side thereof to the power supply through a resistor. Also, a method of processing a signal received by a signal strength indicator circuit.

Abstract: Parallel concatenated turbo trellis encoder structure. A dual path turbo trellis coded modulation encoder employs two interleavers and two constituent encoders and is also operable to encode symbols whose code rate may vary on a symbol by symbol basis. In addition, each of the interleavers of the parallel concatenated turbo trellis encoder structure may perform modified interleaving where input bits are treated differently depending on the order in which they are received. This interleaving may be differentiated on a bit level. In some embodiments, the implementation of the parallel concatenated turbo trellis encoder structure ensures that the output order of encoded symbols is the same as the order in which the input is received. This input may itself be in the form of bits and/or symbols. Alternatively, the parallel concatenated turbo trellis encoder structure may also support a scrambled ordering of the encoded output with respect to the input.

Abstract: A method for processing wireless data packets allows for processing packets allows consolidation of security processing. Security processing is performed in accordance with multiple security policies. This processing is done in a single front end processing block. Different security processes can be performed in parallel. Processing overhead is reduced by eliminating the need to redundantly check packet characteristics to assess the different security requirements imposed by security policies. Further, the present invention also substantially reduces the CPU cycles required to transport data back and forth from memory to a cryptographic coprocessor.

Abstract: An electrically and thermally enhanced die-up tape substrate ball grid array (BGA) package and die-up plastic substrate BGA package are described. A substrate that has a first surface and a second surface is provided. The stiffener has a first surface and a second surface. The second stiffener surface is attached to the first substrate surface. An IC die has a first surface and a second surface. The first IC die surface is mounted to the first stiffener surface. A plurality of solder balls is attached to the second substrate surface. In one aspect, a heat spreader is mounted to the second IC die surface. In another aspect, the stiffener is coupled to ground to act as a ground plane. In another aspect, the substrate has a window opening that exposes a portion of the second stiffener surface. The exposed portion of the second stiffener surface is configured to be coupled to a printed circuit board (PCB). In another aspect, a metal ring is attached to the first stiffener surface.

Abstract: A location tracking apparatus and method are disclosed. In one embodiment, the method comprises receiving information from each repeater indicating which packets wirelessly transmitted by a mobile station were received by each repeater including received signal strength of each of those packets, and determining location of the mobile station with respect to the repeaters based on power levels of individual wirelessly transmitted packets received at the repeaters.

Abstract: A high speed data communication system uses a single-ended bus architecture with a reference signal extracted from a differential periodic signal that is transmitted along with single-ended data. By using a periodic signal such a clock signal with approximately 50% duty cycle, a much more stable and accurate reference signal is established for receiving single-ended data.

Abstract: A transmitter includes a first mixer to generate a first output signal by up-converting a first baseband signal having a first DC offset component. A second mixer generates a second output signal by up-converting a second baseband signal having a second DC offset component. The second output signal is subtracted from the first output signal to generate a transmitter output signal. The transmitter output signal includes a local oscillator (LO) leakage signal caused by the first and/or second DC offset components. A third mixer produces a third output signal by up-converting the first DC offset component. A fourth mixer produces a fourth output signal by up-converting the second DC offset component. The fourth output signal is subtracted from the third output signal to generate a LO leakage cancellation signal. The LO leakage cancellation signal is subtracted from the transmitter output signal, thereby reducing a power of the LO leakage signal.

Abstract: A low-power programmable low-drop-out voltage regulator system and methods are presented. The regulator includes a local reference generator circuit that receives a voltage input signal and outputs a reference voltage signal, a buffer circuit that receives the reference voltage signal and outputs an output voltage signal, and a comparison device. The comparison device receives and compares the output voltage signal and an accurate reference voltage signal and outputs an adjustment signal to adjust the output voltage signal in the direction of a value of the accurate reference voltage signal. The regulator can include an attenuator circuit to attenuate the reference voltage signal. The output voltage signal can be regulated or programmed by adjusting the gain of the buffer circuit and/or the attenuator circuit. Current consumption can also be programmed by turning on or off one or more amplifier tiers located in the buffer circuit.

Abstract: The present invention relates to a mobile set integrating a memory efficient data storage system for the real time recording of voice conversations, data transmission and the like. The data recorder has the capacity to selectively choose the most relevant time frames of a conversation for recording, while discarding time frames that only occupy additional space in memory without holding any conversational data. The invention executes a series of logic steps on each signal including a voice activity detector step, frame comparison step, and sequential recording step. A mobile set having a modified architecture for performing the methods of the present invention is also disclosed.

Abstract: Provided is a system and method for a modem including one or more processing paths. Also included is a number of interconnected modules sequentially arrayed along the one or more paths. Each module is configured to (i) process signals passed along the paths in accordance with the sequence and (ii) implement predetermined functions to perform the processing. Further, each of the modules has a particular degree of functional programmability and the degrees of functional programmability monotonically vary in accordance with the sequence.

Abstract: This invention provides colored noise detection algorithm(s). This colored noise detection algorithm(s) may be implemented with a multi-branch equalizer processing module that enables interference cancellation when colored noise is associated with received radio frequency (RF) bursts. The noise discriminator identifies when the radio frequency (RF) bursts have white noise or colored noise associated with them. Alternatively the noise discriminator may be able to determine and enable interference cancellation in response to an interference-limited received RF burst as opposed to a noise-limited received RF burst. The multi-branch equalizer improves the signal-to-noise ratio by improving the equalization with a second branch operable to be trained based upon known training sequences and at least partially re-encoded data bits.

Abstract: A modem receiver 10 receives a multitone signal with a cyclic extension of M samples on a channel 20. The receiver includes a time domain equalizer 14 that includes a finite impulse response (FIR) filter. The FIR filter targets the combined response of the channel and filter to a target impulse response having N taps, where N is less than M+1.

Abstract: A network switch stack configuration includes a first network switch having a plurality of data ports, a first stacking port, and a first CPU interface. A second network switch has a plurality of data ports, a second stacking port, and a second CPU interface. A common CPU is connected to the first CPU interface and the second CPU interface, such that the first stacking port and the second stacking port are communicatively connected. Therefore incoming packets on any of the plurality of data ports on the first and second switches can be effectively switched to any of the plurality of data ports on either of the first and second network switches.

Abstract: LDPC (Low Density Parity Check) coded modulation hybrid decoding. A novel approach is presented wherein a combination of bit decoding and symbol level decoding (e.g., hybrid decoding) is performed for LDPC coded signals. Check node updating and symbol node updating are successively and alternatively performed on bit edge messages for a predetermined number of decoding iterations or until a sufficient degree of precision is achieved. The symbol node updating of the bit edge messages involves using symbol metrics corresponding to the symbol being decoded as well as the bit edge messages most recently updated by check node updating. The check node updating of the bit edge messages involves using the bit edge messages most recently updated by symbol node updating. The symbol node updating also involves computing possible soft symbol estimates for the symbol during each decoding iteration.

Abstract: A method and apparatus are provided for enabling a transmitter to have a substantially linear magnitude response and a substantially linear phase response. The transmitter includes first and second programmable gain amplifiers (PGAs). The first PGA is tuned to have a resonant frequency that is less than an operating frequency of the first PGA. The second PGA is tuned to have a resonant frequency that is greater than an operating frequency of the second PGA. A magnitude response at an output of the first PGA and a magnitude response at an output of the second PGA combine to provide a substantially linear magnitude response across a frequency range that includes the operating frequency of the first or second PGA. According to an embodiment, the first and second PGAs have the same operating frequency.

Abstract: Improved frequency drift and phase error compensation in a VOFDM receiver. The invention is operable to compensate for frequency drift and phase error within a window that may include a single frame, a sub-frame, or multiple frames. The compensation is performed after having performed estimation of the phase within the particular window; any phase error and frequency drift may be identified and an appropriate form of compensation may be identified to perform curve fitting of the phase within the compensation window. The curve fitting of the phase is performed using linear techniques in one embodiment; an average phase and appropriate slope/ramp are calculated to match the phase as accurately as possible. Other alternative compensation techniques may also be performed, including higher order curve matching techniques. The receiver is operable to perform any necessary compensation before passing the now-compensated data to a symbol processing functional block.

Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, a graphics input and an audio input simultaneously. The system may use anti-aliased text and graphics to provide high quality display of graphical elements, or glyphs, which represent an image of a character of text or graphics, on television and other displays. The graphical elements may be superimposed over live video or arbitrary graphics imagery.