Abstract: A combined sidetone and hybrid balance apparatus and method of operating same are disclosed. An embodiment of the present invention may provide both a hybrid balance mode of operation and a sidetone generation mode of operation within a single integrated circuit device. The functionality provided by an embodiment of the present invention may be used in both Internet protocol (IP)-based telephones and residential gateways, and may be incorporated within the IP telephone chip used in such devices. An embodiment of the present invention may be used to reduce processor demand and the cost of materials, permitting greater IP telephone or residential gateway functionality at lower cost.

Abstract: Provided is a system and method for performing CRC analysis in a video test bench. An exemplary system includes a memory configured for storing a required number representative of the data fields to be analyzed. A module is coupled at least indirectly to the memory and configured for (i) receiving an input data stream, (ii) performing cyclic redundancy check (CRC) analysis of the received data stream, and (iii) producing an output representative of an actual number of received data fields analyzed. The input data stream includes synchronization markers defining boundaries of each of the received data fields. Next, a comparator is configured for (i) comparing the required number and the actual number and (ii) producing a disabling signal when the actual number matches the required number.

Abstract: Circuitry to remove switches from signal paths in integrated circuit programmable gain attenuators. Programmable gain attenuators and programmable gain amplifiers commonly switch between signal levels using semi-conductor switches. Such switches may introduce non-linearities in the signal. By isolating the switches from the signal path linearity of the PGA can be improved.

Abstract: A wireless cable replacement system. A personal area network, comprising a device having a first wireless transceiver, and an adapter having a second wireless transceiver in communication with the first wireless transceiver, and a plug capable of mating to a jack coupled to a local backbone.

Abstract: A low noise amplifier includes an input transistor, an inductor, and a current sink. The input transistor includes a gate, a drain, and a source, wherein the gate of the input transistor is operably coupled to receive an input radio frequency (RF) signal. The inductor includes a first node and a second node, wherein the first node of the inductor is operably coupled to a power supply and the second node of the inductor is operably coupled to the drain of the input transistor to provide an output of the low noise amplifier. The current sink includes a first node and a second node, wherein the first node of the current sink is operably coupled to the source of the input transistor and the second node of the current sink is operably coupled to a circuit ground, wherein a real component of input impedance of the low noise amplifier is substantially constant when the low noise amplifier is in the off mode as when the low noise amplifier is in the on mode.

Abstract: The wide bandwidth transceiver includes a receiver section, a transmitter section, and a local oscillation module. The local oscillation module generates a first and a second local oscillation. The transmitter section converts an outbound baseband signal and/or a low intermediate frequency (IF) signal into a first outbound radio frequency (RF) signal based on the second local oscillation when the wide bandwidth transceiver is in a second wireless standard mode and converts the outbound baseband and/or the low IF signal into a second outbound RF signal based on the first and second local oscillations when the wide bandwidth transceiver is in a first wireless standard mode.

Abstract: A method for encoding an image of a video stream divided into macroblocks comprising determining a maximum of variance of luma blocks in a macroblock, determining if the maximum of variance exceeds a predetermined threshold, determining if the motion vectors of the macroblock are in correlation with a reference macroblock, determining if the macroblock is not an edge macroblock and setting a first quantization level for the macroblock if it meets these conditions and setting a second quantization level for the macroblock if it does not meet these conditions, where the second quantization level is greater than the first quantization level.

Abstract: A programmable transmitter generates a frame preamble to train a receiver with respect to a communication link format that corresponds to a transmission mode wherein the transmission mode may comprise transmitting the communication link over one or more antennas. Generally, the invention includes generating a preamble with an arrangement that depends upon whether a Greenfield (high data rate) or mixed mode transmission is to occur and that depends upon a number of spatial streams that are to be generated. One format for high data rate transmission includes a short training sequence, a long training sequence and a signal field. The mixed mode transmission further includes a legacy prefix.

Abstract: A system for detecting collisions in a shared communications medium, such as a TDMA medium, includes a receive path adapted to generate a first intermediate signal, a second intermediate signal, and a data symbol sequence from an input signal. A preamble detection module generates a correlation metric from the first intermediate signal. A power measurement module generates a power indication signal from the second intermediate signal. A noise measurement module generates a noise indication signal from the second intermediate signal and the data symbol sequence. A processing module is adapted to characterize the input signal as a collision for certain values of correlation metric, power indication signal, and noise indication signal.

Abstract: An inductor circuit is disclosed. The inductor circuit includes a first in-silicon inductor and a second in-silicon inductor each having multiple turns. A portion of the multiple turns of the second in-silicon inductor is formed between turns of the first in-silicon inductor. The first and second in-silicon inductors are configured such that a differential current flowing through the first in-silicon inductor and the second in-silicon inductor flows in a same direction in corresponding turns of inductors.

Abstract: Provided is a system and method for converting digital data audio data audio data that has a predetermined input sample rate, into an analog data signal. A system includes a digital to analog converter (DAC) including a digital processing portion configured to receive as an input the digital audio data and timing information, the timing information being representative of a time base of the input sample rate. The digital processing portion is similarly configured to digitally process the digital audio data and the timing information to produce serialized output data. The DAC also includes an analog processing portion configured to convert serialized data to an analog format. The digital processing portion operates in accordance with at least one clock having a corresponding clock rate wherein the corresponding clock rate is unrelated to the input sample rate.

Abstract: An imaging device includes a plurality of photo-diodes that operate as optical pixels arranged in a plurality of columns on a single CMOS substrate. The outputs of the multiple pixel sensors, or photo-diodes, are examined to determine if a one pixel, or a region of pixels are in saturation. If so, then the pixel gain is adjusted to correct or compensate for the image distortion in the region. For example, the gain of the charging amplifier or operational amplifier can be adjusted to correct for saturation. This can be done in real-time since hardware is being tuned for the correction instead of software.

Abstract: Provided is a system and method for a modem including one or more processing paths. Also included is a number of interconnected modules sequentially arrayed along the one or more paths. Each module is configured to (i) process signals passed along the paths in accordance with the sequence and (ii) implement predetermined functions to perform the processing. Further, each of the modules has a particular degree of functional programmability and the degrees of functional programmability monotonically vary in accordance with the sequence.

Abstract: The invention enables an increase in linearity of a power amplifier while reducing current consumption by supplying a bias current to the power amplifier in a Class AB mode.

Abstract: Satellite communications are carried out using the Data Over Cable Interface Specification (DOCSIS). Satellite modems are notified of upstream channel congestion by inserting a congestion notification message in a medium access protocol (MAP) message for the upstream channel. Specifically, the congestion notification message is inserted in an unused field of the MAP message, such as the explicit congestion notification (ECN) field. The MAP message can also carry other characteristics of the upstream channel, including priority threshold, multicast access burst availability, and available bandwidth.

Abstract: A switch regulator includes an inductor, a reference transistor, a first switching transistor, and a second switching transistor. The first switching transistor includes a gate electrode, a first main electrode (e.g., a source or a drain), and a second main electrode (e.g., a source or a drain). The first switching transistor is coupled in series with the inductor when it is turned on by a clock. The first main electrode (e.g., the source or the drain) of the switching transistor is connected to a ground or a fixed voltage power supply. A reference voltage may then be generated by flowing a current through the reference transistor. As such, the switch regulator contains an over-current detector that is flexible in size of current to be detected while consuming a relatively small amount of space and having substantially low cost on the overall efficiency of the switch regulator.

Abstract: A method for avoiding out-of-ordering of frames in a network, wherein the method includes the steps of providing at least one first type of queue in a network switch, providing at least one second type of queue in a network switch, and receiving an incoming packet. The method further includes first storing the incoming packet in the at least one first type of queue if the packet is from a first source, second storing the incoming packet in the at least one second type of queue if the packet is from a second source, and sending the incoming packet to a desired destination. Additionally, a method for avoiding out-of-ordering of frames in a network including the steps of receiving an incoming packet at a network switch, determining if the incoming packet is from a high speed source, first storing the incoming packet in a first type of queue, if the incoming packet is from said high speed source, and second storing the incoming packet in a second type of queue, if the incoming packet is from a lower speed source.

Abstract: Interchangeable integrated circuit building blocks include functionally equivalent integrated circuit building blocks, having similar footprints, and having one or more dissimilar features or operational characteristics. The functionally equivalent integrated circuit building blocks are interchangeable in a design layout without having to re-place and re-route. The functionally equivalent integrated circuit building blocks are optionally interchangeable on a building block by building block basis. One or more detection features are optionally included in one or more of the interchangeable integrated circuit building blocks. The detection features facilitate detection of the interchangeable integrated circuit building blocks. Area, space, and/or width design rule checks are optionally focused at junctions of detected integrated circuit building blocks.

Abstract: A communication network having at least one access point supports wireless communication among a plurality of wireless roaming devices via a first and a second wireless channel. The access point comprises a first and a second transceiver. The first and second transceivers operate on the first and second wireless channels, respectively. Each of the plurality of wireless roaming devices are capable of communicating on the first and second wireless channel. In one embodiment, the first wireless channel is used to exchange data, while the second channel is used to manage such exchanges as well as access to the first channel. In an alternate embodiment, both channels are used to support communication flow, however the first channel supports a protocol that is more deterministic than that of the second channel. Allocation of ones of the plurality of wireless roaming devices from one channel to the next may occur per direction from the access point.

Abstract: A communication network having at least one access point supports wireless communication among a plurality of wireless roaming devices via a first and a second wireless channel. The access point comprises a first and a second transceiver. The first and second transceivers operate on the first and second wireless channels, respectively. Each of the plurality of wireless roaming devices are capable of communicating on the first and second wireless channel. In one embodiment, the first wireless channel is used to exchange data, while the second channel is used to manage such exchanges as well as access to the first channel. In an alternate embodiment, both channels are used to support communication flow, however the first channel supports a protocol that is more deterministic than that of the second channel. Allocation of ones of the plurality of wireless roaming devices from one channel to the next may occur per direction from the access point.