Abstract: A transmitter includes a first amplifier to amplify an in-phase oscillator signal to produce an in-phase mixing signal and a second amplifier to amplify a quadrature-phase oscillator signal to produce a quadrature-phase mixing signal. A first mixer mixes the in-phase mixing signal with a first information signal to produce a first output signal. A second mixer mixes the quadrature-phase mixing signal with a second information signal to produce a second output signal. The first output signal and an inverted second output signal are summed to produce a transmitter output signal that includes an image signal caused by a phase imbalance between the in-phase and quadrature-phase mixing signals. An image monitor monitors the image signal and reduces or eliminates the phase imbalance by independently adjusting a phase of the in-phase mixing signal and/or a phase of the quadrature-phase mixing signal. Consequently, a power of the image signal is reduced or eliminated.

Abstract: An analog-to-digital converter (ADC) disposed in a data reception path to convert data from an analog format to a digital format is switched between two or more power modes to conserve power when data is not being received. ADC stays in a lower power-lower precision mode until an inbound data is detected, at which time the ADC switches to a higher power-higher precision mode to convert the data. Once data conversion is completed, the ADC switches back to the lower power-lower precision mode to conserve power.

Abstract: An impulse-reducing module (200) reduces random noise in video pixels by providing an impulse detector (244) and an impulse reducer, such as a median filter (250). The impulse detector (244) generates filter control signals in response to detection of impulses, and the median filter (250) generates filtered pixel values in response to the filter control signals. The control signals set the median filter to a plurality of filter operating modes.

Abstract: Multi-carrier modulation fiber optic systems constructed using a series of electrical carriers, modulating the data on the electrical carriers and combining the carriers to form a wideband signal. The wideband signal can then be intensity modulated on a laser and coupled to a fiber optic channel. A receiver may then receive the laser signal from the fiber optic channel and convert it into an electrical signal. Multi-carrier modulation may be applied to existing fiber channels, which may be of lower quality. Existing fiber channels may have characteristics which prevent or restrict the transmission of data using intensity modulation at certain frequencies. An adaptive multi-carrier modulation transmitter may characterize an existing fiber optic channel and ascertain the overall characteristics of the channel. The transmitter and receiver can then be configured to use various bandwidths and various modulations in order to match the transfer characteristic of the fiber channel.

Abstract: Disclosed herein are debugging tool(s) for profiling the frequency of execution of certain instructions in a host operation. The debugging tool causes interrupts to occur at random time intervals and records the address of the program counter at each interrupt. A profile is developed that indicates the frequency of execution of certain instructions after a statistically significant number of interrupts.

Abstract: A scaled input current is produced that substantially matches the full scale input of a CT??ADC that substantially cancels an offset bias current component of the input current. A variable bias resistance value is coupled between the integrator input and one of a supply voltage and a circuit common. The method further includes integrating the input current to produce an integrated signal representing a time averaged value of the input current to substantially remove noise from a frequency band of interest. The integrated signal is produced to a quantizer to produce a feedback current that substantially cancels a quantization noise component in the digital representation of the scaled analog signal by coupling the digital representation of the scaled analog signal to a programmable digital switch wherein the programmable digital switch either sinks current from or sources current to the integrator input.

Abstract: A single chip radio transceiver includes circuitry that enables received RF signals to be down-converted to baseband frequencies and baseband signals to be up-converted to RF signals prior to transmission without requiring conversion to an intermediate frequency. The circuitry includes a low noise amplifier, automatic frequency control circuitry for aligning the LO frequency with the frequency of the received RF signals, received signal strength indicators for adjusting frontal and rear amplification stages accordingly, and, finally, filtering circuitry to filter high and low frequency interfering signals, including DC offset.

Abstract: LDPC (Low Density Parity Check) coded modulation symbol decoding. Symbol decoding is supported by appropriately modifying an LDPC tripartite graph to eliminate the bit nodes thereby generating an LDPC bipartite graph (such that symbol nodes are appropriately mapped directly to check nodes thereby obviating the bit nodes). The edges that communicatively couple the symbol nodes to the check nodes are labeled appropriately to support symbol decoding of the LDPC coded modulation signal. The iterative decoding processing may involve updating the check nodes as well as estimating the symbol sequence and updating the symbol nodes. In some embodiments, an alternative hybrid decoding approach may be performed such that a combination of bit level and symbol level decoding is performed. This LDPC symbol decoding out-performs bit decoding only. In addition, it provides comparable or better performance of bit decoding involving iterative updating of the associated metrics.

Abstract: A method and apparatus for parallel decoding of turbo encoded data. The method includes multiple Soft In Soft Out (SISO) modules arranged in parallel such that each module supplies an input to one SISO and takes an input from another SISO data encoded for multiple parallel SISOs is received by a receiver and decoded in the abovementioned parallel configuration.

Abstract: Provided a method of reducing impedance variations in an electrical circuit structured and arranged for placement on an integrated circuit (IC) substrate. The method includes forming sets of parallel connected resistors, each set corresponding to one of the impedance devices on the IC. Each set also includes two or more parallel resistor paths, each resistor path including two or more cascaded resistors and has a total impedance value substantially equal to the predetermined impedance value of its corresponding impedance device. Finally, the method includes configuring the sets of parallel resistor paths to form an interdigital structure across the substrate when the electrical circuit is placed on the IC.

Abstract: A method and apparatus for dynamic frequency selection in a wireless communication system or network includes processing that begins when an access point determines interference on a wireless channel that is being used by the access point. When the interference exceeds an interference threshold, the access point provides a request packet to affiliated stations being serviced by the access point for channel spectrum information. The processing continues as the affiliated stations generate the channel spectrum information regarding each of the wireless channels in the wireless communication network. The processing proceeds then as the affiliated stations provide the channel spectrum information to the access point via the current wireless channel. The access point interprets the channel spectrum information to determine a desired wireless channel of the plurality of wireless channels within the wireless communication network.

Abstract: A method for feeding back transmitter beamforming information from a receiving wireless communication device to a transmitting wireless communication device includes a receiving wireless communication device receiving a preamble sequence from the transmitting wireless device. The receiving wireless device estimates a channel response based upon the preamble sequence and then determines an estimated transmitter beamforming unitary matrix based upon the channel response and a receiver beamforming unitary matrix. The receiving wireless device then decomposes the estimated transmitter beamforming unitary matrix to produce the transmitter beamforming information and then wirelessly sends the transmitter beamforming information to the transmitting wireless device.

Abstract: A system and method are used to determine connectivity and/or cable faults of a cable. A signal transmitting and receiving system is coupled to the cable. An analog-to-digital converter (ADC) coupled to the signal transmitting and receiving system. A TDR system coupled to the ADC and a memory, and a controlling system coupled to at least one of the ADC, the TDR system, and the signal receiving and transmitting system. The controlling system includes a controller and one or more state machines that are used to control the TDR system.

Abstract: An apparatus comprises a first plurality of buffers configured to store operations belonging to a first virtual channel and a control circuit coupled to the first plurality of buffers. The first virtual channel includes first operations and second operations, wherein each of the first operations depend on at least one of the second operations during use. A first number of the first operations is less than or equal to a maximum. It is ambiguous, for a first received operation in the first virtual channel, whether the first received operation is one of the first operations or the second operations. A total number of the first plurality of buffers exceeds the maximum.

Abstract: An ESD protection system providing extra headroom at an integrated circuit (IC) terminal pad. The system includes an ESD protection circuit having one or more first diodes coupled in series between the supply voltage and terminal pad, and a second diode coupled to ground. One or more third diodes are coupled in series between the terminal pad and second diode, and are configured to permit a voltage on the interconnection nodes between the one or more third diodes and second diode different from ground. The one or more third diodes include an n+ on an area of P-substrate. A deep N-well separates the area of P-substrate from a common area of P-substrate, which is coupled to ground. The allowable signal swing at the terminal pad is increased to greater than supply voltage plus 1.4 V. The ESD protection circuit is useful for, among other things, relatively low supply voltage ICs.

Abstract: A trace compression unit is included in a processor system that has a processor core and an external system memory. The trace compression unit encrypts the processor core execution history into compressed trace record that is stored in external memory using one or more control to define a storage location in external system memory for the compressed trace record. By encrypting the processor core execution history into compressed trace record that is stored in external memory, the execution history may be captured without external test equipment, and there is no need for on-chip memory to record execution history.

Abstract: The present invention provides an overflow detector for a FIFO. The FIFO includes a plurality of registers each having an input and an output, a plurality of write signals each respectively coupled to a clock, one of the plurality of registers, and a plurality of read switches each respectively coupled to an output of one of the plurality of registers, each of the plurality of read switches being controlled by a respective read signal. The overflow detector includes a plurality of clocked registers each of which is coupled to receive a write signal and its corresponding read signal, wherein each clocked register records a read signal and is clocked by the corresponding write signal.

Abstract: An apparatus provides a local oscillator signal based on a selected channel of an RF input signal. For example, the apparatus can set a frequency of the local oscillator signal based on the selected channel. Digital circuitry can be used to generate the local oscillator signal. For instance, the digital circuitry can provide a digital representation of the local oscillator signal. A DAC can convert the digital representation to an analog signal. Other circuitry can provide first and second quadrature components of the local oscillator signal, based on the analog signal.

Abstract: A system and method for increasing bandwidth usage between an access point and a wireless device are described. One embodiment can include an access point, a prioritizer, and a priority storage device. These components can increase bandwidth usage between an access point and a wireless device by allocating previously unused transmission slots.

Abstract: A programmable LED display system is disclosed. The system includes a programmable controller; a driver operative to generate a control signal in response to a signal provided by the programmable controller; and a display device operative to provide a visual representation of the state of the system in response to the control signal. The system also includes means for determining which state condition is displayed when more than one state condition exists.