Abstract: Disclosed herein is a redundant network and communication protocol at least including host computers, RF base stations, and roaming terminals. The network may utilize a polling communication protocol such that under heavy traffic conditions, a roaming terminal wishing to initiate communication may be required to determine whether the channel is clear by listening for an entire interpoll gap time. When a hidden terminal is communicating, the roaming terminal may conclude that the communication is taking place upon receiving a polling frame directed to the hidden terminal from the normally silent base station. Inherent redundancy techniques may be used with a spanning tree approach for determining the most efficient pathways from a source to a destination and ensuring that the network adapts to spatial changes or breakdowns within the network.

Abstract: A low voltage current mirror circuit (also referred to as a bias circuit) for establishing a plurality of bias voltages from an input current supplied to an input terminal of the circuit includes an input stage, a current stage connected to the input stage, a feedback stage connected to the current stage, a reference bias stage connected to the feedback stage and the current stage. The circuit establishes first and second bias voltages suitable for biasing current sources of a first type, and third and fourth bias voltages suitable for biasing current sources of a second type complementary to the first type. The bias voltages track the input current over variations in at least one of process, temperature and power supply voltage.

Abstract: System for measuring a thickness of a circuit component on a printed circuit board (PCB). The system includes a first circuit, a power plane, a power strip, a calibration strip, a temperature sensor, and a second circuit. The power plane is coupled to the first circuit. The power strip is for providing power to the power plane and is disposed in the PCB connected to the power plane. The power strip has at least two vias. The calibration strip has a predetermined width and is disposed in said PCB. The calibration strip has at least two vias for measuring a voltage drop. The temperature sensor is coupled to the calibration strip and configured to measuring a temperature of the calibration strip. The second circuit is coupled to the temperature sensor and configured to determine the thickness of the calibration strip based on at least the temperature of the calibration strip.

Abstract: A video and graphics system includes a video decoding system for processing compressed video data. The compressed video data includes MPEG-2 video data containing SDTV video data or HDTV video data. The video decoding system includes a video decoder for processing the compressed video data to generate displayable video, and a memory controller for transferring the compressed video data to and from an external memory. The video decoder requests to the memory controller to transfer the compressed video data using one of predetermined addressing patterns. The predetermined addressing patterns allow for more efficient transferring of the compressed video data to and from the external memory when compared to sequentially transferring a fixed number of data bytes starting at a fixed address. The use of the predetermined addressing patterns results in reading the compressed video data from the external memory in a predetermined order in a less number of clock cycles.

Abstract: Methods and apparatus for improving the current matching within current mirror circuits in applications such as low voltage integrated circuits. Embodiments of the present invention attempt to maintain the proper current ratio between reference and output supplies by adjusting the reference output of the current mirror. An existing reference voltage on the output side of the mirror can be used or a reference voltage can be created to be used for the voltage regulation of the reference side of the current mirror.

Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, graphics input and audio input simultaneously. A video scaling system preferably conserves memory by downscaling video prior to capturing the video in memory and upscaling video after the video is called out of memory.

Abstract: A process of sending and receiving data by a wireless device through a wireless network is disclosed. Access criteria are set for at least one of the wireless device and applications running on the wireless device. At least one query is formulated by one of the applications running on the wireless device and the query is sent over the wireless network. Data is received in response to the query, wherein the data received is based on the access criteria and the access criteria relate to an access of the wireless device to the wireless network.

Abstract: A system, method, and computer product for high-speed multiplication of binary numbers. A multiplier X is first encoded, and the encoded multiplier is then used in a multiplication process that yields the product. The encoding is performed in a manner that allows the actual multiplication process to proceed quickly. X is copied into a variable Z. Z is then manipulated to form the coded version of the multiplier. The bits of the multiplier X are read two at a time, starting with the least significant two bits. If the bit pair Xi+1Xi is equal to 11, then 1 is added to Zi+2. The process continues for successive non-overlapping pairs of bits, until the most significant three bits of X are reached. These last three bits are encoded using a table look-up process.

Abstract: Methods and apparatus for reducing precision of an input signal, by comparing a portion of the input signal to a preselected threshold value, and determining a selectable bias responsive to the comparison. By combining a portion of the input signal with the selectable bias, a reduced precision signal, having minimized or eliminated rounding error, is generated. The selectable bias corresponds to a predetermined characteristic of one of bias, an error signal, the input datum, the reduced precision datum, and a combination thereof.

Abstract: Expansion of the bandwidth of a wideband CMOS data amplifier is accomplished using various combinations of shunt peaking, series peaking, and miller capacitance cancellation. These various combinations are employed in any of the amplifier input stage, in intermediate stages, or in the last stage.

Abstract: An authentication device for authenticating a user of a wireless device within a wireless network can include a receiver configured to receive a request message from a sender to access a resource provided through a wireless network, and a fist processing unit configured to determined first signal-generated location information of the sender. The authentication device can also include a second processing unit configured to identity the sender using the first signal-generated location information, and to conform an identity of the sender, and a transmitter configured to transmit an authentication message authorizing access for the sender to access the resource.

Abstract: To synchronize a regularly occurring pulse train to the average of a bunched pulse train, an oscillator generates a plurality of differently phase shifted signals at a given frequency. One of the phase shifted signals is selected as an output signal. The output signal is compared with the bunched pulse train. The selected phase shifted signal is changed responsive to the comparison so the output signal occurs at the average frequency of the bunched pulse train. The oscillator is formed as a plurality of differential amplifier stages having equal controllable delays. The stages are connected together to form a ring oscillator. The output signal is compared with the bunched pulse train through a FIFO. A signal representative of the state of the FIFO is used as an error signal to control the selection of the phase shifted signal to be used as the output signal.

Abstract: An integrated circuit formed on a semiconductor chip, comprising a low pass filter circuit having a first resistor of a first resistance value and a capacitor of a first capacitance value, wherein the first resistance value and the first capacitance value determine a corner frequency of the filter; and a tuning circuit having a second resistor of a second resistance value, a switched-capacitor of a third resistance value and a comparator that compares two voltage signals to produce a control signal, wherein the control signal adjusts the first and second resistance values as a function of the third resistance value. The corner frequency of the filter can be adjusted by varying one or more reference voltage signals. In combination, the corner frequency of the filter is adjusted by changing the frequency of a clock that controls the switched-capacitor to decrease the circuit sensitivity.

Abstract: A sense amplifier having a sampling circuit to sample the amplifier input signal; a reference node storing a reference signal corresponding to the input signal; and a timing circuit activating the sampling circuit for a predetermined interval, and admitting the reference signal to the reference node. The sense amplifier also can include a pump capacitor substantially maintaining a value of the reference signal; and a gain circuit coupled with the reference node and disposed to adaptively adjust gain of an output signal produced by the sense amplifier. The sense amplifier can be a single-ended sense amplifier.

Abstract: A limited swing driver with a pass transistor coupled between a memory cell and an associated bitline; an inverter, its output coupled to the gate of the pass transistor, and its input coupled with the memory cell. A memory node is formed at the juncture of the inverter input and the memory cell forming a memory node. The driver also includes a discharge transistor coupled between the memory node and ground. The discharge transistor is driven by an input on the discharge transistor gate. It is preferred that the discharge transistor being programmed to produce a limited swing voltage at the memory node. It is desirable that the limited swing voltage be less than about 350 mV, and it is preferable that the limited swing voltage be between about 300 mV and about 200 mV.

Abstract: An integrated circuit includes electrical components that include one or more electrical elements on one or more dielectric layers. The electrical element has a geometric shape that exceeds prescribed integrated circuit manufacturing limits in at least one dimension. To achieve compliance with foundry rules, the electrical element is fabricated to include a non-conducting region that negligibly effects the electrical characteristics. The non-conducting region includes a hole, a series of holes, a slot and/or a series of slots spaced within the electrical element at dimensions that are less than the integrated circuit manufacturing limits.

Abstract: A complex filter such as the channel select filter in a radio transceiver is implemented using a transconductance/C topology to benefit from the ability to tune such filters and thereby stabilize the output transfer function of the filter over variations in temperature, power supply voltage and process. The topology is based on an active R/C biquadratic topology to achieve the additional benefit of independently controlled stages. The problem created by the R in the output impedance is can be overcome by separately tuning the R value along with the transconductance/C ratio, by implementing the R as a transconductance amplifier having common mode feedback, or by implementing the transconductance amplifiers of the topology using Nauta transconductors, and unbalancing the common mode circuit of the Nauta transconductor to achieve a differential resistance that can be used to implement the R in the output impedance.

Abstract: A process of controlling and monitoring a wireless hotspot by a wireless service provider is disclosed. Data is received from an access point of a wireless hotspot for wireless portable devices and is translated into wireless network data having a format intelligible by a wireless service provider. The wireless network data is sent to the wireless service provider and wireless service provider data is received from the wireless service provider. The wireless service provider data is translated into access point data having a format intelligible by the access point and the access point data is forwarded to the access point.

Abstract: A method and apparatus for coupling a voiceband modem circuit to a common phoneline connector, the common phoneline connection having a ring line connection and a tip line connection which couples a ring/tip line pair to a subscriber loop circuit, the voiceband modem circuit operating in a voiceband modem operating frequency band and having a voiceband modem interface ring line and a voiceband modem interface tip line. The voiceband modem interface ring line is coupled to the ring line and the voiceband modem interface tip line is coupled to the tip line connection by inserting, between the ring line connection and the voiceband modem interface ring line and between the tip line connection and the voiceband modem interface tip line, a series pair of inductors. A first inductor of the series pair has a low inductance and a high self-resonant frequency and a second inductor of the series pair has a high inductance and low self-resonant frequency.

Abstract: A system is provided for correcting start-up deficiencies in an amplifier. The system includes a comparing device configured to (i) receive a second circuit node voltage and a reference voltage as inputs, (ii) compare the received second circuit node voltage and the reference voltage, and (iii) produce a compensating voltage signal based upon the comparison. Next, an active device has a control terminal connected to an output port of the comparing device and is configured to receive the compensating voltage signal. The active device also includes an output terminal connected to the control terminal of the second active device, and a common terminal connected to a first circuit node. Another active device has a control terminal connected to the output port of the comparing device and is configured to receive the compensating voltage signal. The other active device also has an output terminal connected to the control terminal of the first active device, and a common terminal connected to the first circuit node.