Abstract: Apparatus, and an associated method, converts a conventional computer peripheral device, such as an I/O (input/output) subsystem into an I.sub.2 O-aware device. An IOP mounted upon a connector card is connected to a computer bus to which the conventional computer peripheral device is connected. Once connected, the IOP, together with the conventional computer peripheral device form an I.sub.2 O-aware device.

Abstract: An electronic component chassis with a first side, a second side, and having a preferred airflow therebetween. The first side of the electronic component chassis includes an insertion slot for receiving a removable component that is to be inserted into the electronic component chassis. The insertion slot is automatically closed by an airflow control door when the removable component is not housed by the electronic component chassis. By closing the insertion slot, the preferred airflow between the first side and the second side is enabled.

Abstract: A multimedia system including a PCI bus master controller for transferring concurrent and independent video and audio data streams to video and audio devices. The controller includes a video request and DMA channel, a video sub-picture request and DMA channel, an audio request and DMA channel, and a decompressed video DMA and posted request channel for independently and concurrently transferring the data streams from host memory to the devices. The host processor builds lists of request packets in system memory and asynchronously submits the request packets to the controller. The request packets include commands which the request channels execute. The commands may include spinning on status conditions in registers of the multimedia devices, writing to registers of the devices, or performing bus master transfers of multimedia data streams from system memory to the devices. The device register accesses are performed by the controller on local buses thereby reducing PCI bus traffic.

Abstract: The base housing of a notebook computer is provided with an EMI-shielded internal bay structure which is configured to removably receive a personal digital assistant (PDA) in a manner mating an electrical connector on the PDA with a corresponding electrical connector within the bay structure. The mating of the two connectors couples a battery charging circuit within the host computer device with a storage battery in the PDA, and also couples a data storage device within the host computer device with a data storage memory area within the PDA. Accordingly, the PDA battery may be charged, and data transferred from the PDA to the host computer device without the previous necessity of using a dedicated external PDA stand and associated separate data transfer and battery charging cabling.

Abstract: A method and apparatus for detecting insertion and removal of memory modules in a computer system using standard connectors is disclosed. A memory controller includes logic to read serial presence bits from memory modules incorporating such serial presence features. In response to system software the memory controller monitors a particular slot connector where a memory module is to be inserted or removed. Changes in the serial presence bits indicate insertion or removal. Each slot connector is further connectable to a memory bus for insertion and removal of memory modules while the computer system is operational.

Abstract: A transformer is provided that consists of a primary winding, a secondary winding and a magnetic core. The primary winding is wound directly around the magnetic core, thereby removing the need for a bobbin. By removing the need for the bobbin, the transformer has a large window utilization factor, and associated low profile. As a result, the transformer has a high power to form factor ratio. A method for making the transformer includes the steps of joining two halves of the core before winding the primary winding. Because the half-cores are joined prior to the wrapping of the primary winding, the core provides bobbin functionality. In addition, a header plate is provided for coupling a plurality of leads of a transformer to sources on an integrated circuit board, where the transformer consists of a magnetic core, a primary winding and a secondary winding. The header plate engages the magnetic core, providing a termination path for the wire of the secondary winding.

Abstract: A laptop computer contains a built-in modem and has a phone jack for connection to a telephone line while the computer is being operated in a stand-alone mode. A docking station into which the laptop computer may be docked allows the combined unit to be operated in a desk-top mode. The docking station may have a full-sized keyboard and display so that the laptop functions as the main computer a user may employ in the office or home. A telephone connection is already in place at the docking station so that the user need not make a phone line connection to invoke the docked mode, but instead merely nests the laptop in the docking station.

Abstract: A computer system includes one or more scroll bar sensors for scrolling up and down and left and right in a document or data displayed on the computer's display. The scroll bar sensors include capacitive touchpad sensors and are coupled to an electrical circuit. Localized capacitance charges are caused by the placement of an operator's finger on or near the sensor. These capacitance variations are processed by the electrical circuit to determine the location of the operator's finger on the scroll bar sensor. An operator can cause the computer system to display any section of a document or data by touching different portions of a scroll bar sensor. The computer system 100 also can determine relative motion of the operator's finger as the finger moves from one end of a scroll bar sensor to another end, thereby causing the computer to scroll through the document at a rate proportional to the operator's finger motion.

Abstract: Printed Circuit Board fabrication costs are decreased, and device placement densities are increased by the use of well structures designed for receiving components such as capacitors on portions of the PCB directly beneath integrated circuit packages having very low vertical profiles. With such an arrangement it is possible to use newer low profile packages and still place a capacitor under the integrated circuit package for reduced area consumption and improved inductance and circuit cycle times. Further advantages of the present arrangement include a reduction in the number of vias that need to be drilled in the PCB to make capacitor attachments, a consequent improvement in PCB inductance and parasitic capacitance, and improved electrical properties for voltage reference planes and routing layers.

Abstract: An audio power management system for a computer to eliminate noise signals associated with the power-down and power-up operations of the computer during power management operations is disclosed. The audio power management system asserts a speaker mute signal before power is removed from the amplifier to reduce transient conditions. During power up, the speaker mute signal is applied to the amplifier for a period after power is applied to the amplifier. This control is done from a single digital output.

Abstract: A lithium-ion cell charging system wherein pulse charging (with excursions above the critical voltage) is followed (once average current has fallen low enough) by charging in a linear regulator mode, using a transistor internal to a battery pack as an element of a linear regulator.

Abstract: A notebook computer has a base housing with an exterior wall area through which an insertion opening extends into an internal bay area adapted to interchangeably receive a first modular device, such as a drive unit, having a cross-sectional area substantially equal to that of the insertion opening, or a second modular device, such as a battery, having a cross-sectional area substantially smaller than that of the insertion opening. A spring-loaded door member blocks a portion of the insertion opening, leaving an unblocked portion thereof having a cross-sectional area substantially equal to that of the smaller module. Thus, when the smaller module is inserted into the bay the door remains in place to cover the portion of the insertion opening unoccupied by the inserted smaller second module. If the larger first module is inserted into the bay instead of the smaller second module, the first module pivots the spring-loaded door member inwardly into the interior of the base housing.

Abstract: A circuit for placing an external or L2 cache memory into low power mode in response to certain special cycles executed by the microprocessor. In particular, the special cycles are the stop grant acknowledge special cycle and the halt special cycle. The microprocessor executes the stop grant acknowledge special cycle in response to a request by the computer system to slow down its clock. This request is asserted by the computer system if the system has been idle for a predetermined period of time. The halt special cycle is generated by the microprocessor when a HALT instruction is executed. The stop grant acknowledge and halt special cycles place the microprocessor into a low power state. Since the microprocessor is in low power mode, the L2 cache memory is also placed into low power mode for further power conservation. The L2 cache memory is implemented either with synchronous or asynchronous static random access memories (SRAMs).

Abstract: A method for supporting multiple distributed interrupt controllers, designated as bus agents, in a symmetric multiprocessing system, which method includes the steps of assigning a unique identification number to each bus agent, receiving bus requests from the bus agents over four data lines in groups of four, and granting bus ownership to a selected one of the requesting bus agents. Similarly, a computer system that supports multiple distributed interrupt controllers, designated as bus agents, in a symmetric multiprocessing system, which computer system includes structure for assigning a unique identification number to each bus agent, four data lines for receiving bus requests from the bus agents in groups of four, and structure for granting bus ownership to a selected one of the requesting bus agents.

Abstract: When a computer system's power button is depressed a timer is begun, an operating system visible status flag is set, and an interrupt is sent to the operating system indicating power button activation. If the operating system does not clear the flag within a specified time period, the computer system is considered to be in an error (e.g., "hung" state) and the computer system is powered down.

Abstract: A system and an associated method which provides a dual interrupt mechanism to designate the occurrence and termination of an event. In a computer system employing redundant components, upon removal of a defective redundant unit within the computer system, a first interrupt is generated to signal the absence of the unit. Polling or other system monitoring of the status of the absent unit is masked or disabled, thereby eliminating unnecessary polling for the missing unit. Upon replacement of the unit, a second interrupt alerts the computer system of the event termination and cancels the polling mask.

Abstract: A computer manufacturing architecture in which a single software database feeds both direct downloading and surrogate downloading through a common network.

Abstract: A computer system includes a memory subsystem with a failover memory adapted to replace a memory module in the main memory when the main memory module fails or experiences an unacceptable level of errors. Upon the detection of the fault condition, a hot swapping of information from the module in the main memory may be accomplished to a module in an auxiliary memory. A state machine may supervise the transfer such that information which may have been written to the faulty memory during the transfer can be subsequently provided to the auxiliary memory. In this way, a fault condition can be corrected without decreasing the available system memory and without necessitating rebooting.

Abstract: A graphics device includes first and second endpoint memories where coordinates of a line can be stored. State logic within the graphics device calculates line parameters from the first and second endpoints. The calculated line parameters include a line error term which can be stored in an error term memory. The error term memory is writeable from a source external to the graphics device, such as the CPU of a computer system, so that the external source can modify the contents of the error term register.

Abstract: A method for controlling flow, through a computer hardware resource, of information to and from computer applications. When a flow of information is initiated from one of the applications, a determination is made whether the resource is being accessed by another one of the applications and, if so, the flow of information from the first application is delayed. If not, then the flow of information is enabled. When a flow of information is initiated toward the applications, a determination is made to which one of the applications the information is flowing, and the flow is directed to that one application. A graphical interface associates, in the mind of a user, a computer hardware resource with a corresponding real office device, the computer resource enabling the computer to function like the consumer device.