Abstract: A phase rotator for a Cartesian feedback power amplifier in a transmitter final stage contains an integrated voltage controlled tunable resonant circuit accomplishing band-pass filtering at a center frequency selected by local oscillator (LO) coarse trim control signals. The voltage controlled tunable resonant circuit attenuates input signal harmonic levels at large fractional bandwidths for the downconverter in the feedback LO path without setting a large number of poles in the band-pass filter. The binary-weighted course trim value for controlling the gain of the LO sets a bank of voltage-variable capacitors (VVC) in the voltage controlled tunable resonant circuit to control the center frequency in each of two 2-pole band-pass filters, creating a composite 4-pole band-pass filter at the input of a poly-phase quadrature generation circuit in the feedback LO path.

Abstract: A process of forming an electronic device can include forming a patterned oxidation-resistant layer over a semiconductor layer that overlies a substrate, and patterning the semiconductor layer to form a semiconductor island. The semiconductor island includes a first surface and a second surface opposite the first surface, and the first surface lies closer to the substrate, as compared to the second surface. The process can also include forming an oxidation-resistant material along a side of the semiconductor island or selectively depositing a semiconductor material along a side of the semiconductor island. The process can further include exposing the patterned oxidation-resistant layer and the semiconductor island to an oxygen-containing ambient, wherein a first portion of the semiconductor island along the first surface is oxidized during exposing the patterned oxidation-resistant layer, the semiconductor island, and the oxidation-resistant material to an oxygen-containing ambient.

Abstract: A control circuit for a power supply circuit that selects an appropriate power source to continuously supply power. The control circuit includes a power synthesizing circuit for generating synthesized power by synthesizing a first power supplied from a regulator and a second power supplied from a regulator, or battery power and bus power, so that each circuit of the control circuit is operated by the synthesized power. Operation of the control circuit is enabled even if the supply of one power is stopped. The first switch device and the second switch device are controlled to select the appropriate power source in accordance with the currently supplied power so that power is continuously supplied.

Abstract: An integrated circuit is configured with a pin for specifying a reset configuration vector of a circuitry within the integrated circuit. The resistance value of a low cost external resistor coupled to the pin is detected and utilized to identify the configuration. Logic on the integrated circuit detects and utilizes the resistor value to index to a configuration vector in a look-up table. The integrated circuit is then configured in accordance with the indexed configuration vector.

Abstract: An input buffer circuit with hysteresis includes a first stage and a second stage. The first stage includes a resistive device to provide a resistance between two nodes of the first stage. The two nodes are responsive to a signal input. The second stage includes four series-coupled transistors. A first node is coupled to the control electrodes of two of the four transistors and the second node is coupled to the control electrodes of the other two transistors. The second stage includes a signal output. In some examples, a resistance provided by the resistive device is variable and provides the buffer circuit with hysteresis.

Abstract: A frequency modulated output of a digital locked loop (DLL) is implemented with a Johnson Counter outputting a sample clock and a synchronized digital code at a multiple of the sample clock. The digital code drives a digital-to-analog converter to generate a frequency modulated control signal. The control signal is summed with the center frequency control from the digital locked loop digital filter to provide a frequency modulated center frequency control signal to the DLL oscillator.

Abstract: An electronic device can include a transistor structure of a first conductivity type, a field isolation region, and a layer of a first stress type overlying the field isolation region. For example, the transistor structure may be a p-channel transistor structure and the first stress type may be tensile, or the transistor structure may be an n-channel transistor structure and the first stress type may be compressive. The transistor structure can include a channel region that lies within an active region. An edge of the active region includes the interface between the channel region and the field isolation region. From a top view, the layer can include an edge the lies near the edge of the active region. The positional relationship between the edges can affect carrier mobility within the channel region of the transistor structure.

Abstract: A clock generation circuit for an integrated circuit device, such as an SOC, has increased test coverage. The clock generation circuit includes first and second latches that receive an input clock signal at their clock inputs and a selector that receives at first and second data inputs respectively, the input clock signal and an output of the second latch circuit, which is a divided clock signal. A logic gate has a first input connected to an output of the first latch and a second input that receives a scan mode signal. The logic gate generates a selector control signal provided to the selector.

Abstract: A controller for an ignition coil, the controller comprising means for determining a rate of change of current flow through a primary winding of the ignition coil; and means for switching off current flow through the primary winding of the ignition coil as a function of the rate of change of current.

Abstract: In the field of step-down voltage conversion, it is known to regulate an output of a DC-DC converter circuit with both a Pulse Wave Modulation voltage signal or a Pulse Frequency Modulation voltage signal, depending upon a current demand made upon the DC-DC converter circuit. Typically, circuits to generate both voltage signals are provided and selection of the appropriate regulation mode is achieved by means of a pin and decision software controlling the pin. However, the use of the pin and the software is an overhead that is desirably avoided. Consequently, the present invention provides a voltage conversion apparatus comprising a signal analyser to analyse a load current signal and compare a characteristic of the load current signal to at least one predetermined criterion. Regulation by the PWM signal or the PFM signal is selected in response to the evaluation of the comparison with the at least one criterion.

Abstract: A method for designing an integrated circuit, the method includes: providing an initial definition of a boundary scan register that includes identical super-cells adapted to be connected to multiple pin types; and determining the configuration of each super-cell by providing at least one pin type indication signal to each super-cell. An integrated circuit that includes a boundary scan super-cell, the boundary scan super-cell includes first circuitry adapted to be connected to at least one type of integrated circuit pin; characterized by further including a second circuitry, connected to first circuitry, wherein the second circuitry is adapted to receive at least one pin type indication signal and in response allows the boundary scan super-cell to be connected to at least one additional type of an integrated circuit pin.

Abstract: When a semiconductor wafer bears porous dielectric materials it is still possible to perform post-via-etch cleaning of the wafer using aqueous cleaning fluids if, before and/or simultaneously with application of the aqueous cleaning fluid(s), a water-soluble organosilane or like passivation material is used to form a passivation layer on the porous dielectric material.

Abstract: A device and method for controlling a display. The method includes: receiving image data, determining backlight illumination intensity in response to an allowed image degradation level parameter and to ambient light, and determining a display refresh parameter in response to a temperature parameter. A method and device for controlling a display, the device includes: a frame buffer adapted to receive image data, a processor adapted to receive a power parameter and an allowed image degradation level parameter, and an image converter that is adapted to perform a linear image conversion and a non-linear image conversion. The processor is adapted to determine which conversion to perform in response to a power parameter.

Abstract: A current driver circuit comprises circuitry having a current adjustment function and operably coupled to a current driver for providing a current to a current consuming device. The circuitry comprises or is operably coupled to a function arranged to determine a current level being drawn by the current consuming device. The current adjustment function varies an over-load limit applied to the current driver in response to a variation in the determined current level. In this manner, the current level being drawn by a current consuming device, such as a light bulb, is used to continuously or intermittently adjusting the current limit of a current driver circuit, such as a lamp driver, to minimize the energy dissipated in case of an overload condition.

Abstract: A method for power reduction, the method includes determining whether to power down the at least portion of the component in response to a relationship between an estimated power gain and an estimated power loss resulting from powering down the at least portion of the component during the low power mode, and selectively providing power to at least a portion of a component of an integrated circuit during a low power mode. A device having power reduction capabilities, the device includes power switching circuitry adapted to selectively provide power to at least a portion of a component of the device during a low power mode, and a power management circuitry adapted to determine whether to power down at least the portion of the component during a low power mode in response to a relationship between an estimated power gain and an estimated power loss resulting from powering down the at least portion of the component during the low power.

Abstract: An integrated circuit comprises a power device located on a die. The power device is operably coupled to a processing function, wherein the signal processing function is operably coupled to two or more temperature sensors. A first temperature sensor is operably coupled to the power device to measure a temperature of the power device and the second temperature sensor is located, such that it measures a substantially ambient temperature related to the die. The signal processing function determines the temperature gradient therebetween. In this manner, improved reliability of the integrated circuit and power device is obtained, as the power device utilises the fact that its thermo-mechanical stress reliability strongly depends upon the temperature gradient across the die rather than the number of times it reaches an excessive temperature.

Abstract: Methods and device for transmitting a sequence of transmission bursts in a wireless device. The method includes transmitting a sequence of transmission bursts according to a transmission schedule. The method is characterized by: receiving, at a radio frequency integrated circuit, prior to a transmission of at least one transmission burst of the sequence, information representative of the timing of the transmission of the at least one transmission burst; and generating timing signals, by the radio frequency integrated circuit that implement the transmission schedule. A wireless device includes a base band integrated circuit adapted to determine a transmission schedule of a sequence of transmission bursts. The wireless device is characterized by including a radio frequency integrated circuit that is adapted receive information representative of the timing schedule and to autonomously control a transmission of the sequence of transmission bursts.

Abstract: A drive circuit arrangement for a processor device comprises a non-volatile register for recording the identities of outputs of the processor device at which a same output signal is required. Configuration circuitry employs dual pairs of switching devices to couple register locations associated with a predetermined output of the processor to buffers of outputs identified in the non-volatile register, thereby resulting in a same output signal being provided at the identified outputs as at the predetermined output.

Abstract: A correlator (140) for de-spreading a spread-spectrum signal includes a state machine (205), a frequency look-up table (207), a pseudorandom code generator (209), and a correlator structure (301 and 801). The spread-spectrum signal includes symbols, and each symbol includes a plurality of chips. The correlator structure includes a plurality of taps (309 and 809) at which a coordinate rotation digital computer (CORDIC) operation is performed to determine an offset from a nominal carrier frequency of the spread-spectrum signal and to change a phase of each chip of a received symbol, in order to correct a carrier frequency of the spread-spectrum signal while de-spreading the spread-spectrum signal.

Abstract: A current driver circuit comprises a digital circuitry having a current adjustment function and operably coupled to a current driver for providing a current to a current consuming device. The digital circuitry comprises, or is operably coupled to, a function arranged to determine a load impedance associated with the current consuming device. The current adjustment function varies a current limit applied to the current driver in response to a variation in the load impedance. In this manner, the load impedance (or temperature) of a current consuming device, such as a light bulb, is used to continuously or intermittently adjusting the current limit of a current driver circuit, such as a lamp driver, to minimize the energy dissipated in case of an overload condition.