Abstract: A Universal Serial Bus transmitter comprising a USBTXP input and a USBTXM input for receiving respective data signals, and a USBP driver and a USBM driver for applying the respective data signals to USBP and USBM wires respectively. The transmitter comprises a transmit signal generator responsive to an asserting edge of a signal at one of the USBP and USBM inputs to define a leading edge of a transmit signal (USBTXIP) and to a corresponding de-asserting edge of a signal at the other of the USBP and USBM inputs to define the subsequent trailing edge of said transmit signal (USBTXIP). Even if the duty cycles of the input signals USBTXP and USBTXM are substantially different from 50%, this does not cause unacceptable jitter of successive crossover points nor cause the crossover point voltage level to be outside the USB tolerance, centred on 50% of the voltage swings of the USBP and USBM signals.

Abstract: A treatment solution for a semiconductor wafer comprising water, a passivating reagent and a surfactant. The treatment solution is either mixed with a cleaning fluid, a rinsing fluid or a drying vapour, and is used in a cleaning apparatus employing a Marangoni dryer.

Abstract: A voltage regulator for providing a voltage regulated output to a load comprises a first loop and a second loop. The first loop comprises a first active device coupled to a first pass device and configured to provide a first, relatively high current output to the load. The second loop comprises a second active device coupled to a second pass device and configured to provide a second, relatively low current output to the load. In this manner, when the inventive concept is applied to low drop-out regulators, the provision of two independent loops reduces dramatically the quiescent current provided by the voltage regulator under low load conditions.

Abstract: A polycrystalline silicon layer is deposited on a gate dielectric and then a portion thereof is re-oxidized so as to form a thin layer of oxide between the poly-Si layer and the underlying gate dielectric. Subsequently, the poly-Si layer is converted to a fully-silicided form so as to produce a FUSI gate. The gate dielectric can be a high-k material, for example a Hf-containing material, or SION, or another non-SiO2 dielectric. The barrier oxide layer is preferably less than 1 nm thick.

Abstract: An electronic switch circuit includes an electronic switch having a first terminal, a second terminal and a third terminal, control means for applying to the first terminal a cyclic drive waveform which causes the electronic switch to conduct between the second and third terminals during a selected portion of each cycle of the waveform, operably coupled to the control means to control synchronisation of the cyclic drive waveform a detector operable to detect a change of sense of current flow at the second terminal of the electronic switch and means for monitoring and, where required, compensating for offset error of the detector. The electronic switch may beneficially be a synchronous rectifier. The synchronous rectifier may be used in DC-DC power converters to improve efficiency. Also described is a DC-DC power converter, which includes the electronic switch in the form of a synchronous rectifier together with a further electronic switch.

Abstract: A modulator (10) and method provides a programmable phase rotation for supporting different modulation formats and different phase rotations. The modulator (10) includes a programmable symbol counter (32) and symbol phase rotation logic (31) operatively responsive to programmable phase rotation size data (36) and programmable counter size data (30). The modulator (10) can be used to communicate with different modulation formats employing different phase rotation conventions as used in different communication systems. The symbol phase rotation logic (31) produces rotated in-phase data (20) and rotated quadrature data (22) in response to receiving at least received symbol data (24), programmable phase rotation size data (36), and symbol count data (32) based on programmable counter size data (30). According to another embodiment, the phase rotations of the modulator (10) may be dynamically selectable such that the phase rotations may be selected to accommodate changes in channel characteristics in real time.

Abstract: A method for cleaning a metal plating tank is provided herein. In accordance with the method, the tank is exposed to a first acid (103), after which the tank is exposed to a second acid in the presence of a first oxidizing agent (107).

Abstract: A method for making a semiconductor device, comprising (a) providing a structure comprising a gate electrode (207) disposed on a substrate (203); (b) creating first (213) and second (214) pre-amorphization implant regions in the substrate such that the first and second pre-amorphization implant regions are asymmetrically disposed with respect to said gate electrode; (c) creating first (219) and second (220) spacer structures adjacent to first and second sides of the gate electrode, wherein the first and second spacer structures overlap the first and second pre-amorphization implant regions; and (d) creating source (217) and drain (218) regions in the substrate adjacent, respectively, to the first and second spacer structures.

Abstract: An overtone crystal oscillator including a crystal, multiple amplifiers and an RC network. The crystal has a fundamental resonance frequency and at least one overtone resonance frequency. The amplifiers are coupled in series between terminals of the crystal and the RC network is coupled to the amplifiers. The amplifiers and the RC network are collectively configured to suppress oscillation of the crystal at the fundamental resonance frequency and to enable oscillation at an overtone resonance frequency of the crystal. The amplifiers and the RC network may be configured to cause a phase shift between the fundamental resonance frequency and the overtone resonance frequency. The overtone resonance frequency may be any odd harmonic of the fundamental frequency, such as a third overtone of the crystal. The overtone crystal oscillator may be integrated with CMOS processes and does not require an inductor to suppress the fundamental mode of oscillation.

Abstract: An electronic assembly (98) includes a substrate (20), a capacitor having first and second conductors (38,54) formed over the substrate, a first set of conductive members (76) formed over the substrate and being electrically connected to the first conductor of the capacitor, and a second set of conductive members (78) formed over the substrate and being electrically connected to the second conductor of the capacitor.

Abstract: A system and method is provided for predicting an imbalance condition in a rotating device. The rotational imbalance prediction system (100) includes an accelerometer assembly (104), including at least one accelerometer (304), and a processor (306). The at least one accelerometer (304) provides acceleration measurements to the processor (306), the measurements describing the current acceleration of an orbit of the rotational device (102). The processor (306) receives the acceleration measurements and calculates an average radius of the orbit (202) to determine if the average radius is increasing, predictive of an imbalance condition. The processor (306) generates a signal in response to the prediction of an imbalance condition and transmits the signal to a motor control (308) or a remote alarm module (302). The system and method provides for countermeasures to be taken in response to the prediction of an imbalance condition, thereby eliminating the imbalance condition.

Abstract: An overtone crystal oscillator automatic calibration system including an overtone crystal oscillator with multiple programmable resistors and multiple amplifiers with supply voltage inputs and a calibration system. The calibration system adjusts the programmable resistors and the supply voltage inputs and detects oscillation of the overtone crystal oscillator. The calibration system adjusts the programmable resistors and the supply voltage input for each of multiple sequential steps to adjust the frequency bandwidth, such as from a higher bandwidth and lower gain to a lower bandwidth at higher gain. For example, each resistance level is tested for each of multiple supply voltage levels. The range of resistances and voltages is designed to ensure oscillation at a selected overtone frequency while avoiding oscillation at a fundamental frequency of the oscillator crystal. Oscillation may be detected by a counter which counts to a predetermined count value indicating successful oscillation.

Abstract: A method includes performing a search method to determine a pair of receiver path correction signals, performing the search method to determine a pair of transmitter path correction signals, and using the pairs of receiver path and transmitter path correction signals to suppress a carrier signal. An apparatus includes a first pair of summers, an upconverter circuit coupled to the first pair of summers, a multiplexer coupled to the upconverter circuit, to a ground, and to an RF front end, a downconverter circuit coupled to the multiplexer, a second pair of summers coupled to the downconverter circuit, and a correction circuit coupled to the first and second pairs of summers.

Abstract: A method and an apparatus for controlling voltage level and clock signal frequency supplied to a system.

Abstract: A processing system and method performs allocation of memory cache lines in response to a cache write miss. A processor receives a plurality of data processing instructions. A first store instruction for storing data in a system memory at a predetermined address is decoded by decoding a first specifier within the first store instruction. The first specifier determines an allocation policy for the first store instruction wherein the allocation policy determines whether to store data within the cache when the predetermined address is not within the cache. Additional store instructions are decoded. For example, a second specifier determines an allocation policy for a second store instruction. The specifier in each of the store instructions may be implemented in various forms to provide a policy indicator for each store instruction. No allocation policy may also be established on a per-access basis.

Abstract: A method, computer program product, and data processing system for minimizing the number of test sequences needed to achieve a desired level of coverage of events in testing a semiconductor design is disclosed. Test patterns are randomly generated by one or more “frontend” computers. Results from applying these patterns to the design under test are transmitted to a “backend” computer for processing. A determination is made as to which test sequences trigger events not already triggered by previously-considered test sequences. An autograde data structure is generated which further reduces the number of test sequences. A preferred embodiment of the present invention may be used to reduce the number of test sequences required, but may also be used to provide test engineers a basis for devising manually-created test sequences to test related events.

Abstract: An ultra wide bandwidth, high speed, spread spectrum communications system uses short wavelets of electromagnetic energy to transmit information through objects such as walls or earth. The communication system uses baseband codes formed from time shifted and inverted wavelets to encode data on a RF signal. The combination of short duration wavelets and encoding techniques are used to spread the signal energy over an ultra wide frequency band such that the energy is not concentrated in any particular narrow band and is not detected by conventional narrow band receivers so it does not interfere with those communication systems. The use of pulse codes composed of time shifted and inverted wavelets gives the system according to the present invention a spatial resolution on the order of 1 foot which is sufficient to minimize the negative effects of multipath interference and permit time domain rake processing.

Abstract: A method (700, 1100) and apparatus (300) are provided in a receiver for applying a variable gain to a received signal including a transmitted codeword in accordance with an Ultra Wideband (UWB) protocol. A first signal is generated and input to a selectable gain stage including a series of selectable 0 dB and 9 dB gain elements (302-305). The first signal includes the received signal mixed with a local oscillator signal modified according to a reference codeword. A gain value is selected from the selectable gain stage to amplify the first signal and form a second signal. An output signal is generated by combining the second signal and the modified local oscillator signal.

Abstract: An electronic device can include a layer of discontinuous storage elements. A dielectric layer overlying the discontinuous storage elements can be substantially hydrogen-free. A process of forming the electronic device can include forming a layer including silicon over the discontinuous storage elements. In one embodiment, the process includes oxidizing at least substantially all of the layer. In another embodiment, the process includes forming the layer using a substantially hydrogen-free silicon precursor material and oxidizing at least substantially all of the layer.

Abstract: In some embodiments a method of forming a gold-aluminum electrical interconnect is described. The method may include interposing a diffusion retardant layer between the gold and the aluminum (1002), the diffusion retardant layer including regions containing and regions substantially devoid of a diffusion retardant material; bringing into contact the diffusion retardant layer, the gold, and the aluminum (1004); forming alloys of gold and the diffusion retardant material in regions containing the material (1006) and forming gold-aluminum intermetallic compounds in regions substantially devoid of the material (1008); and forming a continuous electrically conducting path between the aluminum and the gold (1010). In some embodiments, a structure useful in a gold-aluminum interconnect is provided.