Abstract: A high density, low power, high performance information system, method and apparatus are described in which a laser source (213) on a first die (210) generates a source light beam of unmodulated monochromatic coherent light (281) for distribution via optical beam routing structures (e.g., 214/214a, 224/224a, 234/234a) to a plurality of receiving die (220, 230), each of which includes its own modulator (e.g., 223, 233) for optically receiving at least a portion of the source light beam (281a, 281b) from the first die and generating therefrom an output source light beam of modulated monochromatic coherent light (291, 292) which is encoded at said modulator in response to electrical signal information.

Abstract: A BASK demodulator includes a signal modifying circuit and a low pass filter (LPF) that couples an amplifier to an output of the modifying circuit. The modifying circuit includes a signal scaling circuit, a rectifying circuit and an AC coupling circuit. A signal shaping circuit couples an output of the amplifier to an output of the demodulator. The signal scaling circuit scales an input BASK modulated signal to provide an unclipped scaled and biased alternating signal that alternates about a bias voltage at a minimum carrier frequency. The rectifying circuit rectifies the unclipped signal to provide a partially rectified signal that is decoupled by the AC coupling circuit to provide a clipped scaled and biased alternating signal. The LPF removes the signal from the clipped scaled and biased alternating signal to provide a demodulated signal, which then is amplified by the amplifier and shaped by the shaping circuit.

Abstract: A high density, low power, high performance information system, method and apparatus are described in which perpendicularly oriented processor and memory die stacks (130, 140, 150, 160, 170) include integrated deflectable MEMS optical beam waveguides (e.g., 190) at each die edge to provide optical communications (182-185) in and between die stacks by supplying deflection voltages to a plurality of deflection electrodes (195-197) positioned on and around each MEMS optical beam waveguide (193-194) to provide two-dimensional alignment and controlled feedback to adjust beam alignment and establish optical communication links between die stacks.

Abstract: A semiconductor device comprising a substrate, a power bus, a heat source circuit, a heat sensitive circuit, and a plurality of electrically and thermally conductive through-silicon-vias (TSVs) in the substrate. The TSVs are electrically coupled to the power bus and positioned between the heat source circuit and the heat sensitive circuit to absorb heat from the heat source circuit.

Abstract: Embodiments of methods of provisioning an electronic circuit enable security of sensitive data in a design and manufacturing process that includes multiple parties. In an illustrative embodiment, a method of provisioning an electronic circuit includes generating at least one secret value, embedding the at least one secret value into the electronic circuit, programming into the electronic circuit a private key derivation function that derives the private key from the at least one secret value and a trust anchor, and programming into the electronic circuit a public key generation function that generates a public key matching the private key. The method can further include receiving for execution trust anchor-authenticated logic that contacts a predetermined actor of the plurality of distinct actors and communicates to the predetermined actor a message signed with the private key.

Abstract: Transactions in a multi-component system have corresponding local identifiers uniquely identifying the transaction among transactions within a particular functional block of the device under test. For each transaction, it is determined whether the transaction is a new request, a handshake request corresponding to a previously generated request, or a response. In response to determining that a transaction of the plurality of transactions is a new request, a global identifier is assigned to the new request which uniquely identifies the new request among new requests of all functional blocks of the device under test. A global entry corresponding to the new request is stored that includes the global identifier of the new request, an indicator of a functional block of the device under test which generated the new request, and a local identifier uniquely identifying the new request within the first functional block.

Abstract: An assembly (20) includes a MEMS die (22) having a pressure transducer device (40) formed on a substrate (44) and a cap layer (38). A packaging process (74) entails forming the device (40) on the substrate, creating an aperture (70) through a back side (58) of the substrate underlying a diaphragm (46) of the device (40), and coupling a cap layer (38) to the front side of the substrate overlying the device. A trench (54) is produced extending through both the cap layer and the substrate, and the trench surrounds a cantilevered platform (48) at which the diaphragm resides. The MEMS die is suspended above a substrate (26) so that a clearance space (60) is formed between the cantilevered platform and the substrate. The diaphragm is exposed to an external environment (68) via the aperture, the clearance space, and an external port.

Abstract: A method of assembling a semiconductor device includes providing a substrate having an array of substrate elements linked by substrate corner elements and separated by slots extending between the corner elements. Semiconductor dies are positioned on the substrate elements. A cap, frame and contact structure is provided that has a corresponding array of caps supported by corner legs linking the caps to frame corner elements, frame elements linking the frame corner elements, and sets of electrical contact elements supported by the frame elements. The cap, frame and contact structure is fitted on the substrate with the caps extending over corresponding dies, the frame corner elements extending over the substrate corner elements, and the sets of electrical contact elements disposed in the slots. The dies are connected electrically with the electrical contact elements and the assembly is encapsulated and singulated. Singulating removes the frame elements.

Abstract: A device for providing a security breach indicative audio alert. The device includes: a security monitor adapted to detect a security breach in device and a loudspeaker, the device wherein including a secure audio alert generating hardware, adapted to participate, in response to the detection of the security breach, in a generation of a security breach indicative audio alert. The secure audio alert generating hardware is connected to an audio mixer that is adapted to mix the security breach indicative audio alert signal with audio signals generated by a software controlled audio source to provide a mixed signal. The audio mixer is further adapted to provide the mixed signal to the loudspeaker that reproduces the mixed signal as sound.

Abstract: Interfacing between radio units in a base station in a mobile communication system may use synchronized clocks. A controller device has a tracking clock circuit for generating a transmit clock, the tracking clock circuit comprising a clock input for receiving a reference clock and a sync input for receiving an external synchronization signal. A multiplying phase locked loop generates the transmit clock in dependence on the reference clock and a divider output of a controllable divider coupled to the transmit clock. A tracking loop has a phase detector coupled to the sync input and the divider output for detecting a phase error between the external synchronization signal and transmit clock, and a phase control circuit for generating a phase control signal based on the phase error, the phase control signal being coupled to a control input of the controllable divider for adapting the division function.

Abstract: Startup circuits with native transistors. In some embodiments, a startup circuit may include a first inverter configured to receive a bandgap voltage (Vbg) from a bandgap reference circuit and to produce an output voltage (VOUT), and a second inverter operably coupled to the first inverter to form a latch, the latch configured to maintain a value of VOUT, the second inverter including a native transistor, the native transistor having a gate terminal coupled to VOUT and a source terminal coupled to Vbg. In other embodiments, a method may include receiving Vbg at a startup circuit and outputting VOUT configured to change in response to Vbg rising above Vtrig or falling below Vtrig, where the power consumption of the startup circuit is based at least in part upon a voltage value applied to a source terminal of a native transistor within the startup circuit.

Abstract: In a processing system capable of single and multi-thread execution, a branch prediction unit can be configured to detect hard to predict branches and loop instructions. In a dual-threading (simultaneous multi-threading) configuration, one instruction queues (IQ) is used for each thread and instructions are alternately sent from each IQ to decode units. In single thread mode, the second IQ can be used to store the “not predicted path” of the hard-to-predict branch or the “fall-through” path of the loop. On mis-prediction, the mis-prediction penalty is reduced by getting the instructions from IQ instead of instruction cache.

Abstract: A method for bonding a wire to a substrate includes forming a wire ball at a working tip of a capillary and contacting the wire ball to a substrate via the capillary. The method also includes driving a protrusion at the working tip of the capillary into contact with a region of the substrate surrounding the wire ball. A capillary for wire bonding includes a working face, an annular chamfer section, and a cylindrical bore offsetting the annular chamfer section from the working face. A capillary for wire bonding includes a capillary body comprising a working tip having a working face. The capillary body defines an axial passage extending from the working face along a longitudinal axis of the capillary. The axial passage includes a cylindrical bore extending internally from the working face, and a first annular chamfer having a major diameter defined by the cylindrical bore.

Abstract: An electrostatic discharge (ESD) protection circuit (40) is coupled across input-output (I/O) pads (21) and common terminals (24) of a circuit core (22) to protect it from ESD events. The circuit (40) comprises, a unidirectional ESD clamp (23) and two or more floating diodes (42, 44) arranged in parallel opposed configuration in series with the ESD clamp (23), the combination coupled between the I/O pads (21) and the reference terminals (24). In a preferred arrangement, the two strings of opposed parallel coupled diodes (42, 44) are used with different numbers of diodes in each string. These diodes (42, 44) operate in forward conduction (43, 45), so the energy dissipated therein during an ESD event is much reduced compared to a reverse biased diode and they can have smaller area. Signal clipping at the I/O pad (21) is reduced, less power is dissipated and less chip area is utilized.

Abstract: A clock signal generator module arranged to generate at least one clock signal for at least one functional module is described. The clock signal generator module comprises a first clock source component associated with at least one functional module, at least one further clock source component associated with the at least one functional module, and at least one management unit arranged to controllably enable signal generation by the first and at least one further clock source components in accordance with at least one operating characteristic of the at least one functional module associated therewith.

Abstract: Embodiments of a method for fabricating stacked microelectronic packages are provided, as are embodiments of a stacked microelectronic package. In one embodiment, the method includes arranging microelectronic device panels in a panel stack. Each microelectronic device panel includes a plurality of microelectronic devices and a plurality of package edge conductors extending therefrom. Trenches are formed in the panel stack exposing the plurality of package edge conductors. An electrically-conductive material is deposited into the trenches and contacts the plurality of package edge conductors exposed therethrough. The panel stack is then separated into partially-completed stacked microelectronic packages. For at least one of the partially-completed stacked microelectronic packages, selected portions of the electrically-conductive material are removed to define a plurality of patterned sidewall conductors interconnecting the microelectronic devices included within the stacked microelectronic package.

Abstract: An embodiment of a diode includes a semiconductor substrate, a first contact region having a first conductivity type, a second contact region laterally spaced from the first contact region, and having a second conductivity type, an intermediate region disposed in the semiconductor substrate between the first and second contact regions, electrically connected with the first contact region, and having the first conductivity type, and a buried region disposed in the semiconductor substrate, having the second conductivity type, and electrically connected with the second contact region. The buried region extends laterally across the first contact region and the intermediate region to establish first and second junctions, respectively. The first junction has a lower breakdown voltage than the second junction.

Abstract: A system for on-die voltage difference measurement on a pass device comprises a first voltage controlled oscillator circuit having a first voltage control input connectable to a first terminal of the pass device; a second voltage controlled oscillator circuit having a second voltage control input connectable to a second terminal of the pass device; a first counter circuit arranged to count oscillation periods of a first output signal from the first voltage controlled oscillator circuit and to provide a stop signal when a predefined number of the oscillation periods of the first output signal is counted; and a second counter circuit arranged to count oscillation periods of a second output signal from the second voltage controlled oscillator circuit and to stop counting depending on the stop signal.

Abstract: A low profile strip dual in-line memory module (200) includes a passive interposer support structure (90) with patterned openings (91-97) formed between opposing top and bottom surfaces, a plurality of memory chips (D1-D8) attached to the top and bottom surfaces, and vertical solder ball conductors (98) extending through the patterned openings to electrically connect the plurality of memory chips, where each memory chip has an attachment surface facing the passive interposer structure and a patterned array of horizontal conductors (e.g., 82-86) formed on the attachment surface with contact pads electrically connected to the plurality of vertical conductors to define at least one bus conductor that is electrically connected to each memory die in the first and second plurality of memory die.

Abstract: A register file module comprising at least one register array comprising a plurality of latch devices is described. The plurality of latch devices is arranged to individually provide memory bit-cells when the register file module is configured to operate in a first, functional operating mode, and at least one clock control component is arranged to receive a clock signal and to propagate the clock signal to the latch devices within the at least one register array. The register file module is configurable to operate in a second, scan mode in which the latch devices within the at least one register array are arranged into at least one scan chain. The at least one clock control component is arranged to propagate the clock signal to the latch devices within the at least one register array such that alternate latch devices within the at least one scan chain receive an inverted form of the clock signal.