Abstract: A comparator according to the present invention can generate an output signal of low or high level by comparing a first and second input voltages that have a common voltage. An input stage circuit of a comparator according to the present invention receives a common voltage detection signal. The common voltage is supplied with a first offset voltage when the common voltage detection signal is on low level, and the common voltage is supplied with a second offset voltage when the common voltage detection signal is on high level. Then, the input stage circuit performs amplification to output a voltage difference between the first input voltage and the second input voltage to the comparator. Accordingly, the comparator with offset voltage according to the present invention can sufficiently amplify the input signal difference of low common voltage by selectively applying different offset voltages to a common voltage in accordance with the common voltage level of the input signal.

Abstract: A method for fabricating a CMOS image sensor having a characteristic of a reduced dark current includes the steps of: a) providing a semiconductor structure, wherein the semiconductor structure includes a photodiode and peripheral elements formed on a semiconductor substrate; b) forming an insulating layer on the semiconductor structure; c) forming a hydrogen containing dielectric layer on the insulting layer; d) diffusing hydrogen ions contained in the hydrogen containing dielectric layer into a surface of the photodiode, thereby removing a dangling bond; and e) removing the hydrogen containing dielectric layer.

Abstract: A transistor and a method for fabricating the same that involves a forming a device isolation oxide film semiconductor substrate, forming an opening in the device isolation oxide to open the substrate and define an active region, the junction between the oxide and the substrate having a rounded profile, and then forming a complex gate electrode structure in the active region. The preferred gate electrode structure comprises a gate oxide and a stacked conductor structure having a first and a second conductor, an optional hard mask layer formed on the second conductor, an oxide layer formed on the first conductor, and nitride spacers formed on the oxide layer on the sidewalls of the gate electrode. On either side of the gate electrode structure lightly doped drain (LDD) regions and source drain regions are then formed in the active region of the semiconductor substrate. The wafer is then planarized with one or more insulating films to condition the wafer for subsequent processing.

Abstract: A method for automatically controlling an exposure time in image sensor having a pixel array includes the steps of producing total pixel value of the green pixels from the pixel array, producing a mean value of the green pixels dividing the total pixel value of the green pixels by the number of the green pixels, producing a deviation value, wherein the deviation value is an absolute value of a difference between the mean value and a predetermined reference value, comparing the deviation value with a predetermined boundary value, in case where the deviation value is smaller than the predetermined boundary value, capturing a next image according to a current exposure time, and in case where the deviation value is larger than the predetermined boundary value, calculating an exposure control rate and determining whether an automatic exposure control mode is enabled, and in case where the automatic exposure control mode is disabled, capturing the next image according to the current exposure time, and in case where

Abstract: The present invention is a high-voltage generation circuit configured to sequentially activate a plurality of high-voltage pump circuits to precisely pump a level of high voltage. In one embodiment, the high-voltage generation circuit includes a high-voltage level detection unit for outputting a high-voltage detected signal, a high-voltage pump control unit for generating a control signal responsive to a detected signal, an oscillator for generating a pulse signal for driving a plurality of high-voltage pumps, a sequential delay unit for sequentially delaying the pulse signal from the oscillator, and a plurality of high-voltage pumps for pumping the high voltage based on a delayed pulse signal and the control signal.

Abstract: In the present invention, a forward direction power control method using a backward direction power control sub-channel for a mobile communication system is disclosed. The method according to the present invention is directed to rapidly and effectively controlling the power of a base station transmission signal using a power control, sub-channel in a backward direction pilot channel when performing an outer loop and inner loop in a mobile station of a mobile communication system which adapts an IS-2000 CDMA method and rapidly coping with a channel environment and forward direction wireless environment for thereby decreasing the power of a transmission signal of the base station and increasing the capacity of the system.

Abstract: The present invention provides a polymer that can be used as an anti-reflective coating (ARC) polymer, an ARC composition comprising the same, methods for producing the same, and methods for using the same. The polymer of the present invention is particularly useful in a submicrolithographic process, for example, using KrF (248 nm) or ArF (193 nm) lasers as a light source. The polymer of the present invention comprises a chromophore that is capable of absorbing light at the wavelengths used in a submicrolithographic process. Thus, the ARC of the present invention significantly reduces or prevents back reflection of light and the problem of the CD alteration caused by the diffracted and/or reflected light. The ARC of the present invention also significantly reduces or eliminates the standing wave effect and reflective notching.

Abstract: A radio resource control (RRC) message is freely transmitted in an asynchronous mobile communication system regardless of an operating type of a core network. The method for transmitting a radio resource message from an asynchronous mobile station to an asynchronous radio network in an asynchronous mobile communication system, the method comprising the steps of: a) determining whether a core network is a synchronous core network or an asynchronous core network; b) if the core network is the synchronous core network, generating a RRC message having information related to the synchronous core network; and c) transmitting the RRC message to the asynchronous radio network.

Abstract: A method of producing two domains within a liquid crystal layer by first forming two electrodes on a substrate, using a liquid crystal layer aligned vertically with respect to the substrate formed on the substrate where the substrate has two electrodes separated from each other with a selected distance. Finally, an electric field between the two electrodes is applied.

Abstract: Disclosed are a capacitor for semiconductor capable of increasing storage capacitance as well as preventing leakage current and a method of manufacturing the same. According to the present invention. A lower electrode is formed on a semiconductor substrate. The surface of the lower electrode is surface-treated so as to prevent a natural oxide layer from generating on the surface thereof. A (TaO)1−x(TiO)N layer as a dielectric is deposited on the upper part of the lower electrode. Afterwards, to crystallize the (TaO)1−x(TiO)N layer, a thermal-treatment is performed. Next, an upper electrode is formed on the upper part of the (TaO)1−x(TiO)N layer.

Abstract: The present invention relate to a method for the operation and maintenance of a base station (BS) using a remote procedure call (RPC) in an international mobile telecommunication-2000 (IMT-2000) system which includes a base station environment management system (BEMS), a RPC process, an access control processor (ACP), an ATM interference processor (AIP) and an access signaling processor (ASP).

Abstract: A frame synchronizing apparatus using a memory in which a frame synchronizing algorithm is embodied in an ASIC(application specific integrated circuit) so as to be used in a circuit for synchronizing a frame in framing/deframing method for improving a performance of ATM(asynchronous transfer mode) cell extraction in high-error wireless environment of WATM(wireless asynchronous transfer mode), and such an algorithm can be employed in a circuit for synchronizing the frame in a received data stream.

Abstract: NAND type non-volatile ferroelectric memory cell and non-volatile ferroelectric memory of the same, in which numbers of access to a main cell and a reference cell are made the same, to maintain bitline induced voltages by the reference cell and by the main cell constant, for improving operation characteristics, minimizing a layout area, and permits a high density device integration, the memory cell including an N number of transistors connected in series, a bitline having an input terminal of a first transistor and an output terminal of (N)th transistor among the N number of transistors connected thereto, wordlines respectively connected to gates of the transistors except the (N)th transistor, a WEC signal line connected to a gate of the (N)th transistor and adapted to have an enable signal applied thereto only in a write or re-store mode, and ferroelectric capacitors respectively connected both to the wordlines and output terminals of the transistors.

Abstract: Disclosed is an organic anti-reflective film composition suitable for use in submicrolithography, comprising a compound of Formula 13 and a compound of Formula 14. The organic anti-reflective film effectively absorbs the light penetrating through the photoresist film coated on top of the anti-reflective film, thereby greatly reducing the standing wave effect. Use of organic anti-reflective films of the present invention allows patterns to be formed in a well-defined, ultrafine configuration, providing a great contribution to the high integration of semiconductor devices. wherein b, c, R′, R″, R1, R2, R3, and R4 are those defined herein.

Abstract: A clock control circuit for a Rambus DRAM is provided which reduces power consumption by determining in advance whether an applied command is a read or current control command, and enabling a clock signal for externally outputting an internal data only during the read or current control command.

Abstract: A method for monitoring an operational failure of a stocker for use in a semiconductor factory automation system, wherein the stocker is divided into a plurality of operational parts, includes the steps of: a) generating stocker state information representing an operational state of the stocker in response to a stocker state signal issued from the stocker; b) inspecting the stocker state information to update the operational state of the stocker previously stored; c) generating a warning signal when at least one part contained in the stocker has failed; and d) generating an audiovisual warning sign in response to the warning signal. The method can effectively provide audiovisual warning signs when the stocker has failed.

Abstract: The present invention relates to a method for forming a multi-transmittance phase-shifting mask for the manufacture of highly integrated semiconductor devices in which portions of a plurality of light blocking layers are selectively removed to modify the transmittance of various regions of the mask and suppress undesired patterns, such as ghost images and side lobe effects to permit increased integration levels and improved yield in the production of the semiconductor devices.

Abstract: A semiconductor device in which polysilicon is used to form source and drain regions in an initial process step so as to reduce resistance of bit lines and minimize a junction capacitance and thus improve its reliability, and a method for fabricating the same are disclosed, the semiconductor device including a semiconductor substrate, trenches formed in predetermined areas of the semiconductor substrate, an insulating layer formed in the trenches and beneath a surface of the substrate to have a recess, a polysilicon layer formed on the insulating layer in the trench, source and drain regions formed at both sides of the polysilicon layer beneath a surface of the semiconductor substrate, and gates formed over the semiconductor substrate.

Abstract: The present invention discloses a mask set for compensating for a misalignment between the patterns and method of compensating for a misalignment between the patterns. A mask set of the present invention comprises a first mask consisted of a mask substrate on which a main pattern and a plurality of sub-patterns are formed, said sub-patterns formed at a side of the main pattern; a second mask consisted of a mask substrate on which a plurality of hole patterns are formed, the hole patterns corresponded to spaces between the main pattern and the sub-patterns of the first mask, respectively when the first and second mask are overlapped to each other; and a third mask consisted of mask substrate on which a plurality of bar patterns are formed, the bar patterns corresponded to the hole patterns of the second mask, respectively when the second and third mask are overlapped to each other.

Abstract: The present invention provides an over-coating composition comprising a basic compound for coating a photoresist composition to provide a vertical photoresist pattern.