Patents Assigned to IBM
  • Patent number: 4350454
    Abstract: A ribbon cassette or cartridge comprising a housing having a hub element supporting a core having a ribbon wound thereon, such as a typewriter or printer ribbon, and adapted to releasably engage said core for rotation thereon. The hub element comprises at least two portions, at least one portion being fixed to the housing of said cassette or cartridge, and at least one other portion which is attached for movement between a locking position, in which it makes frictional engagement with the ribbon core to substantially prevent rotation of said core on said hub element, and a release position in which it is moved out of frictional engagement with said ribbon core to permit rotation of said core on said hub element.
    Type: Grant
    Filed: August 11, 1980
    Date of Patent: September 21, 1982
    Assignee: IBM Patent Operations
    Inventor: William J. Schoenlein
  • Patent number: 4346470
    Abstract: A method and apparatus are disclosed for acquiring transmit synchronization at a secondary station with the periodic frame reference bursts from a reference station in a TDMA network in an improved manner to enable the use of full power initial acquisition bursts while also reducing the bandwidth required to complete the initial acquisition operation. During the first phase, the apparatus at the secondary station bursts an initial acquisition burst during a relatively wide interval in the traffic portion of a TDMA frame and measures a propagation delay factor. The apparatus then adds the propagation delay factor to the receive frame timing synchronized with the reception of the frame reference bursts at the secondary station to obtain a more accurate adjusted transmit frame timing.
    Type: Grant
    Filed: March 21, 1980
    Date of Patent: August 24, 1982
    Assignee: IBM Corporation
    Inventors: Joseph A. Alvarez, III, John Shabe
  • Patent number: 4344222
    Abstract: A bipolar compatible electrically alterable read-only memory device and process are disclosed based upon the formation of an aluminum gate structure on the surface of a thin oxide layer in an FET precursor device, wherein the aluminum gate structure serves both as an ion-implantation blocking mask for forming self-aligned source and drain regions and, in addition, a source of aluminum for the solid state reaction between the silicon dioxide layer and aluminum, forming an aluminum oxide/silicon dioxide composite charge storage region. The process is wholly compatible with existing bipolar processing technologies so that high speed bipolar support circuitry can be utilized on the same semiconductor chip with the programmable device disclosed. The programmable device disclosed has the unique advantages of having a programming voltage which can be tailored to substantially match the signal voltages on the rest of the chip by controlling the solid state reaction for the aluminum oxide formation step.
    Type: Grant
    Filed: October 22, 1980
    Date of Patent: August 17, 1982
    Assignee: IBM Corporation
    Inventors: David L. Bergeron, Paul H. Smith
  • Patent number: 4332461
    Abstract: A scanning continuously variable reduction electrophotographic copier includes a servo motor for driving the document scanning carriages. Servo motor, and therefore carriage motion parameters of velocity, duration of acceleration and deceleration, length or time duration of travel and time of start of scan are selectable to produce a selected reduction ratio within a continuous range of reduction ratios. In one embodiment, three partially overlapping hybrid servo loops are used, one for acceleration and deceleration, another for constant velocity motion and a third for precise stopping control. In another embodiment, a single loop controls the entire motion.
    Type: Grant
    Filed: December 6, 1979
    Date of Patent: June 1, 1982
    Assignee: IBM Corporation
    Inventors: Norman Cail, Raymond A. Daniels, John B. Eggerling, Gerald B. Lammers
  • Patent number: 4332026
    Abstract: A multiple data rate digital switch for a TDMA communications controller is disclosed which can service a plurality of input/output ports having many different data rates on a time divided basis, either between ports connected to the same controller or between ports connected to different, geographically remote controllers. A transmit burst buffer and a receive burst buffer are connected between the local ports and a TDMA communication link and an intranodal buffer is connected between local ports. All three buffers are accessed by a switch control memory which stores n.sub.i control words for each of the ports which are scanned m times per TDMA frame, there being a frame rate of f frames per second. Thus, the ports are selected and their data is buffered at a rate R.sub.i which is equal to the product of n.sub.i times m times f. In this manner, ports having a variety of data rates can be serviced on a time interleaved basis with maximum connectivity.
    Type: Grant
    Filed: March 7, 1980
    Date of Patent: May 25, 1982
    Assignee: IBM Corporation
    Inventors: Joseph A. Alvarez, III, John F. Brennen, Robert W. Krug
  • Patent number: 4330857
    Abstract: The position of a channel of information transmitted from a particular port is varied in response to the changing priority of that port's messages as time passes. Variable priority assignments become necessary when low speed data has been deferred in its transmission until a time just prior to the production of a second unit of data. The effect of changing the priority of deferred data messages in a TDMA burst is to change the relative position of the associated channel within the TDMA burst by means of compiling the address of that message in a higher priority threaded list.
    Type: Grant
    Filed: February 29, 1980
    Date of Patent: May 18, 1982
    Assignee: IBM Corporation
    Inventors: Joseph A. Alvarez, III, Joseph M. Bensadon, John F. Brennen, Robert W. Krug
  • Patent number: 4329186
    Abstract: A semiconductor fabrication process and the resulting structure is disclosed for an FET device with a precisely defined channel length. Two process embodiments are described to make a diffused MOS device which does not require the use of p-type diffusions to obtain 1 micron channel length. Instead, to accurately define such micron-range channel lengths, a lateral etching technique is employed. To obtain well controlled threshold voltages, the channels are ion implanted. Thus the enhancement portion of the diffused MOS device channel is defined by an etching step instead of a diffusion step, thereby producing a channel having a length which is shorter and a threshold voltage which is better controlled than those which have been available in the prior art.
    Type: Grant
    Filed: December 20, 1979
    Date of Patent: May 11, 1982
    Assignee: IBM Corporation
    Inventors: Harish N. Kotecha, Francisco H. DeLaMoneda
  • Patent number: 4328543
    Abstract: A control architecture is disclosed for a communications controller, for connecting a control processor in the communications controller to a plurality of internal processing subunits which operate asynchronously at different data rates. The architecture includes a control adapter which is connected between the control processor and a common subunit bus, for receiving from the control processor, a control command, a plurality of data words, and an associated address for a respective one of the processing subunits. The control adapter outputs an operating code and the plurality of data words on the common subunit bus and further outputs a subunit select signal on a respective subunit select line to the subunit designated in the address. The adapter further includes a memory for storing the number of shift intervals to be applied to a stack shift signal which is output on a stack shift bus which is common to all of the subunits.
    Type: Grant
    Filed: March 25, 1980
    Date of Patent: May 4, 1982
    Assignee: IBM Corporation
    Inventors: Norman F. Brickman, Earl J. McDonald
  • Patent number: 4326212
    Abstract: An improved I.sup.2 L structure and process are disclosed which reduces the minority carrier charge storage, increases the emitter injection efficiency and reduces the emitter diffusion capacitance in the upward injecting vertical NPN transistor and reduces the minority carrier charge storage and increases the collector efficiency in the lateral PNP transistor.
    Type: Grant
    Filed: August 27, 1979
    Date of Patent: April 20, 1982
    Assignee: IBM Corporation
    Inventors: David L. Bergeron, Zimri C. Putney, Geoffrey B. Stephens
  • Patent number: 4322845
    Abstract: In a time division multiple access satellite communication system, a reference station which allocates channel capacity also regulates demand by the ground stations for that capacity. The regulation is accomplished by means in the reference station for transmitting limiting, blocking and revocation messages to the ground stations and means in the ground stations responsive to these messages to regulate the processing of input service requests. The limiting messages notify the ground stations to limit their channel usage to the channels required in the last demand message transmitted but not to exceed their last channel assignment. The blocking messages instruct the ground stations to unconditionally block any new requests for service on their input ports, rather than counting such calls as increments of demand, and thereby effectively reduce the aggregate demand in the system.
    Type: Grant
    Filed: September 28, 1979
    Date of Patent: March 30, 1982
    Assignee: IBM Corporation
    Inventors: John W. Fennel, Jr., Jan G. Oblonsky
  • Patent number: 4320504
    Abstract: The transmission and reception pattern generators are synchronized for all data ports operating at the same data rate throughout an entire TDMA system. This eliminates the necessity for bit stuffing to accommodate non-integral multiple data rate data ports and yet allows data activity compression operations to be carried out.
    Type: Grant
    Filed: March 7, 1980
    Date of Patent: March 16, 1982
    Assignee: IBM Corporation
    Inventors: Joseph A. Alvarez, III, Joseph M. Bensadon, John F. Brennen, Norman F. Brickman, Robert W. Krug
  • Patent number: 4319353
    Abstract: To make the most efficient use of the TDMA frame for a satellite communications network, the assignment of each local station's TDMA burst duration is based on a statistical assessment of the demand by local voice and data ports. Occasionally the actual voice and data port demand at a local station exceeds that station's assigned burst duration so that some of the messages which are ready for transmission cannot be transmitted and may be frozen-out. To avoid or minimize the effects of message freeze-out, the various types of messages are categorized into a hierarchy of priorities for transmission.
    Type: Grant
    Filed: February 29, 1980
    Date of Patent: March 9, 1982
    Assignee: IBM Corporation
    Inventors: Joseph A. Alvarez, III, John F. Brennen, Robert W. Krug
  • Patent number: 4315330
    Abstract: The invention finds application in a TDMA communications controller having a plurality of i input/output ports. The input/output ports transfer data from respective, local data users to a transmit bus and transfer data from a receive bus to respective local users on a time interleaved basis during periodic TDMA frames. Each port operates at its own data rate R.sub.i, with data ports having different data rates in the controller. The invention includes a test card which has a read-only memory (ROM) for storing test patterns for each of the data rates R.sub.i. The test card further includes a random access memory (RAM) having an input connected to the ROM, for storing one of the test patterns from the ROM. The test card further includes a processor having control outputs to the RAM and the ROM for controlling the transfer of one of the test patterns from the ROM to the RAM for the data rate R.sub.j of the data port under test.
    Type: Grant
    Filed: March 7, 1980
    Date of Patent: February 9, 1982
    Assignee: IBM Corporation
    Inventors: Norman F. Brickman, Bruno R. Graziano
  • Patent number: 4314267
    Abstract: A high performance JFET structure and process are disclosed which are compatible with high performance NPN transistors. The high performance JFET is merged in a bipolar/FET device which forms a dense, two level logic function. The JFET can be employed as a switched device or as an active load in a bipolar logic circuit and is formed in the P-type base diffusion of what would otherwise have been an NPN transistor. In the BIFET merged device, the JFET and bipolar transistor share a common base and drain and a common collector and gate in the P-type base region of what would otherwise have been an NPN transistor. Both an NPN type BIFET and an PNP type BIFET are disclosed. The merged JFET and bipolar transistor provide better than a 30% area reduction when compared to their non-merged precursors.
    Type: Grant
    Filed: February 4, 1980
    Date of Patent: February 2, 1982
    Assignee: IBM Corporation
    Inventors: David L. Bergeron, Geoffrey B. Stephens
  • Patent number: 4307461
    Abstract: A call processor is disclosed for a satellite communications controller, having a plurality of M voice ports, with an E lead input and an M lead output connected to each of a first subplurality of voice ports for rotary dial telephones, a tone digit interface connected to each of a second subplurality of voice ports which are dedicated to transducing a tone digit received from a multifrequency dialing telephone which is connected to one of a third plurality of voice ports. The third voice ports are connected by means of an intranodal wrap through a digital switch in the communications controller with the transducing circuits at the second voice ports so that the transducing circuitry can be shared among all of the third plurality of voice ports connected to multifrequency dialing telephones. The call processor employs a substantial amount of processing logic in the form of clocked control logic which is executed in a nested time slice operation.
    Type: Grant
    Filed: March 25, 1980
    Date of Patent: December 22, 1981
    Assignee: IBM Corporation
    Inventors: Norman F. Brickman, William R. Crosthwait
  • Patent number: 4299888
    Abstract: A method of forming discrete magnetic particles in situ by dispersing a nickel hypophosphite solution in a binder and binder solvent, such as polyvinyl alcohol in water or polyester urethane polymer in an organic solvent, forming a coating from the nickel hypophosphite binder solution on a substrate, and exposing the coating to a radiant energy source, such as x-rays or an electron beam. Thereafter the incipient magnetic media in the area exposed to radiation is developed by contact with a solution including ions of at least one of cobalt, nickel and iron and a reducing agent, such as a hypophosphite ion, to produce a magnetic media of discrete magnetic particles within the binder in the area exposed to the radiant energy while not forming such magnetic particles in other unexposed areas of the nickel hypophosphite coating.
    Type: Grant
    Filed: April 23, 1980
    Date of Patent: November 10, 1981
    Assignee: IBM Corporation
    Inventors: Don E. Pickart, Philip W. Reed, Joseph S. Vranka
  • Patent number: 4295217
    Abstract: In reconstructing the analog waveform from a syllabically companded delta modulated digital signal transmitted over a TDMA communication channel operating at near its maximum channel capacity, the noise created in a mid-talkspurt freeze-out is greatly reduced by interpolating the amplitude of the waveform during the freeze-out at the receiver as that of the waveform in the previous period. This makes the quality of voice transmissions in the face of freeze-outs substantially better than prior art techniques which induce background noise during freeze-outs, without the necessity of transmitting a voice activity compression (VAC) mask to control the operation of the interpolation apparatus in the receiver. The interpolation occurs for the first 15 msec sampling period following either a freeze-out or a true VAC operation.
    Type: Grant
    Filed: December 28, 1979
    Date of Patent: October 13, 1981
    Assignee: IBM Corporation
    Inventors: John W. Fennel, Jr., Robert J. Hallett, Stanley M. Head, Constantine M. Melas
  • Patent number: 4289834
    Abstract: A double level metal interconnection structure and process for making same are disclosed, wherein an etch-stop layer is formed on the first metal layer to prevent over-etching thereof when forming the second level metal line in a via hole in an insulating layer thereover, by means of reactive plasma etching. The etch-stop layer is composed of chromium and the reactive plasma etching is carried out with a halocarbon gas.
    Type: Grant
    Filed: October 12, 1979
    Date of Patent: September 15, 1981
    Assignee: IBM Corporation
    Inventors: George E. Alcorn, Raymond W. Hamaker, Geoffrey B. Stephens
  • Patent number: 4285064
    Abstract: A time division multiple access satellite communication architecture is disclosed to achieve a relatively simple control procedure for permitting multiple computers to establish peer coupled transmission paths for high speed transfer by dynamically allocating satellite communication facilities in a sequentially shared broadcast mode. Each sequentially established CPU-to-CPU logical link takes the form of a point-to-multipoint sub-network which incorporates a standard data link control protocol for the control of information transfer. The function of the primary station is sequentially passed from station to station within the network and as each station assumes primary control of its logical point-to-multipoint circuit, other stations conform to the secondary role for that logical link configuration.
    Type: Grant
    Filed: September 28, 1979
    Date of Patent: August 18, 1981
    Assignee: IBM Corporation
    Inventor: Gene D. Hodge
  • Patent number: 4280855
    Abstract: A diffused MOS (DMOS) device and method for making same are disclosed. The prior art DMOS device is improved upon by ion implanting a depletion extension L.sub.D to the drain. However, the introduction of the depletion extension L.sub.D introduces a manufacturing statistical variation in the characteristics of the resultant devices so produced. The problem of the effects of the variations in the length L.sub.D and thus, variations in the resulting transconductance of the device, is solved by placing two of these devices in parallel. When one device has its L.sub.D relatively shorter, the companion device will also have its L.sub.D correspondingly longer. The method of producing the dual devices is by ion implanting a single conductivity region which forms the L.sub.D for both the left- and right-hand channels for the left- and right-hand DMOS structures. If the mask for the ion-implanted region is misaligned slightly to the right, then the effective L.sub.
    Type: Grant
    Filed: January 23, 1980
    Date of Patent: July 28, 1981
    Assignee: IBM Corporation
    Inventors: Claude L. Bertin, Francisco H. De La Moneda, Donald A. Soderman