Abstract: An integrated circuit device comprising a power control unit for controlling the power of a power isle is disclosed. The power control unit comprises (i) a power gating switch implemented in the BEOL portion for switching ON/OFF the power to the power isle, (ii) a state recovery circuit comprising a memory element in the FEOL portion or BEOL portion and a transistor configuration in the BEOL portion, and (iii) a wake-up/sleep circuit in the BEOL portion adapted for receiving an identifier. The wake-up/sleep circuit is operatively connected with the power gating switch and with the state recovery circuit. Responsive to receiving the identifier, the wake-up/sleep circuit causes the power gating switch to switch OFF/ON the supply power to the power isle and causes the state recovery circuit to store/restore the state of the power isle.

Abstract: An optical system and method for connecting two optical fibers is described in the present disclosure. An example optical system includes a first optical fiber embedded in an embedding material, the first optical fiber comprising side walls extending in a longitudinal direction in contact with the embedding material, a second, external, optical fiber, and a self-written waveguide in optical contact with the first and second optical fibers. Only a cross section perpendicular to the side walls of the first optical fiber is outside the embedding material, in contact with the self-written waveguide.

Abstract: A method for forming a semiconductor structure by bonding a donor substrate to a carrier substrate is disclosed herein. The donor substrate may include a plurality of semiconductor layers epitaxially grown on top of one another in, and optionally above, a trench of the donor substrate. The carrier substrate may include a first semiconductor device thereon. The method may include removing at least part of the donor substrate in such a way as to expose a semiconductor layer grown on the bottom of the trench, removing at least part of the exposed semiconductor layer, thereby modifying the plurality of semiconductor layers, and forming a second semiconductor device from the modified plurality of semiconductor layers.

Abstract: Disclosed herein is a semiconductor structure including: (i) a monocrystalline substrate having a top surface, (ii) a non-crystalline structure overlying the monocrystalline substrate and including an opening having a width smaller than 10 microns and exposing part of the top surface of the monocrystalline substrate. The semiconductor structure also includes (iii) a buffer structure having a bottom surface abutting the part and a top surface having less than 108 threading dislocations per cm2, the buffer structure being made of a material having a first lattice constant. The semiconductor structure also includes (iv) one or more group IV monocrystalline structures abutting the buffer structure and that are made of a material having a second lattice constant, different from the first lattice constant.

Abstract: A biometric sensor that measures biometric information and a biometric analysis system including the biometric sensor are provided. The biometric sensor may include: a light source configured to emit light toward a region of interest of an object under examination, the light being diffused at the region of interest; a collimator that includes a though-hole and is configured to collimate the diffused light received from the region of interest; and a spectrometer configure to analyze the diffused light transmitted by the collimator.

Abstract: The present disclosure is related to a method for detecting and ranking hotspots in a lithographic mask used for printing a pattern on a substrate. According to example embodiments, the ranking is based on defect detection on a modulated focus wafer or a modulated dose wafer, where the actual de-focus or dose value at defect locations is taken into account, in addition to a de-focus or dose setting applied to a lithographic tool when a mask pattern is printed on the wafer. Additionally or alternatively, lithographic parameters other than the de-focus or dose can be used as a basis for the ranking method.

Abstract: A method for preparing a monocrystalline silicon substrate surface for a subsequent texturing step, the method comprising: removing contaminants from the surface by contacting the surface with a cleaning solution; etching the pre-cleaned surface with an aqueous solution comprising from 12 to 19% by weight, of KOH and/or NaOH; rinsing the etched surface with an aqueous medium at pH from 7 to 10; and contacting the rinsed etched surface with ozonated deionized water at pH from 2 to 4.5, thereby converting the rinsed etched surface into a prepared surface. A method for texturing the prepared surface is also provided.

Abstract: A system for selectively adiabatically coupling electromagnetic waves from one waveguide to another waveguide is described. It comprises a first waveguide portion and a second waveguide portion having substantially different surface normal cross-sections. Portions thereof are positioned with respect to each other in a coupling region so that under first predetermined environmental conditions coupling of electromagnetic waves between the first waveguide portion and the second waveguide portion can occur and under second predetermined environmental conditions substantially no coupling of electromagnetic waves between the first waveguide portion and the second waveguide portion can occur.

Abstract: The present disclosure relates to devices and methods for acquiring an image having two-dimensional spatial resolution and spectral resolution. An example method comprises: acquiring a frame using rows of photo-sensitive areas on a sensor surface detecting incident light from an object imaged by an optical system onto an image plane, wherein rows of photo-sensitive areas are arranged to receive different wavelengths; moving the sensor surface in a direction perpendicular to a longitudinal direction of the rows; repeating the acquiring and moving for acquiring a plurality of frames recording different spectral information for respective positions on the object; and combining information from the plurality of frames to form multiple channels of an image, wherein each channel is formed based on detected light in respective rows and represent a two-dimensional image of the object for a different wavelength.

Abstract: Digital driving circuitry for driving an active matrix display comprising a plurality of pixels logically organized in a plurality of rows and a plurality of columns, each pixel comprising a light emitting element, comprises a current driver for each of the plurality of columns for driving a predetermined current through the corresponding column, the predetermined current being proportional to the number of pixels that are ON in that column. The digital driving circuitry further comprises digital select line driving circuitry for sequentially selecting the plurality of rows, and digital data line driving circuitry for writing digital image codes to the pixels in a selected row, synchronized with the digital select line driving circuitry.

Abstract: A polar transmitter provided for transmitting a phase/frequency modulated and amplitude modulated transmit signal and a method for generating a transmit signal using a polar transmitter are described. An example polar transmitter comprises a phase locked loop for generating a phase/frequency modulated precursor of the transmit signal. The phase locked loop comprises at its input a phase error detection unit for detecting a phase error of the precursor fed back from the output of the phase locked loop to the phase error detection unit as a feedback signal. The polar transmitter comprises a digital amplitude modulator for amplitude modulation of the precursor, resulting in the transmit signal. The digital amplitude modulator is arranged within the phase locked loop for amplitude modulation of the precursor before being output by the PLL. The phase error detection unit is further provided for detecting the amplitude of the feedback signal.

Abstract: Embodiments described herein relate to a large area lens-free imaging device. One example is a lens-free device for imaging one or more objects. The lens-free device includes a light source positioned for illuminating at least one object. The lens-free device also includes a detector positioned for recording interference patterns of the illuminated at least one object. The light source includes a plurality of light emitters that are positioned and configured to create a controlled light wavefront for performing lens-free imaging.

Abstract: A system (100) is described for characterizing and/or manipulating molecules. The system may especially be suitable for biological molecules, although the invention is not limited thereto. The system (100) comprises a substrate (110) comprising a nanostructure (120) being suitable for translocation of molecules through the nanostructure (120). It furthermore comprises a means (210) for translocating molecules through the nanostructure (120) and a plasmonic force field generating means (130) adapted for influencing the translocation speed of the particle by applying a plasmonic force field at the nanostructure (120). A corresponding method also is described.

Abstract: A method for creating a profile for accessing or manipulating resources across a plurality of nodes in a network is disclosed. An entity manager receives a request from a client to create a profile, and preferably validates the request. The entity manager generates said profile and the profile is addressable by a profile identifier. A client may use the profile to interact with the resources across the plurality of nodes using the profile identifier.

Abstract: A solid state electrolyte and method of preparation is provided. The solid state electrolyte includes a plasticized polymer matrix with non-dissolved salt crystals embedded in the polymer matrix and wherein the non-dissolved crystals are suitable for dissolving ions in the plasticized polymer. The method of preparation includes dissolving a plasticizer and a polymer matrix in an organic solvent to obtain a plasticized polymer matrix; and mixing the salt crystals with the plasticized polymer matrix, wherein the weight ratio of salt crystals versus plasticizer and polymer matrix and organic solvent is above saturation concentration such that non-dissolved salt crystals are embedded in the plasticized polymer matrix.

Abstract: A method is provided for assembly of a micro-electronic component, in which a conductive die bonding material is used. This material includes a conductive thermosettable resin material or flux based solder and a dynamic release layer adjacent to the conductive thermoplastic material die bonding material layer A laser beam is impinged on the dynamic release layer, adjacent to the die bonding material layer, in such a way that the dynamic release layer is activated to direct conductive die bonding material matter towards the pad structure to be treated, to cover a selected part of the pad structure with a transferred conductive die bonding material. The laser beam is restricted in timing and energy, in such a way that the die bonding material matter remains thermosetting. Accordingly, adhesive matter can be transferred while preventing that the adhesive is rendered ineffective by thermal overexposure in the transferring process.

Abstract: A spectral camera for producing a spectral output is disclosed. The spectral camera has an objective lens for producing an image, a mosaic of filters for passing different bands of the optical spectrum, and a sensor array arranged to detect pixels of the image at the different bands passed by the filters, wherein for each of the pixels, the sensor array has a cluster of sensor elements for detecting the different bands, and the mosaic has a corresponding cluster of filters of different bands, integrated on the sensor element so that the image can be detected simultaneously at the different bands. Further, the filters are first order Fabry-Perot filters, which can give any desired passband to give high spectral definition. Cross talk can be reduced since there is no longer a parasitic cavity.

Abstract: An interconnect structure and a method for forming it is disclosed. In one aspect, the method includes the steps of providing a first entity. The first entity includes a first set of line structures. The first set of line structures include a first set of conductive lines, and a first set of dielectric lines made of a first dielectric material and aligned with and overlaying the first set of conductive lines. The first entity also includes gaps separating the line structures and filled with a second dielectric material of such a nature that the first dielectric material can be selectively etched with respect to the second dielectric material. The method also includes providing a patterned mask on the first entity. The method further includes etching selectively the first dielectric material through the patterned mask so as to form one or more vias in the first dielectric material. The method also includes removing the patterned mask.

Abstract: A method for ramping a switched capacitor power amplifier is disclosed, where the switched capacitor power amplifier comprises a plurality of capacitors in a capacitor bank, and where a number of the capacitors in the capacitor bank are activated. The method comprises changing the number of capacitors in the capacitor bank that are activated, maintaining the changed number of activated capacitors in the capacitor bank for a period of time, and repeating the changing and maintaining, where a length of the period of time is varied between at least two repetitions of the maintaining.

Abstract: Systems and methods for processing data including a first and second component are described. An example circuit includes a processing stage arranged to calculate absolute values of the first component and the second component, and to output, at a first output, a maximum value of the absolute value of the first component and the absolute value of the second component, and, at a second output, a minimum value of the absolute value of the first component and the absolute value of the second component. The circuit includes a processing stage arranged to output, in response to the maximum value being greater than the minimum value times four, a value corresponding to the maximum value, and to output, in response to the maximum value being smaller than the minimum value times four, a value corresponding to a sum of seven times the maximum value and four times the minimum value.