Abstract: According to an aspect of the present inventive concept there is provided a method of providing an implanted region in a semiconductor structure including a first region and a second region, the method comprising: providing a first implantation mask covering the first region of the semiconductor structure, the first implantation mask including a first sacrificial layer, wherein the first sacrificial layer is formed as a spin-on-carbon (SOC) layer, and a second sacrificial layer, wherein the second sacrificial layer is formed as a spin-on-glass (SOG) layer; subjecting the semiconductor structure to an ion implantation process wherein an extension of the first implantation mask is such that ion implantation in the first region is counteracted and ion implantation in the second region is allowed wherein the second region is implanted; forming a third sacrificial layer covering the second region of the semiconductor structure, wherein the third sacrificial layer includes carbon; removing the second sacrificial la

Abstract: The present disclosure is related to a method for treating a photoresist structure on a substrate, the method comprising producing one or more resist structures on a substrate, introducing the substrate in a plasma reactor, and subjecting the substrate to a plasma treatment at a temperature lower than zero degrees Celsius, such as between zero and ?110° C. The plasma treatment may be a H2 plasma treatment performed in an inductively coupled plasma reactor. The treatment time may be at least 30s.

Abstract: A battery operated device and method of removing a battery therefrom are described. The battery operated device includes a battery compartment, a battery in the battery compartment, and an electric component powered by the battery. The battery compartment is mounted on a deformable base and includes a top surface which is adapted to be ruptured by deforming the deformable base, thereby enabling removal of the battery from the battery compartment. The method of removing a battery from a battery compartment of a battery operated device includes rupturing a top surface of the battery compartment by deforming a deformable base of the battery compartment, and removing the battery from the battery compartment.

Abstract: The present disclosure relates to systems, methods, and sensors configured to characterize a radiation beam. At least one embodiment relates to an optical system. The optical system includes an optical radiation guiding system. The optical radiation guiding system includes a collimator configured to collimate the radiation beam into a collimated radiation beam. The optical radiation guiding system also includes a beam shaper configured to distribute power of the collimated radiation beam over a discrete number of line shaped fields. A spectrum of the collimated radiation beam entering the beam shaper is delivered to each of the discrete number of line shaped fields. The optical system further includes a spectrometer chip. The spectrometer chip is configured to process the spectrum of the collimated radiation beam in each of the discrete number of line shaped fields coming from the beam shaper.

Abstract: The present disclosure relates to an arrangement for providing information about a flow rate of a fluid, comprising: a fluid inlet opening, at least one flow channel, and at least one porous zone located above the at least one flow channel, wherein the surface size and position of the at least one porous zone relative to the fluid inlet opening defines the evaporation rate of a fluid, arranged such that when a fluid is injected through the fluid inlet opening the fluid flows via hydraulic pressure through the at least one flow channel and then through the respective at least one porous zone.

Abstract: A method for insertion bonding and a device thus obtained are disclosed. In one aspect, the device includes a first substrate having a front main surface and at least one protrusion at the front main surface. The device includes a second substrate having a front main surface and at least one hole extending from the front main surface into the second substrate. The protrusion of the first substrate is inserted into the hole of the second substrate. The hole is formed in a shape wherein the width is reduced in the depth direction and wherein the width of at least a part of the hole is smaller than the width of the protrusion at the location of the metal portion thereof. The protrusion is deformed during insertion thereof in the hole to provide a bond between the part of the hole and the metal portion.

Abstract: A method for removing oxide selective to a material comprising at least silicon and at least nitrogen is disclosed, the method comprising providing in a reactor a structure having a surface comprising a region, wherein said region comprises a material comprising at least silicon and at least nitrogen, providing on said structure an oxide layer overlying at least a part of said region, and removing said oxide layer selective to said material by etching, thereby exposing at least a part of said at least overlaid part of said region, wherein said etching is done only by providing an etchant gas comprising boron, whereby a voltage bias lower than 30 V is applied to the structure.

Abstract: The disclosed technology generally relates to complementary metal-oxide-silicon (CMOS) devices, and more particularly to an n-channel metal-oxide-silicon (nMOS) device and a p-channel metal-oxide-silicon (pMOS) device that are under different types of strains. In one aspect, a method comprises providing trenches in a dielectric layer on a semiconductor substrate, where at least a first trench defines an nMOS region and a second trench defines a pMOS region, and where the trenches extend through the dielectric layer and abut a surface of the substrate. The method additionally includes growing a first seed layer in the first trench on the surface and growing a common strain-relaxed buffer layer in the first trench and the second trench, where the common strain-relaxed buffer layer comprises silicon germanium (SiGe). The method further includes growing a common channel layer comprising germanium (Ge) in the first and second trenches and on the common strain-relaxed buffer layer.

Abstract: An electrode for biopotential sensing comprising a main electrode base and at least a plurality of contact pins protruding from the main electrode base and configured to make contact with a subject's skin. Each of the first plurality of contact pins comprises at least one conductive mesh having an elongated pillar shape. A headset or biopotential monitoring system comprising such an electrode for biopotential sensing.

Abstract: A method for manufacturing a CMOS device includes providing a semiconductor base layer epitaxially growing a germanium layer on the semiconductor base layer, the germanium layer having thickness above a critical thickness such that an upper portion of the germanium layer is strain relaxed. The method also includes performing an anneal step, thinning the germanium layer and patterning the germanium layer into fin structures or into vertical wire structures. The method further includes laterally embedding the fin structures or vertical wire structures in a dielectric layer and providing a masking layer covering the first region, leaving the second region exposed. The method yet further includes selectively removing the fin structure or vertical wire structure in the second region up until the main upper surface, resulting in a trench and growing a protrusion in the trench by epitaxially growing one or more semiconductor layers in the trench.

Abstract: The present disclosure relates generally to Hf-comprising materials for use in, for example, the insulator of a RRAM device, and to methods for making such materials. In one aspect, the disclosure provides a method for the manufacture of a layer of material over a substrate, said method including a) providing a substrate, and b) depositing a layer of material on said substrate via ALD at a temperature of from 250 to 500° C., said depositing step comprising: at least one HfX4 pulse, and at least one trimethyl-aluminum (TMA) pulse, wherein X is a halogen selected from Cl, Br, I and F and is preferably Cl.

Abstract: The present invention is related to a method for forming a metal silicide layer on a textured silicon substrate surface. The method includes providing a metal layer on a textured silicon substrate and performing a pulsed laser annealing step providing at least one UV laser pulse with a laser fluence in the range between 0.1 J/cm2 and 1.5 J/cm2 and with a laser pulse duration in the range between 1 ns and 10 ms. Then, the method includes converting at least part of the metal layer into a metal silicide layer. In addition, the present invention is related to the use of such a method in a process for fabricating a photovoltaic cell, wherein the dielectric layer is a surface passivation layer, or wherein the dielectric layer is an antireflection coating.

Abstract: A device and method for sorting objects immersed in a flowing medium are described. An example device comprises a holographic imaging unit comprising a plurality of holographic imaging elements, a fluid handling unit comprising a plurality of microfluidic channels for conducting flowing medium along a corresponding holographic imaging element and a microfluidic switch arranged downstream of an imaging region in the microfluidic channel for directing each object in the flowing medium into a one of a plurality of outlets. The example device also comprises a processing unit configured to determine real-time characterizations of holographic diffraction images obtained for each of the moving objects, with each real-time characterization accounting for at least one predetermined object-type signature. The processing unit is further adapted for controlling the microfluidic switches in response to the real-time characterizations.

Abstract: Method for pore sealing a porous substrate, comprising: forming a continuous monolayer of a polyimide precursor on a liquid surface, transferring said polyimide precursor monolayer onto the porous substrate with the Langmuir-Blodgett technique, and imidization of the transferred polyimide precursor monolayers, thereby forming a polyimide sealing layer on the porous substrate. Porous substrate having at least one surface on which a sealing layer is provided to seal pores of the substrate, wherein the sealing layer is a polyimide having a thickness of a few monolayers and wherein there is no penetration of the polyimide into the pores.

Abstract: The disclosed technology generally relates to forming patterns of doped semiconductor regions, and more particularly to methods of forming such patterns in fabricating photovoltaic devices. In one aspect, a method of forming a pattern of different doped regions at the same side of a semiconductor substrate comprises providing a patterned doped layer on a surface of the semiconductor substrate at predetermined locations where at least one first doped region is to be formed. The method additionally includes selectively growing at least one second doped region epitaxially at the same side of the semiconductor substrate using the patterned doped layer as an epitaxial growth mask. Furthermore, selectively growing comprises driving dopants from the patterned doped layer into the semiconductor substrate to form the first doped region at the predetermined locations.

Abstract: A method of producing a heterogeneous photonic integrated circuit includes integrating at least one III-V hybrid device on a source substrate having at least a top silicon layer, and transferring by transfer-printing or by flip-chip bonding the III-V hybrid device and at least part of the top silicon layer of the source substrate to a semiconductor-on-insulator or dielectric-on-insulator host substrate.

Abstract: A method is provided for fabricating a thin film solid-state Li-ion battery comprising a first electrode layer, a solid electrolyte layer, and a second electrode layer. The method comprises depositing, on a substrate, an initial layer stack comprising a first layer comprising a first electrode material compound, and a second layer comprising an electrolyte material compound; and afterwards performing a lithiation step comprising incorporating Li in the first layer and in the second layer, thereby forming a stack of a first electrode layer and a solid electrolyte layer. The initial layer stack may further comprise a third layer comprising a second electrode material compound. By performing the lithiation step, Li is also incorporated in the third layer, such that a stack of a first electrode layer, a solid electrolyte layer, and a second electrode layer is formed. One or more of the first, second, or third layers may be Li-free.

Abstract: In the present invention, a molecular analysis device comprises a substrate, and a waveguide with a planar integrating element and filter or reflector element adjacent thereto is disposed on the substrate. The waveguide comprises a coupling means configured for coupling a predetermined frequency range of laser radiation into the waveguide. At least one metallic nanostructure is disposed on or adjacent to the planar integrating element, at least one metallic nanostructure is configured such that the field intensity and the gradient of the laser radiation, that is coupled into the waveguide, are enhanced over a sufficiently large volume around the nanostructure to simultaneously cause plasmonic based optical trapping of analyte(s) in a medium, and plasmonic based excitation of the particles to produce Raman scattered radiation. A Raman scattered radiation collection means is disposed on the substrate for collecting said Raman scattered radiation produced by the particles.

Abstract: Systems and methods described herein include a reference electrode for being immersed in a bulk solution. The reference electrode comprises a reservoir having reservoir walls defining a reservoir volume filled with an electrolyte; an electrode in the reservoir, in contact with the electrolyte. The reservoir of the reference electrode is closed except for the presence of at least one pore in at least one of the reservoir walls, the at least one pore being filled with electrolyte and being adapted for allowing ionic contact between the electrolyte in the reservoir and the bulk solution into which the reference electrode is to be immersed.

Abstract: A method for producing fin structures, using Directed Self Assembly (DSA) lithographic patterning, in an area of a semiconductor substrate includes providing a semiconductor substrate covered with a shallow trench isolation (STI) layer stack on a side thereof; defining a fin area on that side of the substrate by performing a lithographic patterning step other than DSA, wherein the fin structures will be produced in the fin area; and producing the fin structures in the semiconductor substrate within the fin area according to a predetermined fin pattern using DSA lithographic patterning. The disclosure also relates to associated semiconductor structures.