Abstract: Semiconductor photonics devices for coupling radiation to a semiconductor waveguide are described. An example photonics device comprises a semiconductor-on-insulator substrate comprising a semiconductor substrate, a buried oxide layer positioned on top of the semiconductor substrate, and the semiconductor waveguide on top of the buried oxide layer to which radiation is to be coupled. The example device also comprises a grating coupler positioned on top of the buried oxide layer and configured for coupling incident radiation to the semiconductor waveguide. The semiconductor substrate has a recessed portion at the backside of the semiconductor substrate for receiving incident radiation to be coupled to the semiconductor waveguide via the backside of the semiconductor substrate and the grating coupler.

Abstract: A method for manufacturing a three-dimensional resistive memory array is disclosed. The method comprises forming a repetitive sequence comprising an isolating layer, a semiconductor layer, a gate insulating layer, and a conductive layer. By performing a plurality of processing steps on the repetitive sequence a three-dimensional resistive memory array is obtained. A three-dimensional resistive memory array is further disclosed.

Abstract: A method for fabricating thin crystalline photovoltaic cells is disclosed. In one aspect, the method includes: forming a weakening layer in a surface portion of a semiconductor substrate; epitaxially growing a stack of semiconductor layers on the substrate for forming an active layer of the photovoltaic cell, the stack having a first thermal coefficient of expansion; providing on the stack patterned contact layer for forming electrical contacts of the photovoltaic cell, the patterned contact layer having a second thermal coefficient of expansion different from the first thermal coefficient of expansion. The process of providing a patterned contact layer simultaneously induces a tensile stress in the weakening layer, resulting in a lift-off from the substrate of a structure including the stack of semiconductor layers and the patterned contact layer.

Abstract: The present disclosure is related to a method for detecting and ranking hotspots in a lithographic mask used for printing a pattern on a substrate. According to example embodiments, the ranking is based on defect detection on a modulated focus wafer or a modulated dose wafer, where the actual de-focus or dose value at defect locations is taken into account, in addition to a de-focus or dose setting applied to a lithographic tool when a mask pattern is printed on the wafer. Additionally or alternatively, lithographic parameters other than the de-focus or dose can be used as a basis for the ranking method.

Abstract: A sensor for dielectric spectroscopy of a sample is disclosed. The sensor comprises a waveguide inductively loaded with a composite dielectric section which comprises a sample holder and a discontinuity separating the sample holder from the waveguide. The electromagnetic impedance of the composite dielectric section varies gradually, at least along the propagation direction of the waveguide, and at least from the onset of the discontinuity towards the sample holder.

Abstract: A memory control system for controlling read and write operations of a non-volatile memory, wherein the memory control system comprises a memory controller that is adapted to implement a write operation for writing at least one block of data to the memory as a sequence of memory write and validation cycles for part of all of the data. In one example, the number of cycles is a function of the amount of successfully written data per cycle and is thus variable in dependence on the success of the data writing. The system also includes a power management unit, which is adapted to authorize or prevent the memory controller from conducting the write operation at the level of the write cycles thereby to control the timing of power consumption resulting from the cycles of the write operation.

Abstract: The disclosed technology generally relates to complementary metal-oxide-silicon (CMOS) devices, and more particularly to a transistor device comprising a germanium channel layer, such as an n-channel metal-oxide-silicon (NMOS) transistor device. In one aspect, a method of forming a germanium channel layer for an NMOS transistor device comprises providing a trench having sidewalls defined by a dielectric material structure and abutting on a silicon substrate's surface, and growing a seed layer in the trench on the surface, where the seed layer has a front surface comprising facets having a (111) orientation. The method additionally includes growing a strain-relaxed buffer layer in the trench on the seed layer, where the strain-relaxed buffer layer comprises silicon germanium. The method further includes growing a channel layer comprising germanium (Ge) on the strain-relaxed buffer layer. In other aspects, devices, e.g., an NMOS transistor device and a CMOS device, includes features fabricated using the method.

Abstract: An example semiconductor structure comprises a first surface and at least one nanowire, the at least one nanowire being perpendicular to the first surface, wherein the first surface is defect-poor and is made of a doped III-V semiconductor material, wherein the at least one nanowire is defect-poor and made of an undoped III-V semiconductor material having a lattice mismatch with the material of the first surface of from about 0% to 1%.

Abstract: A method comprising providing an input signal to at least one input node of a computing reservoir by temporally encoding the input signal by modulating the at least one photonic wave as function of the input signal is described. The method further comprises propagating the at least one photonic wave via passive guided or unguided propagation between discrete nodes of the computing reservoir, in which each discrete node is adapted for passively relaying the at least one photonic wave over the passive interconnections connected thereto. The method also comprises obtaining a plurality of readout signals, in which each readout signal is determined by a non-linear relation to the at least one photonic wave in at least one readout node of the computing reservoir, and combining this plurality of readout signals into an output signal by taking into account a plurality of training parameters.

Abstract: Disclosed are methods and mask structures for epitaxially growing substantially defect-free semiconductor material. In some embodiments, the method may comprise providing a substrate comprising a first crystalline material, where the first crystalline material has a first lattice constant; providing a mask structure on the substrate, where the mask structure comprises a first level comprising a first opening extending through the first level (where a bottom of the first opening comprises the substrate), and a second level on top of the first level, where the second level comprises a plurality of second trenches positioned at a non-zero angle with respect to the first opening. The method may further comprise epitaxially growing a second crystalline material on the bottom of the first opening, where the second crystalline material has a second lattice constant different than the first lattice constant and defects in the second crystalline material are trapped in the first opening.

Abstract: The present disclosure relates to a digital frontend system for a radio device comprising a digital filter arranged for receiving digital quadrature signals and for filtering the digital quadrature signals and for outputting filtered quadrature signals; a conversion circuit arranged for receiving the filtered quadrature signals and for performing a rectangular to polar conversion of the filtered quadrature signals and for outputting a plurality of polar signals, characterized in that, the plurality of polar signals comprising an amplitude signal and quadrature phase signals.

Abstract: A method is provided for forming an unsupported MoS2 layer in an aqueous medium, the method comprising the steps of: providing an assembly of a Mo oxide layer on a Si substrate; annealing said assembly in presence of H2S at a temperature sufficient for forming a MoS2 layer; and contacting the annealed assembly with an aqueous medium. This unsupported MoS2 layer can then be transferred by dip-coating to another substrate such as a dielectric substrate.

Abstract: The present invention pertains to a submount for mechanically and electrically coupling an electronic component to a carrier. The submount has a mounting portion for mounting the submount to the carrier and has attachment portions for holding the electronic component. The submount further has primary electric contacts for cooperation with respective electrical conductors in the carrier, and secondary electric contacts for cooperation with respective electric contacts of the electronic component. The secondary electric contacts are electrically connected to primary electric contacts. The attachment portions are coupled to the mounting portion by respective extension portions that are laterally stretchable in a plane defined by the mounting portion to allow a displacement of the attachment portions in a direction away from the mounting portion.

Abstract: An integrated avalanche photodetector and a method for fabrication thereof. The integrated avalanche photodetector comprises a Ge body adapted to conduct an optical mode. The Ge body comprises a first p-doped region that extends from a first main surface to a second main surface of the Ge body. The Ge body further comprises a first n-doped region that extends from the first main surface towards the second main surface of the Ge body. An intrinsic region occupies the undoped part of the Ge body. A first avalanche junction is formed by the first n-doped region that is located aside the p-doped region. The Ge body further comprises an incidence surface, suitable for receiving an optical mode, and a second n-doped Ge region that covers the Ge body and forms a second avalanche junction with the first p-doped region at the first main surface.

Abstract: The disclosed technology generally relates to methods of characterizing semiconductor materials, and more particularly to methods of characterizing shallow semiconductor junctions. In one aspect, the method of characterizing shallow semiconductor junctions comprises providing a substrate comprising a shallow junction formed at a first main surface, where the shallow junction is formed substantially parallel to the first main surface. The method additionally comprises providing a dielectric layer on the first main surface. The method additionally comprises iterating, at least twice, a combination of processes including providing a respective charge on a predetermined area of the dielectric layer via a charge applicator, and measuring a corresponding junction photovoltage for the predetermined area.

Abstract: A solid-state spectral imaging device is described. The device includes an image sensor and a plurality of optical filters directly processed on top of the image sensor. Each optical filter includes a first mirror and a second mirror defining an optical filter cavity having a fixed height. Each optical filter also includes a first electrode and a second electrode having a fixed position located opposite to each other and positioned to measure the height of the optical filter cavity. Further, a method to calibrate spectral data of light and a computer program for calibrating light is described.

Abstract: A portable electrocardiography (ECG) device includes a first pair of first type snap-in buttons at a first plane of a case. The first type snap-in buttons are configured for coupling to ECG electrodes having a second type snap-in button. The portable ECG device also includes a processor in electrical connection with the first pair of first type snap-in buttons. The processor is configured for monitoring and processing electrocardiography signals obtained by the ECG electrodes.

Abstract: The present disclosure relates to methods for determining recombination characteristics at metallized semiconductor surfaces and of metallized semiconductor junctions, based on photo-conductance decay measurements. Dedicated test structures are used comprising a plurality of metal features in contact with a semiconductor surface at predetermined locations, the metal features being provided in a plurality of zones, each of the plurality of zones having a different metal coverage. The method comprises performing a photo-conductance decay measurement in each of the plurality of zones, thereby determining effective lifetimes for different injection levels as a function of metal coverage; and extracting the recombination characteristics from the determined effective lifetimes.

Abstract: In an electret element 100 including a substrate 101, an electrically-conductive electrode 103, and an electret layer 107 including a first dielectric layer 104 and a second dielectric layer 105, when electrical charge charged in the electret layer 107 is negative, a bottom Ec of conductive band of the second dielectric layer 105 is lower than a bottom Ec of the first dielectric layer 104, and when the electrical charge is positive, a top Ev of valence band of the second dielectric layer 105 is higher than a top Ev of the first dielectric layer 104; and a concave portion 106 is formed in a surface of the first dielectric layer 104; and the second dielectric layer 105 is formed to cover the entire of the bottom face 106a and at least a part of the side wall 106b of the concave portion.

Abstract: An optical fluorescence-based sensor comprising at least one sensing element is disclosed. In one aspect, the at least one sensing element comprises a waveguide comprising a waveguide core, a light source optically coupled to an input part of the waveguide core, and a photodetector optically coupled to an output part of the waveguide core, the waveguide core being made of a material comprising a mixture of an optical material and a fluorescent dye.