Abstract: A method is provided for all-optical regeneration of intensity modulated optical signals. A DFB laser diode is selected such that it has a gain bandwidth comprising the signal wavelength, the signal wavelength being outside the stopband of the DFB laser diode. Furthermore, the DFB laser diode is selected such that it can have a bistable amplification characteristic for the signal wavelength showing a hysteresis with an ascending branch and a descending branch, the ascending branch located at a higher input power level than the descending branch. The DFB laser diode is driven such that it operates in the bistable amplification regime, the descending branch of the hysteresis curve located at an input power level above the lower power level of the optical signal pulses and the ascending branch of the hysteresis curve located at an input power level below the upper power level of the optical signal pulses.

Abstract: A semiconductor device is provided comprising a bilayer graphene comprising a first and a second adjacent graphene layer, and a first electrically insulating layer contacting the first graphene layer, the first electrically insulating layer comprising an electrically insulating material, and a substance suitable for creating free charge carriers of a first type in the first graphene layer, the semiconductor device further comprising an electrically insulating region contacting the second graphene layer and suitable for creating free charge carriers of a second type, opposite to the first type, in the second graphene layer.

Abstract: Anchor designs for thin film packages are disclosed that, in a preferred embodiment are a combination of SiGe-filled trenches and Si-oxide-filled spacing. Depending on the release process, additional manufacturing process steps are performed in order to obtain a desired mechanical strength. For aggressive release processes, additional soft sputter etch and a Ti—TiN interlayer in the anchor region may be added. The ratio of the total SiGe—SiGe anchor area to the SiO2—SiGe anchor area determines the mechanical strength of the anchor. If this ratio is larger than 1, the thin film package reaches the MIL-standard requirements.

Abstract: A method and device for testing through-substrate vias (TSVs) in a 3D chip stack are disclosed. In one aspect, the 3D chip stack includes at least a first die having a first electrical circuit and a second die having a second electrical circuit. The first die further includes at least one first TSV for providing electrical connection between the first electrical circuit and the second electrical circuit. The first die further includes test circuitry and at least one second TSV electrically connected between the first TSV and the test circuitry. The electrical connection between the first TSV and the second TSV is made outside the second die. In one aspect, this allows testing the first TSV in the first die even if the second die is not provided with dedicated test circuitry.

Abstract: An organic optoelectronic device and a method for manufacturing the same are disclosed. In one aspect, the device has a stack of layers. The stack includes a buffer layer and a first organic semiconductor layer adjacent to the buffer layer at a first side of the buffer layer. The buffer layer includes at least one transition metal oxide doped with a metal.

Abstract: An optical device for optically multiplexing or demultiplexing light of different predetermined wavelengths is provided, the optical device comprising at least one first waveguide (11) and at least one second waveguide (12) formed on a substrate (10), wherein the at least one first waveguide and the at least one second waveguide intersect at an intersection, comprising a diffraction grating structure (13) formed at the intersection. There exists a first wavelength or wavelength band travelling within the first waveguide (11) exciting the grating structure and being diffracted an angle corresponding to an outcoupling direction and there exists a second wavelength or wavelength band, different from the first wavelength or wavelength band, travelling within the second waveguide (12) exciting the grating structure and being diffracted at an angle corresponding to the same outcoupling direction.

Abstract: A method according to embodiments of the present invention comprises providing a magnetic stack comprising a magnetic layer sub-stack comprising magnetic layers and a bottom conductive electrode and a top conductive electrode electrically connecting the magnetic layer sub-stack at opposite sides thereof; providing a sacrificial pillar on top of the magnetic stack, the sacrificial pillar having an undercut with respect to an overlying second sacrificial material and a sloped foot with increasing cross-sectional dimension towards the magnetic stack, using the sacrificial pillar for patterning the magnetic stack, depositing an insulating layer around the sacrificial pillar, selectively removing the sacrificial pillar, thus creating a contact hole towards the patterned magnetic stack, and filling the contact hole with electrically conductive material.

Abstract: A method for detecting features in digital numeric data comprises obtaining digital numeric data comprising values corresponding to a plurality of sampling points over a domain space having at least one dimension, computing a plurality of scale-space data comprising filtering said digital numeric data using a filter bank, determining a plurality of feature regions each corresponding to a local extremum in scale and location of the scale-space data; and determining a feature region descriptor for each of said plurality of feature regions. The filter bank is a Cosine Modulated Gaussian filter bank in which the standard deviation parameter of the Gaussian equals 1 ? ? ln ? ( 2 ) 2 ? 2 b + 1 2 b - 1 multiplied by the cosine wavelength, in which b is in the range of 0.75 to 1.25, or said filter bank is an Nth-order Gaussian Derivative filter bank with N being in the range of 5 to 20.

Abstract: A method of organizing on-chip data memory in an embedded system-on-chip platform whereon a deterministic application needs to meet a guaranteed constraint on its functional system behavior is disclosed. In one aspect, the method includes: a) dividing the deterministic application into blocks one of which corresponds to a part of a subtask of the application, the block receiving input data and/or generating output data and including internal intermediate data for transforming the input data into the output data, b) splitting the internal intermediate data into state and non-state data, and c) putting the non-state data and a part of the state data in a protected buffering module being part of the data memory and being provided with an error detection and correction module, so that they are available for mitigating the effect of faults on the functional system behavior on-line while meeting the at least one guaranteed constraint.

Abstract: An apparatus for monitoring timing of a plurality of critical paths of a functional circuit includes a plurality of canary circuits, each configured to be coupled to a critical path of a functional circuit for detecting and outputting critical timing events. Each canary circuit includes an adjustable delay element and an analyser circuit for receiving a count of the critical timing event output from at least one of the plurality of canary circuits for a predetermined time interval for a plurality of delay values of the adjustable delay elements and for determining a probability distribution of critical timing events of the at least one of the plurality of critical paths for the predetermined time interval for the plurality of delay values.

Abstract: A semiconductor device and method of manufacturing the device is disclosed. In one aspect, the device includes a semiconductor substrate and a GaN-type layer stack on top of the semiconductor substrate. The GaN-type layer stack has at least one buffer layer, a first active layer and a second active layer. Active device regions are definable at an interface of the first and second active layer. The semiconductor substrate is present on an insulating layer and is patterned to define trenches according to a predefined pattern, which includes at least one trench underlying the active device region. The trenches extend from the insulating layer into at least one buffer layer of the GaN-type layer stack and are overgrown within the at least one buffer layer, so as to obtain that the first and the second active layer are continuous at least within the active device regions.

Abstract: A sensor chip (100) for use in multiplexed analysis of at least one sample is described. The sensor chip (100) comprises a plurality of sensing sites, each sensing site adapted for sensing an optional interaction of a sample with a component and an input waveguide for receiving radiation from a frequency comb radiation source and guiding said radiation along said plurality of sensing sites. At each sensing site, a distinct optical sensitive element is adapted for, at a distinct frequency, sensing an optional interaction of said sample with said component. An output means provides output of the radiation representative for the sensing dependent on said optional interaction of said sample with said component at said plurality of sensing sites.

Abstract: A microfluidic chip (100) for use in multiplexed analysis of samples is described. The microfluidic chip (100) comprises a plurality of sensing chambers (130) and further comprises at least a first fluid supply channel (110) for providing a first fluid and a plurality of microfluidic channels (120). These are in fluid communication with at least one sensing chamber (130) and with the first fluid supply channel (110) for delivery of said first fluid to the at least one sensing chamber. The microfluidic channels (120) are branching off from the supply channel (110) in the neighbourhood of the sensing chamber (130) that can be provided with the first fluid through the microfluidic channel (120). The different channels (110, 120) thus form a tree-like delivery distribution system for supplying the first fluid to said plurality of sensing chambers (130).

Abstract: First several possible working points are stored with different mappings to available modules. Each of these working points involves different trade-offs for important criteria related to performance and costs. At the design stage, these trade-off points for the criteria are not calibrated to the actual run-time conditions. Subsequently, based on actual values of the leakage criteria caused by temperature variations and/or ageing at given run-time conditions for (a subset of) the working points, it is possible to calibrate the trade-off curves and use a run-time controller to select the most suited working points afterward for an actual circuit. These active working points are selected to just meet the necessary system requirements on performance, while minimizing any of the important cost parameters.

Abstract: Methods and apparatus are described in which, at design-time a thorough analysis and exploration is performed to represent a multi-objective “optimal” trade-off point or points, e.g. on Pareto curves, for the relevant cost (C) and constraint criteria. More formally, the trade-off points may e.g. be positions on a hyper-surface in an N-dimensional Pareto search space. The axes represent the relevant cost (C), quality cost (Q) and restriction (R) criteria. Each of these working points is determined by positions for the system operation (determined during the design-time mapping) for a selected set of decision knobs (e.g. the way data are organized in a memory hierarchy). The C-Q-R values are determined based on design-time models that then have to be “average-case” values in order to avoid a too worst-case characterization. At processing time, first a run-time BIST manager performs a functional correctness test, i.e. checks all the modules based on stored self-test sequences and “equivalence checker” hardware.

Abstract: A tunnel transistor is provided including a drain, a source and at least a first gate for controlling current between the drain and the source, wherein the first sides of respectively the first and the second gate dielectric material are positioned substantially along and substantially contact respectively the first and the second semiconductor part.

Abstract: A system for execution of a decoding method is disclosed. The system is capable of executing at least two data decoding methods which are different in underlying coding principle, wherein at least one of the data decoding methods requires data shuffling operations on the data. In one aspect, the system includes at least one application specific processor having an instruction set having arithmetic operators excluding multiplication, division and power. The processor is selected for execution of approximations of each of the at least two data decoding methods. The system also includes at least a first memory unit, e.g. background memory, for storing data. The system also includes a transfer unit for transferring data from the first memory unit towards the at least one programmable processor. The transfer unit includes a data shuffler. The system may also include a controller for controlling the data shuffler independent from the processor.

Abstract: A sensor for sensing pressure is disclosed. The sensor may be a pressure sensor for sensing pressure, or a tactile sensor for sensing tactile events through pressure measurement. In one aspect, the sensor includes at least one pressure sensor having at least one VCSEL on a substrate. It further includes a compressible sensor layer covering a top surface of the at least one VCSEL, and a reflecting element covering a top surface of the sensor layer. A method of manufacturing such a sensor is also disclosed.

Abstract: A method and system are described for determining lithographic processing conditions for a lithographic process. After obtaining input, a first optimization is made for illumination source and mask design under conditions of allowing non-rectangular sub-resolution assist features. Thereafter, mask design is optimized in one or more further optimizations for which only rectangular sub-resolution assist features are allowed. The latter results in good lithographic processing while limiting the complexity of the mask design.

Abstract: The invention relates to a sensor comprising a sensing layer and a surface layer, wherein said surface layer comprises, a first region suitable for adherent growth of cells, and a second region, adjacent to said second layer, suitable for the attachment of proteins, wherein the first and second region are in contact with the sensing layer.