Abstract: A holographic imaging device for imaging an object under study includes a partially reflective surface having a contact side for contacting the object under study and an imaging side for partially reflecting a radiation wave. The device also includes at least one radiation source for projecting the radiation wave onto the imaging side of the partially reflective surface and an image sensor arranged to receive the radiation wave when reflected by the partially reflective surface. The image sensor is adapted for determining an interference pattern between the radiation wave reflected by the imaging side of the partially reflective surface and the radiation wave reflected by the object under study when contacting the contact side of the partially reflective surface.

Abstract: Methods and devices for holographic imaging are disclosed. In some embodiments, a holographic imaging device is disclosed that includes at least one radiation source, a reflective surface, and an image sensor. The at least one radiation source may be configured to emit a radiation wave towards the reflective surface and an object positioned on or near the reflective surface, where the radiation wave is reflected by the reflective surface to produce a reference wave and is reflected directly toward the image sensor by the object to produce an object wave directed at the image sensor. Further, the image sensor may be configured to determine an interference pattern between the reference wave and the object wave. A holographic image representing the object may be reconstructed based on the interference pattern.

Abstract: A method of forming a surface passivation layer on a surface of a crystalline silicon substrate is disclosed. In one aspect, the method includes depositing an Al2O3 layer on the surface, the Al2O3 layer having a thickness not exceeding about 15 nm; performing an outgassing process at a temperature in the range between about 500° C. and 900° C., after the deposition of the Al2O3 layer on the surface; and after the outgassing process, depositing at least one additional dielectric layer such as a silicon nitride layer and/or a silicon oxide layer on the Al2O3 layer.

Abstract: A hardware memory architecture or arrangement suited for multi-processor systems or arrays is disclosed. In one aspect, the memory arrangement includes at least one memory queue between a functional unit (e.g., computation unit) and at least one memory device, which the functional unit accesses (for write and/or read access).

Abstract: The preferred embodiments provide a method for forming at least one metal comprising elongated nanostructure on a substrate. The method comprises exposing a metal halide compound surface to a photon comprising ambient to initiate formation of the at least one metal comprising elongated nanostructure. The preferred embodiments also provide metal comprising elongated nanostructures obtained by the method according to preferred embodiments.

Abstract: Method for pore sealing a porous substrate, comprising: forming a continuous monolayer of a polyimide precursor on a liquid surface, transferring said polyimide precursor monolayer onto the porous substrate with the Langmuir-Blodgett technique, and imidization of the transferred polyimide precursor monolayers, thereby forming a polyimide sealing layer on the porous substrate. Porous substrate having at least one surface on which a sealing layer is provided to seal pores of the substrate, wherein the sealing layer is a polyimide having a thickness of a few monolayers and wherein there is no penetration of the polyimide into the pores.

Abstract: A method and system are disclosed for gathering information about an object including single domain particles which have a diameter in the range of about 5 to 80 nm. In one aspect, a method includes generating a static magnetic field of less than about 0.1 Tesla on the object and generating an RF energy, pulsed or continuous wave, so as to generate electron paramagnetic resonance of the single domain particles. The method also includes detecting the electron paramagnetic resonance of the single domain particles in the form of an image of the object. The single domain particles may have a predetermined diameter and a predetermined saturation magnetization and the applied magnetic field may be such that the single domain particles reach a magnetization being at least about 10% of the saturation magnetization. The method may be used for detecting tags in an object and for activating tags.

Abstract: A method for treating a surface of a porous material in an environment is provided, comprising setting the temperature of the surface to a value T1 and setting the pressure of the environment to a value P1, contacting the surface with a fluid having a solidifying temperature at the pressure value P1 above the value T1 and having a vaporizing temperature at the pressure value P1 below 80° C., thereby solidifying the fluid in pores of the material, thereby sealing the pores, treating the surface, wherein the treatment is preferably an etching or a modification of the surface, and setting the temperature of the surface to a value T2 and setting the pressure of the environment to a value P2 in such a way as to vaporize the fluid.

Abstract: A method for fabricating thin crystalline photovoltaic cells is disclosed. In one aspect, the method includes: forming a weakening layer in a surface portion of a semiconductor substrate; epitaxially growing a stack of semiconductor layers on the substrate for forming an active layer of the photovoltaic cell, the stack having a first thermal coefficient of expansion; providing on the stack patterned contact layer for forming electrical contacts of the photovoltaic cell, the patterned contact layer having a second thermal coefficient of expansion different from the first thermal coefficient of expansion. The process of providing a patterned contact layer simultaneously induces a tensile stress in the weakening layer, resulting in a lift-off from the substrate of a structure including the stack of semiconductor layers and the patterned contact layer.

Abstract: A device and a method for realizing reliable electrical contacts at low temperature and low pressure between conducting materials on, for example, different substrates are disclosed. In one aspect, a rough and brittle intermetallic layer is formed on a conducting material on a first substrate. A soft solder material layer on the other substrate is used for contacting the brittle and rough intermetallic layer that will break. As the solder material is relatively soft, contact between the broken intermetallic layer and the solder material can be realized over a large portion of the surface area. At that stage, a second intermetallic layer is formed between the solder material and the first intermetallic layer realizing electrical contact.

Abstract: A method is disclosed for manufacturing a semiconductor device, including providing a substrate comprising a main surface with a non flat topography, the surface comprising at least one substantial topography variation, forming a first capping layer over the main surface such that, during formation of the first capping layer, local defects in the first capping layer are introduced, the local defects being positioned at locations corresponding to the substantial topography variations and the local defects being suitable for allowing a predetermined fluid to pass through. Associated membrane layers, capping layers, and microelectronic devices are also disclosed.

Abstract: Micromachined reference electrodes for use in miniaturized electrochemical sensors, and methods for fabricating such reference electrodes and electrochemical sensors, for example, as a part of a microfluidic system, are disclosed. Electrochemical measurements allow for inexpensive detection of a wide variety of (bio-)chemical compounds in solution. The reference electrode is one of the main parts of an electrochemical cell. The reference electrode, from which no current is drawn, has a stable, constant potential.

Abstract: A method and apparatus for real-time/on-line performing of multi-view multimedia applications are disclosed. In one aspect, a method of computing a disparity value of a pixel includes computing from two input images a plurality of first costs for a pixel, each cost associated with a region selected from a plurality of regions a first type, the regions covering the pixel and being substantially equal in size and shape. The method also includes computing from the first costs a plurality of second costs each associated with a region selected from a plurality of regions of a second type, the regions of the second type covering the pixel, at least some of the regions of the second type having a substantially different size and/or shape. The method further includes selecting from the second costs the minimal cost and selecting the corresponding disparity value as the disparity value.

Abstract: Disclosed are methods and mask structures for epitaxially growing substantially defect-free semiconductor material. In some embodiments, the method may comprise providing a substrate comprising a first crystalline material, where the first crystalline material has a first lattice constant; providing a mask structure on the substrate, where the mask structure comprises a first level comprising a first opening extending through the first level (where a bottom of the first opening comprises the substrate), and a second level on top of the first level, where the second level comprises a plurality of second trenches positioned at a non-zero angle with respect to the first opening. The method may further comprise epitaxially growing a second crystalline material on the bottom of the first opening, where the second crystalline material has a second lattice constant different than the first lattice constant and defects in the second crystalline material are trapped in the first opening.

Abstract: According to a method of redistributing a functional element of the present invention, an insulating resin layer is supplied onto a functional element wafer such as an LSI. A portion to be a via hole on an electrode pad of the functional element is filled with a sacrificial layer. The top of the sacrificial layer filled in the via hole is exposed from the insulating layer by grinding or polishing. Therefore, it is possible to prevent breakage of a brittle material such as a low-k material in the functional element, which would be caused by transmission of shearing stress when a conventional pillar or a conventional gold projecting electrode is used. The reliability, the yield, and the level of flatness can be improved by forming an interconnection conductive layer after the flattening process of grinding or polishing. Accordingly, a fine conductive interconnection can be formed.

Abstract: A method is disclosed for producing Group III-N field-effect devices, such as HEMT, MOSHFET, MISHFET or MESFET devices, comprising two active layers, e.g. a GaN/AlGaN layer. The method produces an enhancement mode device of this type, i.e. a normally-off device, by providing a passivation layer on the AlGaN layer, etching a hole in the passivation layer and not in the layers underlying the passivation layer, and depositing the gate contact in the hole, while the source and drain are deposited directly on the passivation layer. The characteristics of the active layers and/or of the gate are chosen such that no two-dimensional electron gas layer is present underneath the gate, when a zero voltage is applied to the gate. A device with this behavior is also disclosed.

Abstract: The invention relates to a EHF wireless communication receiver comprising a phased array radio arranged for receiving a beam of signals in a predetermined frequency band. The phased array radio comprises a plurality of antenna paths, each arranged for handling one of the incoming signals and forming a differential I/Q output signal, each antenna path comprises a downconversion part and a phase shifting part for applying a controllable phase shift; a signal combination circuitry is connected to the antenna paths and is arranged for combining the differential I/Q output signals; and a control circuitry is connected to the phase shifting parts of the antenna paths and is arranged for controlling the controllable phase shift. In each antenna path, the phase shifting part is a baseband part downstream from the downconversion part and the phase shifting part comprises a set of variable gain amplifiers arranged for applying controllable gains to the respective downconverted incoming signals in the I/Q branches.

Abstract: The present disclosure is related to a method for the deposition of a continuous layer of germanium on a substrate by chemical vapor deposition. According to the disclosure, a mixture of a non-reactive carrier gas and a higher order germanium precursor gas, i.e. of higher order than germane (GeH4), is applied. In an example embodiment, the deposition is done under application of a deposition temperature between 275° C. and 500° C., with the partial pressure of the precursor gas within the mixture being at least 20 mTorr for temperatures between 275° C. and 285° C., and at least 10 mTorr for temperatures between 285° and 500° C.

Abstract: A system and method for motion detection and the use thereof in video coding are disclosed. In one aspect, a method of defining a region of motion within a video frame in a sequence of video frames comprises loading a current video frame and at least one reference video frame from the sequence, the reference video frame being different from the current video frame. The method further comprises applying filtering operations on the current and the reference video frame in order to obtain at least two scales of representation of the current and the reference video frame. The method further comprises determining for each of the scale representations a video-frame like representation of the structural changes between the current and the reference video frame. The method further comprises combining the video-frame like representations of different scales. The method further comprises determining one or more regions of motion from the combination.

Abstract: Methods of fabricating complementary metal-oxide-semiconductor (CMOS) imagers for backside illumination are disclosed. In one embodiment, the method may include forming at a front side of a substrate a plurality of high aspect ratio trenches having a predetermined trench depth, and forming at the front side of the substrate a plurality of photodiodes, where each photodiode is adjacent at least one trench. The method may further include forming an oxide layer on inner walls of each trench, removing the oxide layer, filling each trench with a highly doped material, and thinning the substrate from a back side opposite the front side to a predetermined final substrate thickness. In some embodiments, the substrate may have a predetermined doping profile, such as a graded doping profile, that provides a built-in electric field suitable to guide the flow of photogenerated minority carriers towards the front side.