Abstract: A heat exchange apparatus (10, 10, 10b) for selectively heating and/or cooling a process fluid (38). A process fluid tubing 14 is wrapped around a primary thermally conductive cylinder (12) having a spiral groove (24) therein adapted for closely accepting the process fluid tubing (14) and increasing the area in thermal contact therebetween. The process fluid tubing (14) is a generally chemically inert tubing. The spiral groove (24) supports the process fluid tubing (14) such that the process fluid tubing (14) can be bent in a radius smaller than the natural minimum bend radius of the process fluid tubing (14). Various embodiments have a cooling apparatus (26, 26a) for cooling the process fluid (38). The cooling apparatus (26, 26a) has a outer thermally conductive cylinder (16) or an outer thermal reservoir (50) cooled alternatively by coolant fluid (44) passing through cooling fluid tubing (18), by a plurality of thermoelectric modules (54), or by a combination thereof.

Abstract: The invention relates to a handheld portable card or disc (22) interface to a crash secure virtual hard disc (24) accessed through the card or disc with software storage capability, and a system (20) therefore. It virtually allows a user to log in on any computer (28) or terminal for retrieving own computer files from the hard disc (22) through the world wide web or Intranet and the like.

Abstract: A semiconductor memory with a sense amplifier for high-speed sensing of the signal from a memory cell. The semiconductor memory includes plural memory arrays having plural memory cells, a sense amplifier, and a latch circuit. The memory cells are precharged when a precharge signal is enabled. The sense amplifier has an additional discharge path enabled by the disabled precharge signal to speed up reading data. The latch circuit is turn off by the enabled precharged signal to hold the data.

Abstract: A method of correcting physically conditioned errors in the measurement of an object detects an image of the object to be measured, measures the imaged object, determines a measurement error caused by structural surroundings of the object, and corrects the measurement result in dependence on the measurement error.

Abstract: For a plurality of logic integrated circuits, initial value vectors associated with flip-flops are retrieved from each of corresponding scan chain sets. The initial value vectors of the same corresponding scan chain set are compared with each other so as to identify elements with fixed values in the initial value vectors. When the total number of the elements with fixed values reaches a predetermined percentage, the elements having fixed values are selected as a golden pattern of the corresponding scan chain set. During the testing, an initial value vector of a scan chain of a logic integrated circuit to be tested is compared with the golden pattern associated with the scan chain, so as to determine whether a faulty flip-flop exists in the scan chain of the logic integrated circuit to be tested.

Abstract: A vertex data access apparatus and method. The apparatus receives a vertex index, compares the vertex index with any vertices' indices used before, issues a request if necessary for fetching vertex data in system memory, stores the return vertex data in a vertex data queue and gets corresponding vertex data from the vertex data queue for further processing and, more particularly, if the vertex index is the same as one of those vertices' indices, the corresponding vertex data can be directly fetched from the vertex data queue. The vertex data queue performs the vertex cache function.

Abstract: A process for fabricating a flip-chip substrate with metal bumps thereon. A flip-chip substrate is provided with conductive points thereon and a conductive film is formed over the surface of the flip-chip substrate to cover the conductive points. A photoresist layer is formed over the conductive layer and then patterned to form openings exposing the underlying conductive points. A copper plating is performed to fill the openings as copper bumps. The photoresist layer and the conductive film are removed. Finally, a solder mask layer is formed over the flip-chip substrate and exposing the copper bumps and an anti-oxidation treatment is performed to finish exposing the copper bumps.

Abstract: A two dimensional array of resistive bolometers (B) is arranged in rows and columns. Amplifiers (A0, A1 etc) amplify signals obtained from the bolometers. Instead of providing one amplifier per column, a smaller number of amplifiers is used each of which is connected to a plurality of column sense lines (L) via a multiplexer (M0, M1 etc).

Abstract: A method of forming shallow trench isolation in a semiconductor substrate. A hard mask having an opening is formed on the semiconductor substrate. The semiconductor substrate is etched through the opening to form a shallow trench. The semiconductor substrate such as silicon substrate is annealed in an ambient containing nitric oxide or nitrogen and oxygen to form a silicon oxynitride film on the shallow trench to serve as a barrier to prevent dopant source/drain outdiffusion. An insulator is then formed on the hard mask to fill the shallow trench. The insulator is planarized while the hard mask is used as the polishing stop layer. Thereafter, the hard mask is removed to expose the upper surface of the semiconductor substrate and leave a shallow trench isolation.

Abstract: A novel heat exchanger includes a thermal reservoir and a tube, the tube having straight sections and corrugated bends, and being in thermal contact with the thermal reservoir. The thermal reservoir has a first plate and a second plate fixed to the first plate. The first plate has a channel formed therein with straight sections to receive the straight sections of the tube, and curved sections for receiving the corrugated sections of the tube. The second plate has a channel formed therein as well that is complementary to the channel of the first plate. The heat exchanger is heated by one or more cartridge heaters. In a particular embodiment, two thermal reservoirs are fixed to one another and the cartridge heaters are disposed in channels formed therebetween. Optionally the thermal reservoirs can be heated or cooled by thermoelectric chips, and can include one or more heat sinks.

Abstract: The invention provides a method of improving silhouette appearance in bump mapping, which not only reduces the operation overhead of applying displacement mapping to a whole model but also retains the truly geometric shape in displaying the object silhouette. The invention comprises the following steps: receiving, checking vertex, checking subdivision, subdividing, repeating, displacing and bump mapping. The invention also discloses a system employing the method of improving silhouette appearance in bump mapping.

Abstract: An integrated circuit device. The substrate includes a signal connection point and two shielding connection points set at the two sides of the signal connection point. The chip is set on the substrate. There are a signal pad and two shielding pads set at the two sides of the signal pad on the edge of the chip. The signal wire bonding is coupled to the signal connection point and the signal pad. Two shielding wire bondings are coupled to the shielding connection points and the shielding pads and extend along both sides of the signal wire bonding. The signal trace line is set on the substrate and coupled to the signal connection point. The power ring circuit is set on the substrate and coupled to the shielding connection points. The power circuit includes two shielding lines extending along both sides of the signal trace line.

Abstract: A two dimensional array of resistive bolometers (B) is arranged in rows and columns. Amplifiers (A0, A1 etc) amplify signals obtained from the bolometers. Instead of providing one amplifier per column, a smaller number of amplifiers is used each of which is connected to a plurality of column sense lines (L) via a multiplexer (M0, M1 etc).

Abstract: A method for detecting dynamic video pixels by using adaptive counter threshold values according to field difference value of the frame in the video, thereby to determine whether the frame is an interlaced frame or a progressive frame and to eliminate incorrect judgements resulting from field difference and to improve accuracy of frame determination.

Abstract: A substrate used in a semiconductor device. The substrate includes a first wiring layer, a second wiring layer, and an interconnection-wiring layer. The first wiring layer includes a plurality of first pads while the second wiring layer includes a plurality of second pads. The interconnection-wiring layer is set between the first and second wiring layer. In this case, at least one of the second pads isn't electrically connected with anyone of the first pads, and other second pads that located adjacent to this second pad, which is not electrically connected with the first pads, electrically connect to the interconnection-wiring layer. Furthermore, this invention also discloses a semiconductor device including the substrate.

Abstract: A DC offset canceling circuit. The DC offset canceling circuit applied in a variable gain amplifier includes chopper circuits, a transconductance amplifier, and at least one internal capacitor. The transconductance amplifier and at least one capacitor function as a filter for canceling DC offset of the variable gain amplifier. A first chopper circuit is inserted between the output of the variable gain amplifier and the input of the transconductance amplifier. A second chopper circuit is inserted between the output of the transconductance amplifier and the capacitor. The DC offset and low frequency noise of the transconductance amplifier, the undesired signal, is translated up to a chopping frequency by chopper circuits. The chopping frequency is much higher than the desired signal bandwidth, and the amount of the undesired signal in the passband of the signal is thereby greatly reduced.

Abstract: A flip chip package structure. The structure includes a substrate, an IC chip electrically connected to the substrate through a plurality of conductive bumps, encapsulant between the substrate and IC chip, and an electrically protective device. The substrate has interior wiring, a plurality of first contacts arranged at a predetermined pitch among each other on a surface, and a trace line area beyond the first contacts on the surface. The electrically protective device has a protruding part covering the IC chip, and an extending part extending over the surface of the substrate with a gap as large as 40 mil. The extending part further covers the trace line area, and connects to the surface of the substrate using a fixing material.

Abstract: Arrays of pyroelectric elements are used in surveillance systems by focusing the radiation from a scene on to them and examining the output from the array. If an object is moved into the scene and left stationary, it will hinder the subsequent operation of the system by masking part of the scene from the field of view of the array; this fault condition may be detected by the following procedure. At intervals arrangements are made to move the image of the scene to and from across the array using a suitable transducer and the outputs from the array are examined. The outputs from the array when the scene is in its normal condition and the image is moved across the array comprise a set of signals corresponding to a reference image, which may be compared with the corresponding outputs from the array when the image is moved across the array on a subsequent occasion.

Abstract: A method of forming a metal-oxide semiconductor (MOS) transistor. A semiconductor substrate is provided. A polysilicon layer is then deposited on the semiconductor substrate. The polysilicon layer is selectively etched to form a gate electrode. A silicon oxide layer is grown on the top and the sidewall. Ions (or dopants) are doped into the semiconductor substrate to form a lightly doped region. Then, a nitride spacer is formed on the sidewall of the silicon oxide layer. Finally, ions are doped into the semiconductor substrate to form a heavily doped region to serve as a source/drain of the MOS transistor.

Abstract: An electrostatic discharge protection circuit. The electrostatic discharge protection circuit utilizes the non-uniform triggering of multi-finger gate-grounded NMOS. The source of the finger which has the potential to trigger on is coupled to the base terminal of all the parasitic bipolar transistor of all the other multi-finger gate-ground NMOS structures. Thus, the finger which has the potential to be triggered can be used as a triggering device to trigger the other finger devices during an ESD event. By using this method, the ESD protection NMOS or PMOS, realized with multi-finger layout structure, can be uniformally triggered on to discharge ESD current. Therefore, it can have a high ESD robustness in a small layout area.