Abstract: A synchronous regulator includes a controller coupled to receive a reference signal and a feedback signal from the regulator operable to provide a pulse width modulation (PWM) signal at its output. The regulator includes at least one gate driver coupled to receive the PWM signal, and a synchronous output switch having a phase node there between controlled by the gate driver, and regulator input current measurement circuitry. The regulator input current measurement circuitry comprises a circuit operable for providing a signal representative of at least one phase node timing parameter, a sensing circuit operable for sensing inductor or output current provided by the regulator, and a calculation circuit coupled to receive the signal representative of the phase node timing parameters and the inductor or output current and is operable to determine the input current.

Abstract: Conduction loss in the body-diode of a low side MOSFET of a power switching stage of one phase of a coupled-inductor, multi-phase DC-DC converter circuit, associated with current flow in the output inductor of that one phase that is induced by current flow in a mutually coupled output inductor of another phase, during normal switching of that other stage, is effectively prevented by applying auxiliary MOSFET turn-on signals, that coincide with the duration of the induced current, to that low side MOSFET, so that the induced current will flow through the turned-on low side MOSFET itself, thereby by-passing its body-diode.

Abstract: A sigma delta converter system and method includes a multi bit quantizer circuit coupled to an output of the converter. A single bit analog-to-digital converter circuit is contained in a feedback path of the converter. The converter includes a feed forward path operable to multiply an input voltage by a feed forward coefficient having a value that is a function of a gain control input signal. The gain control input signal can have a value that is a function of the output of the multi bit quantizer.

Abstract: A method includes simultaneously driving a load via first and second magnetically coupled regulator phases for a first duration, uncoupling one of the phases from the load after the first duration, and, after uncoupling the one phase from the load, allowing a current through the one phase to decay. For example, such a method allows energy stored in the uncoupled phase to be recaptured to the output transient response of a power supply.

Abstract: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.

Abstract: Provided herein are bi-directional buffers, and methods for providing bi-directional buffering. In an embodiment, a bi-directional buffer includes a differential input/differential output amplifier that includes a first input/output node and a second/input output node. The differential input/differential output amplifier is configurable in a first configuration and a second configuration. When in the first configuration, the second input/output node follows the first input/output node. When in the second configuration, the first input/output node follows the second input/output node.

Abstract: A drive control circuit generates switching drive signals for a single phase of a multiphase voltage regulator. A driver circuitry generates the switching drive signals for the voltage regulator responsive to a clock signal. A clock circuitry generates the clock signal responsive to a monitored external clock signal. A phase number detector determines a number of active phases in the multiphase voltage regulator in real time responsive to an indicator on a phase number input monitored by the phase detector.

Abstract: Exemplary embodiments provide an array of solar power generation devices, and method for forming the array. Each solar power generation device can be defined as a cell, a group of cells, a panel subarray, a panel from an array of panels, etc. The solar power generation device can include a controller which can address and control each solar power generation device individually. A test method and fixture is also described, which can be used to program the controller such that incorrect assembly of the array during manufacture is overcome.

Abstract: A system and method for determining an initial duty cycle for startup of a voltage regulator involves generating a first current source responsive to an input voltage to the voltage regulator and generating a second current source responsive to an output voltage of the voltage regulator. A first capacitor is charged using the first current source responsive to a duty cycle of a PWM signal of the voltage regulator to a first voltage. A second capacitor is charged to a second voltage responsive to a period of the PWM signal of the voltage regulator. The initial duty cycle for startup of the voltage regulator is established as the duty cycle of the PWM signal when the first voltage is substantially equal to the second voltage.

Abstract: A signal regulator includes a switching circuit, a controller, and a threshold generator. The switching circuit generates a regulated output voltage, and the controller activates the switching circuit for a predetermined time when the regulated output signal has a predetermined relationship to a threshold voltage. The threshold generator generates the threshold voltage in response to the controller. Generating the threshold voltage in response to the switching controller can reduce the effect that noise has on the operation of the switching circuit, and can thus decrease the magnitude of the noise-induced jitter in the regulator's steady-state switching frequency as compared to conventional switching regulators.

Abstract: A battery charging and power delivery system for a portable electronic device includes a first connection that connects the system to an AC/DC power adaptor. A second connection connects the system to the power bus of the portable electronic device. A third connection connects the system to a battery. A capacitor voltage divider circuit provides power to the system power bus through the second connection and provides power through the third connection. A controller provides control signals to the capacitor voltage divider and to the AC to DC power adaptor.

Abstract: A hysteretic mode controller for controlling a capacitor voltage divider which has a flying capacitor. In one embodiment, the hysteretic mode controller includes an amplifier, a gain circuit and a hysteretic comparator circuit. The amplifier has an input for coupling to the flying capacitor and an output providing a fly voltage. The gain circuit has an input for receiving the input voltage and an output coupled to a reference node providing a reference voltage. The hysteretic comparator circuit has a first input coupled to the output of the amplifier, a second input receiving the reference voltage, and an output for providing a PWM signal to control the capacitor voltage divider. The fly voltage is compared to voltage limits of a hysteretic voltage window for switching the PWM signal. The switching frequency is increased with higher load current to maintain high efficiency.

Abstract: A method and corresponding structure for shielding a floating gate tunneling element. The method comprises disposing a floating gate over a gate oxide using standard CMOS processing in two active areas defined by first and second doped well regions formed in a substrate surrounded by field oxide, and forming a floating gate shield layer so as to enclose the floating gate. The floating gate includes a first floating gate portion over an active area in the first doped well region and a second floating gate portion over the active area in the second doped well region. The first floating gate portion is substantially smaller than the second floating gate portion so as to enable adequate voltage coupling for Fowler-Nordheim tunneling to occur between the first doped well region and the first floating gate portion. The direction of tunneling is determined by high voltage application to one of the doped well regions.

Abstract: An integrated circuit device comprising a diode and a method of making an integrated circuit device comprising a diode are provided. The diode can comprise an island of a first conductivity type, a first region of a second conductivity type formed in the island, and a cathode diffusion contact region doped to the second conductivity type disposed in the first region. The diode can also comprise a cathode contact electrically contacting the cathode diffusion contact region, an anode disposed in the island, an anode contact electrically contacting the anode, and a first extension region doped to the first conductivity type disposed at a surface junction between the first region and the island.

Abstract: A photodetector integrated circuit (PDIC) capable of being used with at least two different types of optical discs includes a photodetector (PD) array and a switch matrix. The PD array includes a center channel PD and a side channel PD electrically isolated from the center channel PD. The switch matrix, which includes a plurality of inputs and a plurality of outputs, can be selectively configured in a plurality of different switch configurations. The side channel PD includes a plurality of electrically isolated PD sections. Each electrically isolated PD section of the side channel PD is adapted to detect light and provide an electrical output signal, indicative of the light detected by the PD section, to a different one of the inputs of the switch matrix.

Abstract: A steady state frequency control circuit for a variable frequency regulator including an open loop frequency control circuit, a frequency detector and a comparator circuit. The variable frequency regulator provides a clock signal indicating actual operating frequency and has a frequency control parameter for adjusting steady state operating frequency. The frequency detector receives the clock signal and provides a frequency sense signal which is compared with a steady state frequency reference signal to provide a frequency adjust signal. The frequency control parameter is adjusted by the frequency adjust signal to control steady state frequency.

Abstract: A method for allowing measurement corrections on a chip-by-chip basis. Error correction values are generated responsive to the input value to a circuit of the calibrated integrated circuit chip and to a measured value from the circuit of the calibrated integrated circuit chip. The error correction values are stored within an error correction table within a nonvolatile memory of the integrated circuit chip.

Abstract: Embodiments of the present invention are directed to light sensors, that primarily respond to visible light while suppressing infrared light. Such sensors are especially useful as ambient light sensors because such sensors can be used to provide a spectral response similar to that of a human eye. Embodiments of the present invention are also directed to methods of providing such light sensors, and methods for using such light sensors.

Abstract: An integrated circuit including a single input pin for determining a value associated with a resistor divider. The circuit includes first circuitry for determining a resistor ratio of the resistor divider through the single input pin. A first register stores a first group of bits representing the resistor ratio. The first group of bits comprises the least significant bits of the value. Second circuitry determines an equivalent resistance of the resistor divider through the single input pin. A second register stores a second group of bits representing the equivalent resistance. The second group of bits comprises the most significant bits of the value associated with the resistor divider.

Abstract: A user-programmable bi-directional, constant current generator circuit allows external programming of either a positive (+) or a negative (?) polarity output current, for injection into one of two locations of the PWM controller circuit of a DC-DC voltage converter. The parameters of the DC-DC converter's offset voltage will depend upon the connection of a single programming pin to one of two programming resistors. The programming resistors are respectively referenced to different supply rail voltages (VCC and VSS). The polarity of the offset additionally depends upon where, within the PWM-controlled DC-DC converter, the programmed constant current is injected.