Abstract: A methodology for generating structural descriptions of complex digital devices from high-level descriptions and specifications is disclosed. The methodology uses a systematic technique to map and enforce consistency of the semantics imbedded in the intent of the original, high-level descriptions. The design activity is essentially a series of transformations operating upon various levels of design representations. At each level, the intended meaning (semantics) and formal software manipulations are captured to derive a more detailed level describing hardware meeting the design goals. Important features of the methodology are: capturing the users concepts, intent, specification, descriptions, constraints and trade-offs; architectural partitioning; what-if analysis at a high level; sizing estimation; timing estimation; architectural trade-off; conceptual design with implementation estimation; and timing closure.

Abstract: Provided is a technique for fabrication of a nitrided gate oxide and shallow trench isolation (STI) oxide liner in a semiconductor depletion into STI oxide and the RNCE in CMOS devices by introducing nitrogen to the STI edges of the p-well. This technique improves isolation performance and is also effective to harden the oxide to reduce boron penetration. Nitridization of the STI liner may be conducted on its own or in combination with gate oxide nitridization, both with beneficial effect with regard to the RNCE. The nitridization may also be focussed on the channel region of the gate oxide in particular in order to mitigate RSCE.

Abstract: A flip-chip integrated circuit die includes a semiconductor substrate, electronic components implemented on the semiconductor substrate, several plural metal layers, wires routed between the electronic components on the metal layers, a top layer, and bump pads arranged in a hexagonal array on the top layer. According to another aspect, the invention is directed to flip-chip integrated circuit design, in which a circuit description is input and standardized cells which correspond to electronic components in the circuit description are obtained. The standardized cells are laid out on the surface of the die using a rectangular-based layout technique, and bump pads are laid out in a hexagonal array.

Abstract: A demodulator suitable for implementation in a single chip for demodulating digital video broadcast signals comprising data modulated on a multiplicity of spaced carrier frequencies, wherein an input broadcast signal is converted to a frequency sufficiently low to enable analog digital conversion of the signal, the demodulator comprising analog to digital conversion means (20) for converting the broadcast signal to a series of digital samples, real to complex conversion means (22) for converting each digital sample to a complex number value, Fourier transform means (24) for analyzing the complex number values to provide a series of signal values for each carrier frequency, frequency control means (9, 38), comprising means responsive to the output of said Fourier Transform means for producing a signal for controlling the frequency of the signal formed by said complex number values, and signal processing means for receiving the signal values and providing an output for decoding, the signal processing means incl

Abstract: Apparatus for arbitrating between requests from a plurality of sources for access to a shared resource, the apparatus comprising: a register means having a plurality of stages, each stage containing a designation of one of said sources, a plurality of stages containing a designation of the same source, logic means for accessing the register stages according to a priority scheme and for comparing the designation in each stage with requests for access, and granting access according to the match between the highest priority source designation and a memory request, and means for changing the contents of the register means subsequent to access grant.

Abstract: A packaging substrate includes a plurality of bonding pads and a plurality of gutters formed thereon. A die having conductive bumps on an electrically active surface thereof is positioned such that the conductive bumps of the die are electrically connected to the bonding pads of the packaging substrate. An underfill material fills the underfill space between the packaging substrate and the die to complete the structure. The plurality of gutters creates a linear flow front of the underfill material as it flows across the underfill space.

Abstract: A method of interfacing a third circuit with a first circuit that operates based upon a first clock signal and a second circuit that operates based upon a second clock signal includes the step of applying the first clock signal and the second clock signal to a clock selector for the third circuit. The method further includes the step of transferring first data signals between the third circuit and the first circuit at a first rate based upon the first clock signal. Another step of the method includes causing the clock selector to apply the first clock signal to the third circuit prior to the step of transferring the first data signals between the third circuit and the first circuit. Yet another step of the method includes transferring second data signals between the third circuit and the second circuit at a second rate based upon the second clock signal.

Abstract: A recordable DVD disk which includes a read-only sector for specifying a video encoding algorithm to be used for compressing video programs that are to be recorded in the recordable region of the recordable DVD disk. Such disks may be used in a digital video recording system having a programmable video encoder. In one embodiment, the system accepts the recordable DVD disks having a read-only sector for storing customized video encoding algorithms and programs the programmable video encoder with the customized video encoding algorithms prior to encoding and recording a video signal on the disk. By designing the video encoding algorithms to optimize one or more of a number of desirable attributes, the DVD media vendors can then create “classes” of recordable DVD disks, i.e. high capacity, high quality, high speed, high image detail, high color resolution, variable frame rate, etc.

Abstract: Apparatus for demodulating digital video broadcast signals with an improved automatic frequency control comprises data modulated on a multiplicity of spaced carrier frequencies, including: analog to digital conversion device for providing a series of digital samples of the broadcast signal, Fourier Transform for analysing the samples to provide a series of data signal values for each carrier frequency signal processing devices for processing the series of data signal values including the phase-error-correcting, and automatic frequency control device for controlling the frequency of the signals input to the Fourier Transform Processor, wherein the automatic frequency control device includes coarse frequency control unit for controlling the frequency in terms of increments of the carrier spacing frequency, and fine frequency control unit for controlling the frequency for values less than a single carrier spacing frequency interval, wherein the coarse frequency unit includes recursive of filtering for assessing

Abstract: A circuit isolation technique that uses implanted ions in embedded portions of a wafer substrate to lower the resistance of the substrate under circuits formed on the wafer or portions of circuits formed on the wafer to prevent the flow of injected currents across the substrate. The embedded ions provide low resistance regions that allow injected currents from a circuit to flow directly to a ground potential in the same circuit rather than flowing across the substrate to other circuits. High energy implantation processes on the order of 1 MeV to 3 MeVs can be used to implant the ions in embedded regions. Multiple energy levels can be used to provide thick embedded layers either prior to or after application of an epitaxial layer. Various masking materials can be used to mask the isolation regions during the implantation process, including hard masking materials such as silicon dioxide or silicon nitride, poly-silicon or an amorphous silicon layer, and a photoresist layer.

Abstract: A method for planarizing an integrated circuit. The integrated circuit is to be planarized to an upper surface using chemical mechanical polishing. The upper surface of the integrated circuit includes regions of a first material and regions of a second material. The first material has a first polishing rate and desired chemical, physical, and electrical properties. The second material has a second polishing rate and desired chemical, physical, and electrical properties. The first polishing rate is greater than the second polishing rate. The regions of the first material adjoin the regions of the second material at interfaces. The upper surface of the integrated circuit is overlaid with a top layer of the second material, that is to be removed by the chemical mechanical polishing. Both the regions of the second material and the top layer of the second material are deposited during a deposition.

Abstract: An initial phase control for an oscillator such as a differential ring voltage-controlled oscillator is disclosed. The initial phase control generally comprises a current source circuit coupled to a first node of the delay cell and a current provider. The current source circuit and current provider are preferably selectively and synchronously in an on or off state such that when the current source circuit and current provider are in an on state, the current source circuit draws a current through the first node of the delay cell and the current provider provides current through a second node of the delay cell. A method for controlling a delay cell and an initial phase control for a differential ring oscillator having a plurality of delay cells in a ring configuration are also disclosed.

Abstract: A recordable DVD disk which includes a read-only sector for specifying a video encoding algorithm to be used for compressing video programs that are to be recorded in the recordable region of the recordable DVD disk. Such disks may be used in a digital video recording system having a programmable video encoder. In one embodiment, the system accepts the recordable DVD disks having a read-only sector for storing customized video encoding algorithms and programs the programmable video encoder with the customized video encoding algorithms prior to encoding and recording a video signal on the disk. By designing the video encoding algorithms to optimize one or more of a number of desirable attributes, the DVD media vendors can then create “classes” of recordable DVD disks, i.e. high capacity, high quality, high speed, high image detail, high color resolution, variable frame rate, etc.

Abstract: In order to correct for common phase error in demodulated digital video broadcast signals which comprise data modulated on a multiplicity of spaced carrier frequencies, a demodulator includes analog to digital conversion means (20) for providing a series of digital samples of the broadcast signal, real to complex conversion means (22) for converting each digital sample to a complex number value, Fourier Transform means (24) for analysing the complex number values to provide a series of data signal values in complex number format for each carrier frequency, and signal processing means for processing the series of data signal values including phase error correcting means (30), the phase error correcting means including means for converting the data signal values from a complex number format to a phase angle format, means for determining a common phase error by assessing the phase of continual pilot signals in the broadcast signals and determining the variation in phase of the continual pilot signals between c

Abstract: A method and apparatus utilizing a data processing system are disclosed for multi-level data communication providing self-clocking. A first digital signal is input which includes a series of digital bits. One of a plurality of output levels is associated with each group of data bits for each of the plurality of the digital bits included within the first digital signal. A particular output level is associated with a clock output level. An output signal is generate which includes a transmission of the output level for each of the groups of digital bits and includes multiple transmissions of the clock output level, where a clock output level is transmitted after each transmission of an output level for each of the groups of digital bits.

Abstract: A process is provided for removing resist mask material from a protective barrier layer formed over a layer of low k silicon oxide dielectric material of an integrated circuit structure without damaging the low k dielectric material, and without the necessity of subjecting the exposed via sidewalls of the low k dielectric material to either a pretreatment to inhibit subsequent damage to the low k dielectric material during the resist removal, or a post treatment to repair damage to the low k material after the resist removal. The resist removal process comprises exposing the resist mask material to a hydrogen plasma formed from a source of hydrogen such as ammonia, while maintaining the temperature below about 40° C. to inhibit attack of the low k silicon oxide dielectric material by oxygen released from the decomposition of the resist material.

Abstract: High energy implantation through varying vertical thicknesses of one or more films is used to form a vertically modulated sub-collector, which simultaneously reduces both the vertical and lateral components of parasitic collector resistance in a vertically integrated bipolar device. The need for a sinker implant or other additional steps to reduce collector resistance is avoided. The necessary processing modifications may be readily integrated into conventional bipolar or BiCMOS process flows.

Abstract: A sample and hold in a switched capacitor circuit with frequency shaping. The sample and hold does not require a pair of large area, power-consuming operational amplifiers and, as such, consumes less power and less area. Preferably, the sample and hold is operable in four different states wherein a different set of switches are closed in each of the four states. The switches are controlled by two clock signals and a plurality of signals derived from the two clock signals, such as four signals derived from the two clock signals. Desirably, the sample and hold with frequency shaping is configured to sample a voltage across a first capacitor while a second capacitor is disconnected from said first capacitor, and is configured to thereafter connect the second capacitor to the first capacitor and possibly discharge at least a portion of a charge held in the first capacitor into the second capacitor.

Abstract: An ASIC device and method provide clock signals to load circuits having a balanced clock tree including a master clock line, for example a clock trunk or H-tree, and branched clock lines feeding the clock signals to load circuits and being balanced with respect to the delays and loads in domains of the ASIC device to which the branched clock lines supply the clock signals. The ASIC device and method generate derived clock signals by gating the master clock signal, in which the derived clock signals have a frequency reduced by a factor n>1 (n=2, . . . , N), which is adapted to the need of the load circuits in a particular domain, and route the master clock signal and/or the derived clock signal for a particular domain to the load circuit of said domain.

Abstract: A support structure is provided between, preferably approximately midway between, a semiconductor die and the inner ends of the lead fingers of a lead frame. Intermediate portions of bond wires connecting the die to the lead fingers are bonded, or tacked, to an upper surface of the support structure. In this manner, the length of the bond wires can be doubled, and the lead fingers can be commensurately further from the die so that a greater number of lead fingers of a given size and spacing can be provided, while avoiding the problems associated with long bond wires.