Abstract: Disclosed is a method and mechanism for virtualizing the resources of multiple physical storage controller cards/HBAs available to a host computer system into a single virtual controller. An Advanced Storage Driver (ASD) may be inserted in a layer above the base device drivers of the storage controllers/HBAs and act as a single virtual controller for access to the end target devices connected to the multiple physical storage controllers/HBAs so that at any point in time the resources of each of the controllers/HBAs may be dynamically allocated to the various requested operations. The ASD may have bi-directional communication with each controller/HBA firmware directly and/or with the base device driver associated with each controller/HBA in order to permit both direct and base device driver controlled communication with each of the physical controllers/HBAs.

Abstract: An apparatus comprising a first circuit, a second circuit and a third circuit is disclosed. The first circuit may be configured to generate an output signal and one or more motion vectors in response to (i) a bitstream signal and (ii) a predictor signal. The second circuit may be configured to generate one or more reference data pixels in response to an address signal and the output signal. The third circuit may be configured to generate the predictor signal and address signal in response to (i) the motion vectors and (ii) the reference data pixels.

Abstract: Embodiments of the invention provide a method associated with a RAID configuration, wherein RAID storage volumes are created by RAID controllers from a shared pool of disk drives. A specified RAID volume is mapped to a virtual target port, and is accessed by each of one or more servers via the virtual target address. One embodiment of the invention is directed to a method associated with multiple RAID controllers, and a pool of disk drives that comprises multiple storage disks. The method comprises operating one or more of the RAID controllers to each configure one or more RAID volumes from selected storage disks. A unique identifier is assigned to each of the RAID volumes, wherein a specified RAID volume is assigned a specified unique identifier, and a particular RAID controller is provided with ownership of the specified RAID volume at a particular time.

Abstract: A timing error sampling generator, a path monitor, an IC, a method of performing timing tests and a library of cells. In one embodiment, the timing error sampling generator includes: (1) a hold delay element having an input and an output and configured to provide a hold violation delayed signal at said output by providing a first predetermined delay to a clock signal received at said input, said first predetermined delay corresponding to a hold violation time for a path to be monitored and (2) a hold logic element having a first input coupled to said input of said hold delay element, a second input coupled to said output of said hold delay element and an output at which said hold logic element is configured to respond to said first and second inputs to provide a clock hold signal when logic levels at said first and second inputs are at a same level.

Abstract: Apparatus and methods for Cyclic Redundancy Check (CRC) error injection between storage controllers and storage devices in a storage system. A plurality of bridge devices are configured in a storage system each coupled persistently coupled to a corresponding one of the plurality of storage devices. Each bridge device may couple to one or more Serial Attached SCSI (SAS) initiators for transferring exchanges between one or more SAS initiators and the attached target storage device. Each bridge device receives parameters from a SAS initiator or an administrative client directing the bridge regarding injection of CRC errors. A log memory in each bridge may log information regarding the injected CRC errors.

Abstract: A method to write data with error checking and correction overlap ranges is disclosed. The method generally includes the steps of (A) receiving plurality of input numbers in a plurality of input signals, (B) generating a plurality of error correction codes by separately operating on each of a plurality of unique pairs of the input numbers, wherein each of the error correction codes is configured to correct at least one error in a corresponding one of the unique pairs and (C) storing the input numbers and the error correction codes in a memory.

Abstract: A system and method for hardware processing of regular expressions is disclosed. A register bank is loaded with state information associated with one or more states of a state machine. State information such as transitions and spin counts are updated as characters of an input data stream are processed. A crossbar is used to interconnect the states stored in the register bank.

Abstract: Methods and apparatus are provided for detecting a syncMark in a read channel, such as a hard disk drive. A syncMark is detected in a sector in an iterative read channel by obtaining a sector signal from a storage media, the sector signal comprising a first syncMark, data and a second syncMark substantially at an end of the sector; determining whether the first syncMark is detected in the sector signal; searching for the second syncMark if the first syncMark is not detected in the sector signal; and detecting and decoding the sector signal based on a detection of the second syncMark. The second syncMark may be positioned, for example, following data in the sector signal. The second syncMark can be searched for in a window within the signal sector that is based on an estimated location of the first syncMark.

Abstract: Disclosed is a method of issuing volume level alerts to provide a warning that indicates overutilization of storage resources in a computer system. Volume level checking is performed without the necessity of checking all the volumes, but only upon the occurrence of certain changes so that the only the most problematic volumes are checked. Hence, only a small number of volumes must be checked and only in response to certain identified changes. The method is applicable to any criterion for overutilization of storage resources which satisfies basic persistency rules. The method is also applicable to assessing risk for the use of other resources, such as communication bandwidth, that are supplied by resource providers, or pools of providers, to users of bandwidth. The principles disclosed can be utilized to check resources on an asset by asset basis, using the free space ratio definition provided to assess risk of overutilization of resources.

Abstract: An electronic device includes an integrated circuit (IC) die attached to a substrate, and electrical conductors connecting the IC die to the substrate. The electronic device also includes a heat spreader located over the IC die and having a concaved portion located over the IC die along with a lateral portion extending from the concaved portion. The lateral portion has a surface area greater than a surface area of the concaved portion. A support member is further included that extends from the lateral portion to and contacts the substrate. An encapsulant covers the support member leaving the lateral and concaved portions exposed on outer sides thereof. In another aspect, a method of manufacturing an electronic device is also included.

Abstract: An IC capacitor bank includes a plurality of high-k metal-insulator-metal (MIM) capacitors connected to a pair of conductive traces. A fusible trace located on an end of one of the pair of conductive traces forms a capacitor column connected between supply lines, such that failure of a dielectric in the MIM capacitors causes the fusible trace to at least partially open thereby limiting a fault current in the capacitor column. Additionally, a method of manufacturing an IC capacitor bank includes providing a plurality of high-k metal-insulator-metal (MIM) capacitors connected to a pair of conductive traces and locating a fusible trace on an end of the pair of conductive traces to form a capacitor column that is connected between supply lines, such that failure of a dielectric in the MIM capacitors causes the fusible trace to at least partially open thereby limiting a fault current in the capacitor column.

Abstract: The present disclosure is directed to a system and method for monitoring drive health. A method for monitoring drive health may comprise: a) conducting a predictive fault analysis for at least one drive of a RAID; and b) copying data from the at least one drive of the RAID to a replacement drive according to the predictive fault analysis. A system for monitoring drive health may comprise: a) means for conducting a predictive fault analysis for at least one drive of a RAID; and b) means for copying data from the at least one drive of the RAID to a replacement drive according to the predictive fault analysis.

Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a multiplexed signal at a fixed frame-rate in response to a video input signal. The multiplexed signal comprises one of (i) a pre-defined packet which corresponds to a new frame rate detected on the video input signal when in a first mode (ii) repeated video frames at the fixed frame-rate when in a second mode and (iii) augmented digitally repeated frames at the fixed-rate when in a third mode. The second circuit may be configured to generate a video output signal in response to decoding (i) the multiplexed signal at the new frame rate defined by the pre-defined packet when in the first mode or (ii) the repeated video frames on the multiplexed signal at the fixed frame-rate when in the second mode.

Abstract: One aspect provides an input/output cell. The input/output cell, in one example, includes an input/output layout boundary delineated on a substrate, wherein the input/output layout boundary defines a first side parallel and opposing a second side, a third side parallel and opposing a fourth side, wherein the first and second sides are substantially perpendicular the third and fourth sides. The input/output cell, in this example, further includes input/output transistors positioned within the input/output layout boundary over the substrate. The input/output cell, in this example, further includes first and second power conductors and first and second ground conductors located over the substrate, the first power conductor and first ground conductor extending entirely between the first and second sides and the second power conductor and second ground conductor extending entirely between the third and fourth sides.

Abstract: A video encoding system generates (e.g., H.264) single-slice pictures using parallel processors. Each picture is divided horizontally into multiple segments, where each different parallel processor processes a different segment. Each parallel processor (other than the first parallel processor of the uppermost segment) only partially processes the macroblocks in the first row of its segment. Subsequently, a final processor completes the processing of the partially encoded, first-row macroblocks based on the encoding results for the macroblocks in the last row of the segment above and across the segment boundary. The encoding of the first-row macroblocks is constrained to enable the encoding of all other rows of macroblocks to be completed by the parallel processors, without relying on the final processor.

Abstract: The present invention is directed to a method for deterministic Serial Attached Small Computer System Interface (SAS) discovery and configuration. The method includes transmitting a Serial Management Protocol (SMP) DISCOVER Request from a node of a SAS domain to each expander of the SAS domain. The method further includes receiving SMP DISCOVER Responses at the node from each expander of the SAS domain. The method further includes comparing BROADCAST (CHANGE) RECEIVED (BCR) counts provided in each of the received SMP DISCOVER Responses to stored BCR counts, said stored BCR counts having been recorded and stored by the node prior to said transmitting of said SMP DISCOVER Request. The method further includes updating the stored BCR counts based upon said received BCR counts. The method further includes selectively transmitting a second SMP DISCOVER Request from the node to at least one, but not all of the expanders of the SAS domain.

Abstract: The different illustrative embodiments provide a method and apparatus for managing peak detector circuits. A first number of voltages for a first number of signals detected by a peak detector circuit connected to a wire in a bus system is identified. The first number of signals is used to send data over the wire. The first number of voltages is for a first number of transmission speeds for the first number of signals. A second number of voltages for a second number of signals detected by the peak detector circuit is identified. The second number of signals is present in the wire in an absence of the data being sent over the wire. The second number of voltages is for a second number of transmission speeds for the second number of signals. A number of settings are selected for the peak detector circuit based on the first number of voltages and the second number of voltages.

Abstract: Methods and structure within a storage system for tuning performance of the storage system based on monitored block level access within the storage system. Block level access, either in cache memory or on the storage devices of the storage system, is monitored to detect patterns of access and/or data that correspond to an identified host system program. Based on the identified host system program, a profile of desired storage device configuration information is selected by the storage system. The profile comprises information identifying optimal configuration of a logical volume used by the corresponding host system program. Reconfiguration options are identified from the profile information and used either to automatically reconfigure the logical volume or are presented to a user to permit the user to select desired options from the reconfiguration options.

Abstract: Methods and structure for automated determination and reconfiguration of the size of a cache memory in a storage system. Features and aspects hereof generate historical information regarding frequency of hits on cache lines in the cache memory. The history maintained is then analyzed to determine a desired cache memory size. The historical information regarding cache memory usage may be communicated to a user who may then direct the storage system to reconfigure its cache memory to a desired cache memory size. In other embodiments, the storage system may automatically determine the desired cache memory size and reconfigure its cache memory. The method may be performed automatically periodically, and/or in response to a user's request, and/or in response to detecting thrashing caused by least recently used (LRU) cache replacement algorithms in the storage system.

Abstract: A method includes associating a spatially separate audio sensor and/or a vibration sensor with an audio processing system having one or more audio sensor(s) associated therewith. The spatially separate audio sensor is on a remote location distinct from that of the one or more audio sensor(s). The method also includes capturing information uniquely associated with an external environment of the audio processing system through the spatially separate audio sensor and/or the vibration sensor and the one or more audio sensor(s), and adapting an audio output of the audio processing system based on the captured information uniquely associated with the external environment thereof.