Abstract: A metallic reflector device having one or an array of individual reflector elements for positioning over a corresponding one or array of light sources, preferably comprising one or more light emitting diodes (LEDs). The metallic reflector device includes a planar base and a plurality of the reflector elements. The planar base has one or a plurality of apertures, each aperture having an edge that defines a proximal rim of the reflector element. Each reflector element includes an annular sidewall having an inner surface that extends from the proximal annular rim to a distal annular rim. The proximal annular rim defines a first opening through which direct and reflected light from a light source is emitted. The distal annular rim defines a second opening through which the light source is disposed. The inner surface of the annular sidewall is formed from the material of the planar sheet by mechanically deforming the planar sheet, such as by stamping or drawing.

Abstract: Data segments are logically organized in groups in a data repository. Each segment is stored at an index in the data repository. In association with a write request, a hash algorithm is applied to the data segment to generate a group identifier. Each group is identifiable by a corresponding group identifier. The group identifier is applied to a hash tree to determine whether a corresponding group in the data repository exists. Each existing group in the data repository corresponds to a leaf of the hash tree. If no corresponding group exists in the data repository, the data segment is stored in a new group in the data repository. However, if a corresponding group exists, the group is further searched to determine if a data segment matching the data segment to be stored is already stored. The data segment can be stored in accordance with the results of the search.

Abstract: Methods and apparatus are provided for measuring servo address mark distance in a read channel using selective fine phase estimates. A distance between servo address marks (SAMs) in servo data of a magnetic recording media can be computed by obtaining a count of a number of time intervals between SAM patterns; obtaining a plurality of fractional phase estimates; selecting at least one of the plurality of fractional phase estimates as a selected fractional phase estimate based on a selection criteria; and combining the count and the selected fractional phase estimate to compute the distance. The fractional phase estimates can include a first fractional phase estimate having a lower resolution and higher accuracy in the presence of frequency errors relative to a second fractional phase estimate and wherein the second fractional phase estimate has more resolution and lower accuracy in the presence of the frequency errors relative to the first fractional phase estimate.

Abstract: An integrated circuit package substrate includes a first and an additional electrically conductive layer separated from each other by an electrically insulating layer, a contact pad formed in the first electrically conductive layer for making a direct connection between the integrated circuit package substrate and a printed circuit board, and a cutout formed in the additional electrically conductive layer wherein the cutout encloses an area that completely surrounds the contact pad for avoiding parasitic capacitance between the additional electrically conductive layer and the printed circuit board.

Abstract: In certain embodiments, a slave node in a packet network achieves time synchronization with a master node by implementing a packet-layer synchronization procedure, such as the IEEE1588 precision timing protocol (PTP), to set the slave's local time based on the master's time. The slave's local time is then maintained by implementing a physical-layer syntonization procedure, such as synchronous Ethernet, without relying on the packet-layer synchronization procedure. The packet-layer synchronization procedure may be selectively employed to adjust the slave's local time (if needed) after significant periods of time (e.g., substantially greater than one second). Both the packet-layer synchronization procedure and the physical-layer syntonization procedure are traceable to a common reference timescale (e.g., UTC). Depending on the implementation, the packet-layer synchronization procedure can be, but does not have to be, terminated when not being employed to adjust the slave's local time.

Abstract: In one embodiment, an LDPC decoder has a controller and an extrinsic log-likelihood (LLR) value generator. The extrinsic LLR value generator is selectively configurable to operate in either (i) a non-averaging mode that updates extrinsic LLR values without averaging or (ii) an averaging mode that updates extrinsic LLR values using averaging. Initially, the extrinsic LLR value generator is configured to generate non-averaged extrinsic LLR values, and the decoder attempts to recover an LDPC-encoded codeword using the non-averaged extrinsic LLR values. If the decoder is unable to recover the correct codeword, then (i) the controller selects the averaging mode, (ii) the extrinsic LLR value generator is configured to generate average extrinsic LLR values, and (iii) the decoder attempts to recover the correct codeword using the average extrinsic LLR values. Averaging the extrinsic LLR values may slow down the propagation of erroneous messages that lead the decoder to convergence on trapping sets.

Abstract: A method of manufacturing an electronic device package. Coating a first side of a metallic layer with a first insulating layer and coating a second opposite side of the metallic layer with a second insulating layer. Patterning the first insulating layer to expose bonding locations on the first side of the metallic layer, and patterning the second insulating layer such that remaining portions of the second insulating layer on the second opposite side are located directly opposite to the bonding locations on the first side. Selectively removing portions of the metallic layer that are not covered by the remaining portions of the second insulating layer on the second opposite side to form separated coplanar metallic layers. The separated coplanar metallic layers include the bonding locations. Selectively removing remaining portions of the second insulating layer thereby exposing second bonding locations on the second opposite sides of the separated coplanar metallic layers.

Abstract: A method for color tone correction is disclosed. The method generally includes the steps of (A) generating a plurality of first intermediate components by scaling a plurality of first color components towards a first ideal color, wherein the first color components (i) are for a first plurality of pixels in an input video signal and (ii) fall inside a first region of a color space, (B) generating a plurality of first corrected components by adjusting the first intermediate components such that a first mapping of the first color components to the first corrected components is both (i) continuous in the color space and (ii) non-overlapping in the color space and (C) generating an output video signal by combining the first corrected components with a plurality of unaltered color components, wherein the unaltered color components (i) are for a second plurality of the pixels and (ii) fall outside the first region.

Abstract: A method of double detection in a perpendicular magnetic read channel is disclosed. The method generally includes the steps of (A) generating an intermediate signal by performing a first detection on an input signal of the perpendicular read channel, the first detection having a first error rate, (B) generating a statistics signal based on the intermediate signal, the statistics signal conveying noise statistics that depend on data in the input signal and (C) generating an output signal by performing a second detection on the input signal using the noise statistics to reduce a second error rate of the second detection compared with the first error rate, wherein the first detection is independent of the second detection.

Abstract: Embodiments of the invention include a copper interconnect structure having increased electromigration lifetime. Such structures can include a semiconductor substrate having a copper layer formed thereon. A dielectric barrier stack is formed on the copper layer. The dielectric barrier stack includes a first portion formed adjacent to the copper layer and a second portion formed on the first portion, the first portion having improved adhesion to copper relative to the second portion and both portions are formed having resistance to copper diffusion. The invention also includes several embodiments for constructing such structures. Adhesion of the dielectric barrier stack to copper can be increased by plasma treating or ion implanting selected portions of the dielectric barrier stack with adhesion enhancing materials to increase the concentration of such materials in the stack.

Abstract: A memory controller including an address incrementer and a page crossing detect logic. The address incrementer may be configured to generate a next address in a burst from a current address in the burst. The page crossing detect logic may be configured to determine whether the burst will cross a memory page boundary based on the current address and the next address. The memory controller may be configured to automatically split bursts crossing page boundaries.

Abstract: A method of waiving verification failures is disclosed. The method generally includes the steps of (A) generating a plurality of circuit error files by performing a plurality of physical verifications on a plurality of circuit designs, the circuit error files containing a plurality of circuit errors of the circuit designs, (B) generating a system error file by performing an additional physical verification on a system design, the system error file containing a plurality of system errors of the system design, the system design incorporating the circuit designs and (C) generating a valid error file by removing the circuit errors from the system error file, the valid error file containing a plurality of valid errors comprising a subset of the system errors.

Abstract: A system comprising a first memory, a second memory, and a controller. The first memory may be configured to store a first firmware. The second memory may be configured to store a second firmware similar to the first firmware stored on the first memory. The controller may be configured to (i) operate the first firmware stored on the first memory, (ii) discontinue operating the first firmware in response to a failure of the first firmware, and (iii) begin operating the second firmware after discontinuing operation of the first firmware.

Abstract: An improved integrated circuit cell architecture is provided for configurability between a memory cell or logic elements. The cell architecture is configured on variable layers above a first layer of metal, with the first layer of metal and layers therebelow reserved as fixed layers. By coupling a maximum of two layout cells together, a single-port or dual-port memory cell is realized. Likewise, by interconnecting transistors within a single cell or transistors among two or more cells, a logic device is realized. Within each cell, the bit lines are arranged on a layer separate from the wordlines, and extend orthogonal to each other.

Abstract: A method for transcoding from an MPEG-2 format to a VC-1 format is disclosed. The method generally comprises the steps of (A) decoding an input video stream in the MPEG-2 format to generate a picture; (B) determining a mode indicator for the picture; and (C) coding the picture into an output video stream in the VC-1 format using one of (i) a VC-1 field mode coding and (ii) a VC-1 frame mode coding as determined from the mode indicator.

Abstract: An apparatus including a controller configured to present one or more commands and receive one or more responses, a plurality of transport circuits configured to receive one of the commands, present the responses, and generate one or more control signals, and a plurality of memory-controlling circuits, each coupled to a respective one of the plurality of transport circuits and configured to generate one or more memory access signals in response to the one or more control signals, receive one or more memory output signals from a respective memory in response to the one or more memory access signals, and generate the responses in response to the one or more memory output signals. Each respective memory may be independently sized. The controller generally provides a common testing routine for each respective memory that may be adjusted for the size of each respective memory by the memory-controlling circuits.

Abstract: A reflector assembly for a lighting apparatus, the reflector assembly comprising two or more reflector modules configured for associating with one or more light sources, each reflector module comprising one or more reflectors for being located adjacent to a light source when the reflector module is associated with the one or more light sources, the one or more reflectors configured to reflect light from the adjacent light source. The reflector modules may further comprising a cover plate defining a plurality of light source apertures for allowing a light source to protrude through the cover plate, at least a first of the one or more light source apertures disposed adjacent to an overhead reflector and at least a second of the one or more light source apertures disposed adjacent to a lateral reflector.

Abstract: In a hard-disc drive, a defect region on the hard disc is classified as corresponding to either thermal asperity (TA) or media defect (MD) by generating two statistical measures. A first measure (e.g., ?1) is based on (i) the magnitudes of one or both of signal values (e.g., equalizer input or output signal values) and the corresponding expected values of those signal values and (ii) the signs of one or both of the signal values and the expected signal values. A second measure (e.g., ?2) is based on the magnitudes of one or both of the signal values and the expected signal values, but not the signs of either the signal values or the expected signal values. The two measures are then compared to determine whether the defect region corresponds to TA or MD.

Abstract: Described embodiments provide a method for calibrating a continuous-time filter having at least one adjustable parameter. A square-wave signal is filtered by a continuous-time filter having a cutoff frequency less than fs. The filtered signal is quantized at the rate fs. An N-point Fourier transform is performed of the quantized signal into N real output values and N imaginary output values. At least one of the real output values are accumulated to form a real output signal and at least one of the imaginary output values are accumulated to form an imaginary output signal. The real and imaginary output signals are summed to form an output signal, which is then squared. The squared output signal is compared to a comparison value. At least one parameter of the continuous-time filter is adjusted based upon the comparison. The steps are repeated until the squared output signal is approximately the comparison value.

Abstract: Methods and apparatus for managing exchange IDs for multiple asynchronous dependent I/O operations generated for virtual Fibre Channel (FC) target volumes. Features and aspects hereof allocate a range of exchange identifier (X_ID) values used in issuing a plurality of physical I/O operations to a plurality of physical FC target devices that comprise the virtual FC target volume. The plurality of physical I/O operations are dependent upon one another for completion of the original request to the virtual FC target volume and allow substantially parallel operation of the plurality of physical FC target devices. A primary X_ID is selected from the range of allocated X_ID values for communications with the attached host system that generated the original request to the virtual FC target volume.