Abstract: Apparatus, systems and methods for clustering multiple PCI Express hierarchies to enable access of components in different hierarchies. Each PCI Express hierarchy includes a root device as well as a cluster port for coupling each hierarchy to each other hierarchy of a physical cluster through a PCI Express switched fabric. Memory addresses and transaction IDs are re-mapped by the cluster port of each hierarchy to partition the PCI Express space of the system of multiple hierarchies. A first portion of the partitioned space is reserved for access to local components within a hierarchy. A second portion of the space is used to access remote components of other hierarchies from within a different first hierarchy. The address and transaction ID values exchanged in such remote transactions are re-mapped and used by the cluster port of each hierarchy to route exchanges between hierarchies using standard PCIe root devices, endpoint devices, and switches.

Abstract: An embodiment of the present invention is disclosed to include a SATA Switch allowing for access by two hosts to a single port SATA device Further disclosed are embodiments for reducing the delay and complexity of the SATA Switch.

Abstract: An embodiment of the present invention is disclosed to include a SATA Switch allowing for access by two hosts to a single port SATA device Further disclosed are embodiments for reducing the delay and complexity of the SATA Switch.

Abstract: An embodiment of the present invention is disclosed to include a SATA Switch allowing for access by two hosts to a single port SATA device Further disclosed are embodiments for reducing the delay and complexity of the SATA Switch.

Abstract: An embodiment of the present invention is disclosed to include a hard disk drive allowing for access by two hosts to a device. Further disclosed are embodiments for reducing the delay and complexity of the SATA disk drive.

Abstract: A method for calibrating a center error signal in an optical disc system, comprising the steps of (i) measuring a peak-to-peak value of the center error signal, (ii) computing a nominal peak-to-peak value of the center error signal after locking to a particular track of an optical disc, (iii) computing the nominal peak-to-peak value of the center error signal for a run-out condition, and (iv) defining a calibration gain for the current value for the center error signal.

Abstract: A method for demodulating a focusing error signal in an optical disc system, comprising the steps of (A) generating a beam strength signal and the focusing error signal, (B) sampling the beam strength signal and the focusing error signal at an appropriate sampling rate, (C) removing a static offset from the beam strength signal and the focusing error signal, (D) calibrating a peak-to-peak value of the beam strength signal and the focusing error signal, and (E) determining an appropriate phase to (i) demodulate the focusing error signal and (ii) calculate a vertical position of a lens in relation to a disc.

Abstract: An apparatus and method for storing image data comprising a first storage device and a second storage device. The first storage device may be configured to store at least one first pixel from a first field of a frame of the image at a first physical address in the first storage device. The second storage device may be configured to store a second pixel from a second field of the frame of the image at a second physical address in the second storage device. The first and second physical addresses may have the same relative position in an address space of the respective storage devices.

Abstract: Electronic component supporting mediums includes dielectric support material having voids adapted to include the use of air as a dielectric, which is commonly used in printed circuit boards and electrical connectors. The support medium provides physical support to conductive connections and a mechanical structure to enable electrical connections between electronic components. Support structures including air as a dielectric can be provided in the form of printed circuit boards and electrical connectors. A printed circuit board wherein said dielectric material comprises a low loss material. The support medium can comprise a low loss material such as air, FR-4, Teflon material, and plastic.

Abstract: A system, apparatus and method for testing and optimizing an electrical device using a simultaneous display of both a signal's eye diagram and total jitter profile are described. In one embodiment of the invention, a data capture module capable of obtaining and separating the total jitter present in a signal into deterministic and random jitter, as well as other eye diagram information, is coupled to the electrical device and one or more display devices. These one or more display devices provide a user a simultaneous visual display of both random jitter and an eye diagram. This simultaneous display allows a user to test and optimize the electrical device without having to attach and detach the electrical device to multiple measuring devices.

Abstract: A method for implementing test generation for systematic scan reconfiguration in an integrated circuit is presented. The method may comprise: defining at least one set of detectable faults; setting an SAS decoder configuration, the SAS decoder configuration including a don't-care bit; generating an ATPG pattern; and applying the ATPG pattern to one or more scan chain segments having a segment address associated with the SAS decoder configuration.

Abstract: Disclosed is an articulated cable chain 102 that has a flat spring that initiates a first folding curve that holds the articulated cable chain 102 in a tight radius. Once the first folding curve 122 is properly initiated, the remaining folding curves in the articulated cable chain 102 are folded at the proper locations and have a small radii, even though the cable within the articulated cable chain tends to cause the cable chain to maintain a straighter configuration.

Abstract: An integrated circuit with a monolithic semiconducting substrate formed in a chip, where the chip has a peripheral edge, a backside, and an opposing top on which circuitry is formed. A first ring of bonding pads is formed along at least a portion of the peripheral edge. At least one of the bonding pads is configured as a power pad, and at least one of the bonding pads is configured as a ground pad. An intermediate power bus is disposed interior to the first ring of bonding pads on the chip, and forms no direct electrical connections to any core devices. An intermediate ground bus is also disposed interior to the first ring of bonding pads on the chip, and forms no direct electrical connections to any core devices. A power pad wire forms an exclusive electrical connection between the power pad and the intermediate power bus. A ground pad wire forms an exclusive electrical connection between the ground pad and the intermediate ground bus.

Abstract: Process and apparatus provide reactive radicals generated from a remote plasma source which contact a portion of a substrate surface simultaneous with a contact of the same substrate surface with a light source which locally activates the portion of the substrate surface in contact with said radicals.

Abstract: A mask for exposing a first layer and a second layer on a process substrate, where the first and second layers are two separate layers of an integrated circuit. The mask includes a mask substrate that is substantially completely transmissive to a first wavelength of light and a second wavelength of light. A layer of a first material is disposed on the mask substrate, where the first material is substantially opaque to the first wavelength of light. The layer of the first material is patterned for the first layer. A layer of a second material is disposed on the mask substrate, where the second material is substantially opaque to the second wavelength of light. The layer of the second material is patterned for the second layer, where the layer of the first material and the layer of the second material are aligned on the mask substrate for proper alignment of the first and second layers on the process substrate.

Abstract: The present invention is directed to a system and method for supporting an alternative peer-to-peer communication over a network in a SAS cluster when a node cannot communicate with another node through a normal I/O bus (Serial SCSI bus). At startup, driver may establish the alternative path for communication but may not use it as long as there is an I/O Path available. In the present invention, two types of P2P calls, such as event notification calls and cluster operation calls may be supported.

Abstract: A method for filtering digital video is disclosed. The method generally includes the steps of (A) checking a plurality of original blocks in an original field for a plurality of artifacts, wherein detection of the artifacts is based on an adjustable threshold, (B) first filtering each of the original blocks having at least one of the artifacts to remove the at least one artifact and (C) second filtering each of the original blocks lacking at least one of the artifacts to remove noise, wherein the second filtering is (i) motion compensated and (ii) adaptive to a respective noise level in each of the original blocks.

Abstract: An improvement to a digital integrated circuit of the type having a functional circuit that is susceptible to damage from an electrostatic discharge. An electrostatic discharge protection element is placed in series with the functional circuit and disposed upstream in a normal direction of current flow from the functional circuit. The electrostatic discharge protection element includes at least one of a resistive choke that exhibits thermal runaway and an inductive choke.

Abstract: Correlation values in the vertical direction, horizontal direction and two diagonal directions are obtained in a pixel signal of RGB Bayer pattern. The correlation values are calculated using G signals. Between a first pair of the vertical and horizontal directions and a second pair of the two diagonal directions, one pair having a greater correlation difference is selected. Then, a direction having a stronger correlation is selected in the selected pair having a greater correlation difference, and pixel interpolation is performed in the selected direction. Alternatively, pixel interpolation is performed following assignment of weights in two directions of the selected pair having a greater correlation difference in accordance with the proportion of their correlations.