Abstract: A method and system for preventing information losses during alternative frequency searches by a receiving unit in a communication system in which data is channel coded, interleaved, and segmented into a plurality of frames. The method comprises the steps of discontinuing demodulation at a predetermined time before a frame ends, inserting zero values into the frame, and performing a search for alternative frequencies while continuing to insert zero values into the frame and then a next frame. After the search is completed, insertion of zero values is discontinued and demodulation is resumed. In one preferred version, the receiving unit comprises a mobile radio station operating at a serving frequency. The step of inserting zero values is followed by a step of programming the mobile radio station to a search frequency and waiting for the mobile radio station to settle.

Abstract: The present invention provides a method and apparatus for conditioning a polishing pad in which slurry is directed under pressure at the polishing pad. Additionally, energy (i.e., ultrasonic energy) may be added to the slurry as it is directed towards the polishing pad, wherein embedded material in the polishing pad is removed or dislodged.

Abstract: Provided is a die clip for use in semiconductor flip chip packaging as a replacement for the conventional combination of a heat spreader and stiffener, a packaging method using the die clip, and a semiconductor package incorporating the die clip. In a preferred embodiment, the die clip is a piece of high modulus, high thermal conductivity material shaped to attach over a die on the surface of a packaging substrate. The die clip closely engages the die while leaving some space open around the perimeter to provide access to the die. An underfill material may then be dispensed into the gap between the die and the substrate through an opening in the die clip. The underfill material is then cured, the die clip providing a heat sink and keeping the die and substrate flat and immobile during and after the curing process. A BGA process may then be used to apply solder balls to the underside of the substrate for subsequent bonding of the package to a circuit board for use.

Abstract: An integrated circuit structure is provided with an inductor formed therein which comprises a metal coil on an insulated surface over a semiconductor substrate, and a high magnetic susceptibility cobalt/nickel metal core located adjacent said metal coil, but spaced therefrom by one or more insulation layers. In one embodiment, the high magnetic susceptibility cobalt/nickel metal core is placed between lower and upper portions of the metal coil which are interconnected together by filled vias. In another embodiment, the metal coil is formed in a serpentine shape in one plane on an insulated surface over the semiconductor substrate, and the high magnetic susceptibility cobalt/nickel metal core is formed over the serpentine coil, but spaced from the serpentine coil by another insulation layer.

Abstract: A transceiver pair is connected by a plurality of high speed serial lines that are tightly integrated into an enhanced communications system. The communications system includes a base transceiver, a remote transceiver, and a plurality of high speed serial lines operably coupled between them. The base transceiver includes a first base input port for receiving parallel data, a plurality of first base output ports for outputting serialized data and a plurality of base serializers operably coupled between the first base input port and the plurality of first base output ports. The plurality of base serializers convert the parallel data into the serialized data. A base input demultiplexer is operably coupled between the first base input port and the plurality of base serializers.

Abstract: A vibration dampening mechanism for operative arrangement with a data storage media drive canister, having: a cantilevered dampening spring secured to a surface of, or integral with, a side of a housing for the drive canister. The spring has a free end that can extend over an aperture through the housing side. The spring can comprise a bent portion, having an outer bend surface, between a secured end and the free encl. When installed in a canister support structure, this outer bend surface will contact an under surface of the structure causing the bent portion to at least partially flatten; the free end may deflect into the aperture. Also, a storage media drive vibration dampening system for operation with a media drive canister support structure having: a cantilevered dampening spring secured to, or integral with, a side of a drive canister housing.

Abstract: Digital interference rejection of a signal is accomplished by first converting the signal to digital. Then a second signal is generated and mixed with the first signal. This combined signal is then filtered. The signal can then be scaled as needed, resulting in a finely tuned, interference free signal.

Abstract: An integrated circuit including a substrate having a memory area and a non-memory area. An embedded memory is fabricated on the substrate within the memory area. First and second semiconductor cells are fabricated on the substrate within the non-memory area. An electromagnetic shield covers substantially memory area. A routing layer is fabricated over the memory and non-memory areas and over the electromagnetic shield. A signal wire is electrically coupled between the first and second semiconductor cells and has a conductive segment which is routed within the routing layer and extends over the memory area.

Abstract: A computer network is provided with a low-complexity sequence identification number determination method. In one embodiment, the computer network comprises a local node coupled to a remote node by a serial communications link to conduct data exchanges with the remote node. Each data exchange is provided with an exchange identification number, and each data exchange is made up of sequences of consecutive frames. Each sequence transmitted from the local node is assigned a sequence identification number by the local node. To maintain the uniqueness of the serial identification numbers of concurrently active sequences, a portion of each serial identification number is set equal to the exchange identification number of the data exchange of which the sequence is a part. The exchange identification number may be one assigned to the exchange by the remote node. In one implementation, the sequence identification number is a byte having the six most significant bits set equal to the exchange identification number.

Abstract: A video encoder typically includes a preprocessor, a frame store, a motion compensator, and a compression module. The preprocessor converts an incoming digital video signal to image macroblocks. The frame store stores the macroblocks from anchor frames, and the motion compensator searches neighborhoods in anchor frames for best matches to macroblocks from a current frame. The compression module receives a vector from the motion compensator indicative of the best match and uses it to compress the macroblocks from the current frame. The compressed macroblocks are provided as components of a compressed video output bitstream. To perform the neighborhood search, the motion compensator accesses many neighborhood macroblocks from the anchor frame for each macroblock from the current frame. To reduce the number of memory accesses, the motion compensator caches the neighborhood macroblocks. Since the search neighborhoods for adjacent macroblocks overlap, caching is effective.

Abstract: A method is provided for forming thin polysilicon transistor gates using dual doped polysilicon without reducing the ion implant energy. The method comprises depositing polysilicon over a region of a substrate, masking and implanting the polysilicon with dopant impurities to form the channel regions of one conductivity type, and removing the photo resist mask. The polysilicon layer is then masked to define the channel regions of the opposite conductivity type and is implanted with dopant impurities of the opposite conductivity type. Following the dual ion implantation, the photo resist mask is removed and the substrate may be annealed to activate the dopants in the polysilicon. The dual doped polysilicon layer is then polished using a chemical-mechanical polish to achieve a desired thickness for the polysilicon transistor gates. The polysilicon is subsequently masked and etched to define the polysilicon transistor gates.

Abstract: A data processor including an alternative clock generator for generating, in a power saving mode, an alternative clock signal which is supplied to a peripheral circuit instead of a system clock signal. This enables only the peripheral circuit such as an A/D converter to be put into operation in response to the alternative clock signal in the power saving mode. This solves a problem of a conventional data processor in that it cannot achieve the power saving efficiently because it is unavoidable for the remaining portion of the conventional data processor like a CPU to be involved in a high-rate operation along with the peripheral circuit even if it is desired to operate only the peripheral circuit at a high-rate when releasing the sleep mode or changing the sleep mode to a high-rate mode.

Abstract: A method and system for displaying a series of video frames so that picture corruption from video channel underflows is avoided. The method comprises the steps of receiving a data stream with compressed video data for the series of video frames, storing the compressed video data in a channel buffer, processing a video frame if sufficient compressed video data for the video frame is stored in the channel buffer, and displaying a preceding video frame if insufficient compressed video data for the video frame is stored in the channel buffer. The system, which displays a series of video frames, also addresses the issue of video channel underflow. The video frames are received as compressed video data in a data stream that also includes size parameters, such as the vbv.sub.-- delay parameter in the frame headers of MPEG frames, for each video frame in the series of video frames.

Abstract: A method and system for compensating for code invariancies in a digital communication receiver is performed on demodulated signal data. A pre-Viterbi invariancy compensation is performed on the demodulated signal data to reverse a selected one of a number of possible transformations to create compensated signal data. The compensated signal data is then depunctured. The depunctured data is then decoded. An encoder encodes the decoded data. The encoded data and the depunctured data are then compared to determine equivalence. The pre-Viterbi invariancy compensation is performed to reverse a different one of the number of possible transformations to create the compensated signal data when the encoded data and the depunctured data are determined not to be equivalent. A post-Viterbi invariancy compensation is then performed on the decoded data to produce a set of compensated outputs. Thus, the post-Viterbi invariancy compensation reverses each one of the number of possible transformations on the decoded data.

Abstract: A new FET device configuration for electrically programmable memories (EPROM), flash/electrically erasable and programmable read-only memories (EEPROM), and non-volatile Random Access Memory (NVRAM) which adds vertical components to a previously planar floating gate cell structure; efficiency of electron injection from the channel to floating gate is enhanced by many orders of magnitude because electrons accelerated in the channel penetraite in the direction of movement, straight into the floating gate. The floating gate resides over a series of arbitrary horizontal and vertical channel region components, the key topological feature being that the vertical channel resides near the drain, allowing electrons to penetrate straight into the floating gate. In contrast, the prior art relies on the indirect process of electron scattering by phonon and the 90 degree upward redirection of motion to the floating gate used by conventional Channel Hot Electron EPROM and EEPROM cells.

Abstract: A large number of possible cell placements for an integrated circuit chip are evaluated to determine which has the highest fitness in accordance with a predetermined criteria such as interconnect congestion. Each cell placement, which constitutes an individual permutation of cells from a population of possible permutations, is represented as an initial cell placement in combination with a list of individual cell transpositions or swaps by which the cell placement can be derived from the initial cell placement. A cell placement can be genetically mutated and/or inverted by adding swaps to the list for its cell placement which designates cells to be transposed. Genetic crossover can be performed by transposing swaps between the lists for two cell placements. This cell representation and transposition method enables any type of cell transposition to be performed without loss or duplication of cells or generation of illegal placements.

Abstract: Data signal pins for a peripheral device are adaptively precharged during hot plugging to a voltage level depending on both the mode of operation (low voltage differential, high voltage differential, or single ended) and the actual signal voltages being employed for a particular mode. An active terminator bus provides an operating mode sensing signal, from which the operating mode of the bus and the actual signal voltage levels being employed may be determined. Signal pins on an edge connector for the device are connected, in sequence, to the corresponding ground, power supply, operating mode sensing signal, and data signal conductors of the bus.

Abstract: Provided is a method and composition for protecting alignment mark trench walls from attack by CMP slurry accumulating in an alignment mark trench during CMP processing. In a preferred embodiment, a metal organic chemical vapor deposition titanium nitride (MOCVDTiN) layer is deposited over a conventionally applied bulk tungsten layer prior to commencing CMP operations. This MOCVDTiN layer is resistant to CMP slurry attack. As a result, the tungsten trench profile remains a consistent and reliable alignment mark.

Abstract: A system for globally prioritizing and scheduling I/O requests from a plurality of storage users or clients to one or more storage objects. The system comprises a storage controller configured to receive I/O requests from the client workstations and prioritize and schedule those I/O requests in accordance with a scheduling algorithm. Specifically, the storage controller receives I/O requests from the storage users and places the I/O requests in memory queues associated with the particular storage users. The storage controller then selects the I/O requests from the various memory queues based on the scheduling algorithm.

Abstract: A phase-locked loop includes a phase detector, a charge pump, a resistor-less loop filter and a voltage-controlled oscillator ("VCO"). The phase detector has a reference input, a feedback input, and a charge control output. The charge pump is coupled to the charge control output, and the resistor-less loop filter is coupled to the charge pump. The VCO has a control voltage input coupled to the resistor-less loop filter, a clock output coupled to the feedback input and a plurality of delay elements which are coupled together in series to form a ring oscillator. Each delay element includes a delay element output. A MOSFET gate oxide capacitance is coupled between each delay element output and the charge control output.