Patents Assigned to NVidia
-
Patent number: 9165399Abstract: A system, method, and computer program product are provided for inputting modified coverage data into a pixel shader. In use, coverage data modified by a depth/stencil test is input into a pixel shader. Additionally, one or more actions are performed at the pixel shader, utilizing the modified coverage data.Type: GrantFiled: November 1, 2012Date of Patent: October 20, 2015Assignee: NVIDIA CorporationInventors: Yury Uralsky, Henry Packard Moreton
-
Patent number: 9159158Abstract: A method including casting a ray from a point toward a point-based three dimensional scene. The scene includes memory resident objects with object surfaces and a first splat and a second splat associated with the object surfaces. The first splat and the second splat have a position and a normal vector. The method also includes forming an event line through the first splat and the second splat. The event line intersects the first splat and the second splat. The method further includes determining whether a visibility conflict exists between the first splat and the second splat. The method also includes separating the first splat and the second splat to different object surfaces if the visibility conflict exists, otherwise merging the first splat and the second splat to a single object surface.Type: GrantFiled: July 19, 2012Date of Patent: October 13, 2015Assignee: NVIDIA CORPORATIONInventors: Timo Oskari Aila, Jaakko Tapani Lehtinen, Samuli Matias Laine
-
Patent number: 9158896Abstract: A method, system on a chip, and computer system for generating more robust keys which utilize data occupying relatively small die areas is disclosed. Embodiments provide a convenient and effective mechanism for generating a key for use in securing data on a portable electronic device, where the key is generated from repurposed data and a relatively small amount. A multi-stage encryption algorithm may be performed to generate the key, where the first stage may include encrypting the secure data, and the second stage may include encrypting the result of a logical operation on the encrypted secure data with a unique identifier of the portable electronic device. A secret key may be used as the encryption key for each stage. The result of the second encryption stage may include the generated key which may be used to perform subsequent operations on the portable electronic device.Type: GrantFiled: February 11, 2008Date of Patent: October 13, 2015Assignee: NVIDIA CORPORATIONInventors: Michael Brian Cox, Phillip Norman Smith, Stephen Donald Lew
-
Patent number: 9159156Abstract: One embodiment of the present invention sets forth a technique to perform fine-grained rendering predication using an IGPU. A graphics driver divides a 3D object into batches of triangles. The IGPU processes each batch of triangles through a modified rendering pipeline to determine if the batch is culled. The IGPU writes bits into a bitstream corresponding to the visibility of the batches. Advantageously, this approach to rendering predication provides fine-grained culling without adding unnecessary overhead, thereby optimizing both hardware resources and performance.Type: GrantFiled: May 14, 2012Date of Patent: October 13, 2015Assignee: NVIDIA CorporationInventors: Cass W. Everitt, Franck R. Diard
-
Patent number: 9158569Abstract: A method includes loading a driver component on a hypervisor of a computing system including a Graphics Processing Unit (GPU) without hardware support for virtual interrupt delivery, and loading an instance of the driver component on each of a number of VMs consolidated on a computing platform of the computing system. The method also includes allocating a memory page associated with work completion by the each of the number of VMs thereto through a driver stack executing on the hypervisor, and sharing the memory page with the driver component executing on the hypervisor. Further, the method includes delivering, through the hypervisor, an interrupt from the GPU to an appropriate VM based on inspecting the memory page associated with the work completion by the each of the number of VMs.Type: GrantFiled: February 11, 2013Date of Patent: October 13, 2015Assignee: NVIDIA CorporationInventors: Surath Raj Mitra, Neo Jia, Kirti Wankhede
-
Patent number: 9158335Abstract: A notebook computer is disclosed in the present invention which comprises: a screen, which is a touch screen configured to be operable via touching; a host, which is integrated in the screen; and a keyboard, which is detachably connected with the screen so that the keyboard and the screen can be in a state of being connected to each other or in a state of being separated from each other in use. When the notebook computer is used, the keyboard and the screen can be in the state of being separated from each other in use, so that the screen and the keyboard of the notebook computer are used separately. And the keyboard and the screen can be separated when needed and the notebook computer can be use by touching operation on the screen.Type: GrantFiled: November 2, 2012Date of Patent: October 13, 2015Assignee: NVIDIA CorporationInventor: Wenjie Zheng
-
Patent number: 9158595Abstract: One embodiment sets forth a technique for scheduling the execution of ordered critical code sections by multiple threads. A multithreaded processor includes an instruction scheduling unit that is configured to schedule threads to process ordered critical code sections. A ordered critical code section is preceded by a barrier instruction and when all of the threads have reached the barrier instruction, the instruction scheduling unit controls the thread execution order by selecting each thread for execution based on logical identifiers associated with the threads. The logical identifiers are mapped to physical identifiers that are referenced by the multithreaded processor during execution of the threads. The logical identifiers are used by the instruction scheduling unit to control the order in which the threads execute the ordered critical code section.Type: GrantFiled: October 25, 2012Date of Patent: October 13, 2015Assignee: NVIDIA CorporationInventors: John Erik Lindholm, Tero Tapani Karras, Samuli Matias Laine, Timo Aila
-
Patent number: 9158452Abstract: A touch screen system includes a touch screen that provides touch information in response to a touch event. The touch screen system also includes a rapid response display controller having a reactive interpretation unit that provides an initial display representation of the touch information and a reactive feedback unit that provides the initial display representation to the touch screen for an initial display. The touch screen system further includes a routine response display controller that additionally receives the touch information and provides a final display representation of the touch information to the touch screen for a final display. A method of touch screen display management is also included.Type: GrantFiled: December 27, 2012Date of Patent: October 13, 2015Assignee: NVIDIA CORPORATIONInventors: Ricardo Motta, Arman Toorians
-
Patent number: 9159367Abstract: A method includes initiating, through an interface of a data processing device, generation of one or more excerpt(s) of a video sequence associated with a video file stored in a memory of the data processing device. The method also includes automatically reading, through a processor of the data processing device communicatively coupled to the memory, video frames of the video file corresponding to the one or more excerpt(s) and reference video frames thereof in accordance with the initiation through the interface. Further, the method includes decoding, through the processor, the video frames of the video file corresponding to the one or more excerpt(s) and the reference video frames thereof following the automatic reading for rendering thereof on the data processing device.Type: GrantFiled: August 19, 2013Date of Patent: October 13, 2015Assignee: NVIDIA CorporationInventor: Sachin Krishna Nikam
-
Patent number: 9153539Abstract: A system of interconnected chips comprising a multi-chip module (MCM) includes a first processor chip, a graphics processing cluster (GPC) chip, and an MCM package configured to include the first processor chip, the GPC chip, and an interconnect circuit. The first processor chip is configured to include a first ground-referenced single-ended signaling interface circuit. A first set of electrical traces fabricated within the MCM package and configured to couple the first single-ended signaling interface circuit to the interconnect circuit. The GPC chip is configured to include a second single-ended signaling interface circuit and to execute shader programs. A second set of electrical traces fabricated within the MCM package and configured to couple the second single-ended signaling interface circuit to the interconnect circuit. In one embodiment, each single-ended signaling interface advantageously implements ground-referenced single-ended signaling.Type: GrantFiled: August 22, 2013Date of Patent: October 6, 2015Assignee: NVIDIA CorporationInventors: William J. Dally, Jonah M. Alben, John W. Poulton, Thomas Hastings Greer, III
-
Patent number: 9153209Abstract: One embodiment of the present invention sets forth a technique for generating a displacement map. The technique involves receiving a normal map which includes one or more normal vectors associated with a texture map, processing the one or more normal vectors to a calculate one or more depth difference vectors associated with the texture map, and generating one or more rays associated with a first texel of the texture map. The technique further involves calculating, for each of the one or more rays, relative depths of each of the one or more other texels traversed by the ray based on each of the depth difference vectors that correspond with the one or more other texels traversed by the ray, determining a displacement value associated with the first texel based on the relative depths calculated for the one or more rays, and storing the displacement value in a displacement map.Type: GrantFiled: August 6, 2012Date of Patent: October 6, 2015Assignee: NVIDIA CorporationInventor: Kirill Dmitriev
-
Patent number: 9153068Abstract: A method for reducing the number of samples tested for rendering a screen space region of an image includes constructing a trajectory of a primitive extending in an image which is to be rendered. A bounding volume is constructed for a screen space region of the image, the bounding volume characterized as having a bound in a non-screen space dimension which is defined as a function of the primitive's trajectory. The bounding volume is further characterized as overlapping a portion of the screen space region which is to be rendered. One or more sample points which are located within the screen space region, and which are not overlapped by the bounding volume are excluded from testing.Type: GrantFiled: June 24, 2011Date of Patent: October 6, 2015Assignee: NVIDIA CORPORATIONInventors: Samuli Laine, Tero Karras, Jaakko Lehtinen, Timo Aila
-
Patent number: 9153211Abstract: A method and system for tracking accesses to virtual addresses are disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of receiving a virtual address from a client requesting to access memory in a graphics context, updating access state information corresponding to a virtual page associated with the graphics context in which the virtual address resides, after the virtual address successfully maps to a physical memory location, and determining whether to evict a physical page associated with the graphics context based on the access state information.Type: GrantFiled: December 3, 2007Date of Patent: October 6, 2015Assignee: NVIDIA CORPORATIONInventors: James L. Deming, David B. Glasco
-
Patent number: 9152372Abstract: A method and system for enabling multiple video graphics array (VGA) cards to process image data are disclosed. Specifically, one embodiment of a graphics system includes a first video graphics array (VGA) card having a first and a second connection ports, a second VGA card having a first and a second connection ports, a third VGA card having a first and a second connection ports, and a connecting device for electronically connecting the first, the second, and the third VGA cards via connections that transfer data. The connecting device is further configured to connect the first connection port of the first VGA card to either the first or the second connection port of the second VGA card and connect the second connection port of the first VGA card to either the first or the second connection port of the third VGA card.Type: GrantFiled: December 13, 2007Date of Patent: October 6, 2015Assignee: NVIDIA CORPORATIONInventor: Tiecheng Liang
-
Patent number: 9152374Abstract: A method includes implementing an audio framework to be executed on a data processing device with a virtual audio driver component and a User Mode Component (UMC) communicatively coupled to each other. The virtual audio driver component enables modifying an original default audio endpoint device of an application executing on the data processing device to an emulated audio device associated with a new audio endpoint in response to an initiation through the application in conjunction with the UMC. The virtual audio driver component also enables registering the new audio endpoint as the modified default audio endpoint with an operating system executing on the data processing device. Further, the virtual audio driver component enables capturing audio data intended for the original default audio endpoint device at the new audio endpoint following the registration thereof to enable control of the audio data.Type: GrantFiled: June 17, 2013Date of Patent: October 6, 2015Assignee: NVIDIA CorporationInventor: Ambrish Dantrey
-
Patent number: 9155120Abstract: A modem for use at a terminal, the modem comprising: a first interface arranged to connect to a communications network; a second interface arranged to connect to a host processor on the terminal; and a processing unit, the processing unit configured to: detect that a call is to be established over the communications network; in response to said detection, perform a call setup procedure; determine if the call setup procedure has been successful or has failed due to failure of a security procedure; and in response to determining that the call setup procedure has failed due to failure of a security procedure, repeat said call setup procedure without indicating failure of the call setup procedure to a user of said terminal.Type: GrantFiled: September 13, 2013Date of Patent: October 6, 2015Assignee: Nvidia CorporationInventors: Alexander May-Weymann, Timothy Rogers, Susan Iversen, Stephen Molloy
-
Patent number: 9153027Abstract: A system, method, and computer program product are provided for performing fast, non-rigid registration for at least two images of a high-dynamic range image stack. The method includes the steps of generating a warped image based on a set of corresponding pixels, analyzing the warped image to detect unreliable pixels in the warped image, and generating a corrected pixel value for each unreliable pixel in the warped image. The set of corresponding pixels includes a plurality of pixels in a source image, each pixel in the plurality of pixels associated with a potential feature in the source image and paired with a corresponding pixel in a reference image that substantially matches the pixel in the source image.Type: GrantFiled: November 1, 2013Date of Patent: October 6, 2015Assignee: NVIDIA CorporationInventors: Orazio Gallo, Kari Antero Pulli, Jun Hu
-
Patent number: 9153314Abstract: A system is provided for transmitting signals. The system includes a ground-referenced single-ended signaling (GRS) driver circuit that is configured to pre-charge a first capacitor to store a first charge between a first output node and a first reference node based on a first input data signal during a first pre-charge phase and drive an output signal relative to a ground network based on the first charge during a first drive phase. A control circuit is configured to generate a first set of control signals based on the first input data signal and a first clock signal, where the first set of control signals causes the first GRS driver circuit to operate in either the first pre-charge phase or in the first drive phase.Type: GrantFiled: May 9, 2013Date of Patent: October 6, 2015Assignee: NVIDIA CorporationInventor: William J. Dally
-
Patent number: 9147447Abstract: A system is provided for transmitting signals. The system comprises a first processing unit, a memory subsystem, and a package. The first processing unit is configured to include a first ground-referenced single-ended signaling (GRS) interface circuit. The memory subsystem is configured to include a second GRS interface circuit. The package is configured to include one or more electrical traces that couple the first GRS interface to the second GRS interface, where the first GRS interface circuit and the second GRS interface circuit are each configured to transmit a pulse along one trace of the one or more electrical traces by discharging a capacitor between the one trace and a ground network.Type: GrantFiled: March 15, 2013Date of Patent: September 29, 2015Assignee: NVIDIA CorporationInventors: William J. Dally, Brucek Kurdo Khailany, Thomas Hastings Greer, III, John W. Poulton
-
Patent number: RE45757Abstract: A cellular wireless internet access system which operates in the 2.5 to 2.68 GHz band and which must comply with complex government regulations on power levels, subscriber equipment and interference levels yet which provides high data rates to users and cell sizes of 1½ miles radius or more from base stations with subscriber equipment and antennas mounted indoors. Such base stations are mounted low and use spread-spectrum transmission to comply with interference rules with respect to adjacent license areas. An unidirectional tear-drop coverage pattern is used at multiple cells to further reduce interference when required. Time division duplex is used to allow the system to operate on any single channel of varying bandwidth within the 2.5 to 2.68 GHz band. Backhaul transmission from base stations to the Internet is provided using base station radio equipment, operating either on a different frequency in the band or on the same frequency using a time-division peer-to-peer technique.Type: GrantFiled: August 25, 2006Date of Patent: October 13, 2015Assignee: NVIDIA CORPORATIONInventors: Roger Phillip Quayle, Shirley Claire Quayle, William John Jones, Alan Edward Jones