Abstract: A system, method, and computer program product are provided for. The method includes the steps of executing a block of translated binary instructions by multiple threads and gathering profiling data during execution of the block of translated binary instructions. The multiple threads are then synchronized at a barrier instruction associated with the block of translated binary instructions and the block of translated binary instructions is replaced with optimized binary instructions, where the optimized binary instructions are produced based on the profiling data.

Abstract: A technique for managing data processed by multiple processing engines comprises storing a first data block associated with a first processing engine in a first portion of a ring buffer memory, subsequent to storing the first data block, storing a second data block associated with a second processing engine in a second portion of the ring buffer memory, and receiving a second process complete signal from the second processing engine while waiting for a first process complete signal from the first processing engine. The technique further comprises receiving the first process complete signal from the first processing engine once the first processing engine completes processing of the first data block, and, upon receiving the first process complete signal, indicating that the first portion of the ring buffer memory is available for storing data other than the first data block.

Abstract: A system, method, and computer program product are provided for producing a cavity bottom package of a package-on-package structure. The method includes the steps of receiving a bottom package comprising a substrate material having a top layer including a first set of pads configured to be electrically coupled to a second set of pads of an integrated circuit die. A layer of non-conductive material is applied to the top layer of the bottom package and a cavity is formed in the layer of non-conductive material to expose the first set of pads, where the cavity is configured to contain the integrated circuit die oriented such that the second set of pads face the first set of pads.

Abstract: In one embodiment of the present invention, a high efficiency video coding codec optimizes the memory resources used during motion vector (MV) prediction. As the codec processes block of pixels, known as coding units (CUs), the codec performs read and write operations on a fixed-sized neighbor union buffer representing the MVs associated with processed CUs. In operation, for each CU, the codec determines the indices at which proximally-located “neighbor” MVs are stored within the neighbor union buffer. The codec then uses these neighbor MVs to compute new MVs. Subsequently, the codec deterministically updates the neighbor union buffer—replacing irrelevant MVs with those new MVs that are useful for computing the MVs of unprocessed CUs. By contrast, many conventional codecs not only redundantly store MVs, but also retain irrelevant MVs. Consequently, the codec reduces memory usage and memory operations compared to conventional codecs, thereby decreasing power consumption and improving codec efficiency.

Abstract: Methods and systems monitor and log software and hardware failures (i.e. errors) over a communication network. In one embodiment, the method includes detecting an event caused by an error, and generating a log of the event in response to the detection. The method further includes generating a first message prompting if a user consents to allowing a third party provider track the error and transmitting the log to the third party provider over the communication network if the user consents to allowing the third party provider track the error. The method yet further includes generating a second message prompting if the user wants to provide additional information relating to the error. The method still further includes providing a user interface including an error reporting portal to the user if the user wants to provide additional information and transmitting the portal to the third party provider.

Abstract: A system, method, and computer program product are provided for compiling a computer program comprising arithmetic operations having different requirements with respect to numeric dynamic range, numeric resolution, or any combination thereof. The method comprises generating a transformed graph representation of the computer program by applying propagation rules that provide for relaxed numeric requirements, where applicable, and generating output code based on the transformed graph representation. Relaxing numeric requirements, such as dynamic range and resolution requirements, may advantageously lower power consumption during execution of the computer program.

Abstract: A method is enacted in a computer system operatively coupled to a hand-actuated input device. The method includes the action of determining automatically which form of user input to offer a process running on the computer system, the user input including position data from the input device. The method also includes the action of offering the position data to the process in the form determined.

Abstract: A system and method for wirelessly sharing graphics processing resources and a mobile device incorporating the system or the method. In one embodiment, the system includes: (1) a call evaluator operable to receive a graphics call from an application and determine whether the call should be wirelessly directed to a shared graphics processing resource and (2) a tether interface associated with the call evaluator and operable to receive calls from the call evaluator that the call evaluator has determined should be wirelessly directed to the shared graphics processing resource and wirelessly direct the calls to the shared graphics processing resource.

Abstract: A negative bit line write assist system includes an array voltage supply and a static random access memory (SRAM) cell that is coupled to the array voltage supply and controlled by bit lines during a write operation. Additionally, the negative bit line write assist system includes a bit line voltage unit that is coupled to the SRAM cell, wherein a distributed capacitance is controlled by a write assist command to provide generation of a negative bit line voltage during the write operation. A negative bit line write assist method is also provided.

Abstract: A panoramic image is generated from a plurality of source images. A panoramic analysis engine samples a first source image and a second source image included in the plurality of source images to generate a first proxy image and a second proxy image, respectively. The panoramic analysis engine samples inertial measurement information associated the two proxy images. The panoramic analysis engine detects a feature that is present in both the first proxy image and the second proxy image. The panoramic analysis engine blends the second proxy image into the first proxy image based on the inertial measurement information and a first position of the feature within the second proxy image relative to a second position of the feature within the first proxy image to generate a preview image. Finally, the panoramic analysis engine renders the preview image according to a first panoramic mode to generate a first partial display image.

Abstract: One embodiment of the present invention sets forth techniques for selecting an audio environment for a handheld device. A widget detects a first input via a specially designated input mechanism. The widget enters an audio processing environment select mode based on the first input. The widget detects a second input via either the specially designated input mechanism or a second input mechanism. The widget changes an audio processing environment from a first setting to a second setting based on the second input. One advantage of the disclosed techniques is that users may change audio processing environments quickly and intuitively using existing input mechanisms such as a mute button, volume rocker control, and touch screen interface on a handheld device.

Abstract: A system for, and method of, extending the battery life of a mobile device providing content wirelessly and a mobile device incorporating the system or the method. In one embodiment, the system includes: (1) a power manager operable to generate a signal indicating that a low battery condition exists and (2) an audio/video subsystem operable to receive the signal and adjust at least one parameter controlling an encoding of the content to decrease a quality of the encoding.

Abstract: In one embodiment of the present invention, a streaming multiprocessor (SM) uses a tree of nodes to manage threads. Each node specifies a set of active threads and a program counter. Upon encountering a conditional instruction that causes an execution path to diverge, the SM creates child nodes corresponding to each of the divergent execution paths. Based on the conditional instruction, the SM assigns each active thread included in the parent node to at most one child node, and the SM temporarily discontinues executing instructions specified by the parent node. Instead, the SM concurrently executes instructions specified by the child nodes. After all the divergent paths reconverge to the parent path, the SM resumes executing instructions specified by the parent node. Advantageously, the disclosed techniques enable the SM to execute divergent paths in parallel, thereby reducing undesirable program behavior associated with conventional techniques that serialize divergent paths across thread groups.

Abstract: An enhanced display encoder system for a video stream source includes an enhanced video encoder that has parallel intra frame and inter frame encoding units for encoding a video frame, wherein an initial number of macroblocks is encoded to determine a scene change status of the video frame. Additionally, a video frame history unit determines an intra frame update status for the video frame from a past number of video frames, and an encoder selection unit selects the intra frame or inter frame encoding unit for further encoding of the video frame to support a wireless transmission based on the scene change status and the intra frame update status. A method of enhanced video frame encoding for video stream sourcing is also provided.

Abstract: A system for, and method of, increasing a graphics processing capability of a mobile device and a mobile device incorporating the system or the method. In one embodiment, the system includes: (1) a graphics application programming interface (API) operable to cause a graphics processing resource of the mobile device to render data generated by an application to yield rendered data and (2) a network interface associated with the mobile device and operable to: (2a) transmit at least some of the rendered data via a network link for postprocessing to yield postprocessed data and (2b) receive the postprocessed data for display on the mobile device.

Abstract: One embodiment of the present invention sets forth a technique for adaptively compressing video frames. The technique includes monitoring a motion vector associated with a video stream and encoding a first plurality of video frames included in the video stream based on a first video compression algorithm to generate first encoded video frames. The technique further includes determining that the motion vector has reached a threshold level and, in response, switching from the first video compression algorithm to a second video compression algorithm. The technique further includes encoding a second plurality of video frames included in the video stream based on the second video compression algorithm to generate second encoded video frames. Advantageously, the disclosed technique enables a video compression algorithm to be dynamically selected based on an amount of motion detected in a video stream that is to be compressed.

Abstract: Provided is an antenna. In one aspect, the antenna includes a feed element having a first feed element end and a second feed element end, the first feed element end configured to electrically connect to a positive terminal of a transmission line. The antenna, in this aspect, further includes a loop antenna element having a first loop antenna element end and a second loop antenna element end, wherein the first loop antenna element end is coupled to the second feed element end and the second loop antenna element end is configured to electrically connect to a negative terminal of the transmission line. The antenna, of this aspect, further includes a monopole antenna element having a first monopole antenna element end and a second monopole antenna element end, wherein the first monopole antenna element end is coupled to the second feed element end.

Abstract: A graphics system includes an integrated graphics processor and a discrete graphics processing unit. An intra-system bus coupled data from the discrete graphics processing unit to the integrated graphics processor. In a high performance mode the discrete graphics processing unit is used to render frames. Compression techniques are used to aid in the data transfer over an intra-system bus interface.

Abstract: A hybrid write-assist memory system includes an array voltage supply and a static random access memory (SRAM) cell that is controlled by bit lines and a word line and employs a separable cell supply voltage coupled to the array voltage supply. Additionally, the hybrid write-assist memory system includes a supply voltage droop unit that is coupled to the SRAM cell and provides a voltage reduction of the separable cell supply voltage during a write operation. Also, the hybrid write-assist memory system includes a negative bit line unit that is coupled to the supply voltage droop unit and provides a negative bit line voltage concurrently with the voltage reduction of the separable cell supply voltage during the write operation. A method of operating a hybrid write-assist memory system is also provided.

Abstract: Disclosed are methods, devices, and systems to digitally control a duty cycle of a switching mode power supply. In one embodiment, a method comprises calculating a base duty cycle using a power management unit of a high-speed processing unit, calculating a dynamic offset duty cycle using the power management unit to apply a transfer function to a sampled feedback voltage signal, and adding the base duty cycle to the dynamic offset duty cycle to obtain a duty cycle of the switching mode power supply. A system comprises a switching mode power supply, a power management unit, a voltage sensor, and an analog to digital converter all embedded within a high-speed processing unit, and a pulse-width modulator coupled between the switching mode power supply and the high-speed processing unit to modulate the duty cycle of the switching mode power supply.