Abstract: A voltage margin controller, an IC included the same and a method of controlling voltage margin for a voltage domain of an IC are disclosed herein. In one embodiment, the voltage margin controller includes: (1) monitoring branches including circuit function indicators configured to indicate whether circuitry in the voltage domain could operate at corresponding candidate reduced voltage levels and (2) a voltage margin adjuster coupled to the monitoring branches and configured to develop a voltage margin adjustment for a voltage regulator of the voltage domain based upon an operating number of the circuit function indicators.

Abstract: A solution is proposed to perform display updates in a lower power user interface. According to one embodiment, the display panel is placed in the lower possible refresh rate that can be supported. Rendered updates are presented to the displays at the fasted possible pixel rates the communication interface between the rendering component to the display panel can support, and a buffer on the receiving end of the display receives and stores updated frames as they are rendered and transmitted. Subsequent display updates (generated in response to subsequent sensor input, for example) may be created and transmitted as soon as the preceding display frames are buffered. In the meantime, as soon as the update frame is transmitted, the timing controller of the display panel is instructed to interrupt the current refresh period and to immediately rescan the frame.

Abstract: A system, method, and computer program product are provided for artifact reduction in high-frequency regeneration audio signals. In operation, a high-frequency regeneration (HFR) audio signal is received. Additionally, one or more artifacts are detected in the received HFR audio signal, utilizing a spectral energy associated with the received HFR audio signal. Further, the received HFR audio signal is modified to at least partially correct the one or more artifacts in the received HFR audio signal.

Abstract: A surface cache stores pixel data on behalf of a pixel processing pipeline that is configured to generate screen tiles. The surface cache assigns hint levels to cache lines storing pixel data according to whether that pixel data is likely to be needed again. When the pixel data is needed to process a subsequent tile, the corresponding cache line is assigned a higher hint value. When the pixel data is not needed again, the corresponding cache line is assigned a lower hint value. The surface cache is configured to preferentially evict cache lines having a lower hint value, thereby preserving cache lines that store pixel data needed for future processing. In addition, a fetch controller is configured to throttle the rate at which fetch requests are issued to the surface cache to prevent situations where pixel data needed for future operations becomes prematurely evicted.

Abstract: A mobile device includes a projector configured to project images onto a target surface that resides within a projectable area. The mobile device identifies the target surface within the projectable area and then tracks that target surface as the mobile device is subject to different types of motion, including translation and rotation, among others. The mobile device then compensates for that motion when projecting the images, potentially eliminating distortion in the projected images. Additionally, the mobile device may compensate for geometric differences between the projected image and the target surface by cropping the images to fit within the target surface. One advantage of the disclosed technique is that the mobile device is capable of projecting images with reduced distortion despite movement associated with the mobile device.

Abstract: While a clocked component is not idle, the component receives a clock signal that is at a first frequency. When the clocked component is idle, the clock signal is changed to a non-zero second frequency that is less than the first frequency. In effect, clock gating is replaced with clock slowdown.

Abstract: A surface cache stores pixel data on behalf of a pixel processing pipeline that is configured to generate screen tiles. The surface cache assigns hint levels to cache lines storing pixel data according to whether that pixel data is likely to be needed again. When the pixel data is needed to process a subsequent tile, the corresponding cache line is assigned a higher hint value. When the pixel data is not needed again, the corresponding cache line is assigned a lower hint value. The surface cache is configured to preferentially evict cache lines having a lower hint value, thereby preserving cache lines that store pixel data needed for future processing. In addition, a fetch controller is configured to throttle the rate at which fetch requests are issued to the surface cache to prevent situations where pixel data needed for future operations becomes prematurely evicted.

Abstract: Systems and methods for utilizing multiple graphics processing units for controlling presentations on a display are presented. In one embodiment, a dual graphics processing system includes a first graphics processing unit for processing graphics information; a second graphics processing unit for processing graphics information; and a component for controlling switching between said first graphics processing unit and said second graphics processing unit. In one embodiment, the component for controlling complies with appropriate panel power sequencing operations when coordinating the switching between the first graphics processing unit and the second graphics processing unit.

Abstract: A system includes a control circuit and first, second, and third ground-referenced single-ended signaling (GRS) driver circuits that are each coupled to an output signal. The control circuit is configured to generate a first, second, and third set of control signals that are each based on a respective phase of a clock signal. Each GRS driver circuit is configured to pre-charge a capacitor to store a charge based on the respective set of control signals during at least one phase of the clock signal and drive the output signal relative to a ground network by discharging the charge during a respective phase of the clock signal.

Abstract: One embodiment of the present invention sets forth a technique for capturing and holding a level of an input signal using a latch circuit that presents a low number of loads to the clock signal. The clock is only coupled to a bridging transistor and a pair of clock-activated pull-down or pull-up transistors. The level of the input signal is propagated to the output signal when the storage sub-circuit is not enabled. The storage sub-circuit is enabled by the bridging transistor and a propagation sub-circuit is activated and deactivated by the pair of clock-activated transistors.

Abstract: Embodiments of the invention provide methods and configuration for packaging multiple semiconductor ships in a semiconductor package. In one embodiment, an integrated circuit system includes a printed circuit board, a first MOSFET device disposed on a first surface of the printed circuit board, and a second MOSFET device disposed on a second surface of the printed circuit board, wherein the first MOSFET device overlaps an edge of the second MOSFET device in a direction extending through the printed circuit board.

Abstract: One embodiment of the present invention includes techniques for compositing image surfaces to generate a display image for display. A display engine receives a first set of parameters associated with a first image surface stored in a memory. The display engine receives a second set of parameters associated with a second image surface stored in the memory, wherein the second image surface overlaps at least a portion of the first image surface. The display engine selects a first pixel group that is associated with the first image surface and does not contribute visually to the display image. The display engine prevents the first pixel group from being retrieved from the first image surface. One advantage of the disclosed embodiments is that power consumption is reduced and memory performance is improved by preventing retrieval of pixel information that does not contribute to the final visual display transmitted to the display device.

Abstract: One embodiment of the present invention includes techniques for pre-computing ambient shadowing parameters for a computer-generated scene. A processing unit retrieves a reference object associated with the computer-generated scene and comprising a plurality of vertices. For each vertex in the plurality of vertices, the processing unit computes a local ambient shadowing parameter, and stores the local ambient shadowing parameter in a memory. For each instance of the reference object included in the computer-generated scene, the processing unit computes a first global ambient shadowing parameter based on the position of the instance within the computer-generated scene, and stores the first global ambient shadowing parameter in the memory. One advantage of the disclosed embodiments is that ambient obscurance is applied to instance objects in a scene in real time while reducing memory space dedicated to storing the AO parameters.

Abstract: One embodiment of the present invention includes techniques for synchronizing displays of a plurality of mobile devices over a wireless network. A processing unit renders an image frame related to a software application into an application image buffer associated with a first mobile device and causes a second mobile device to render a second image frame into a second application image buffer of the second mobile device. The processing unit receives an acknowledgement over a wireless network indicating that the second mobile device has completed rendering the second image frame. The processing unit displays contents of the application image buffer on a first display device associated with the first mobile device and transmits a signal to the second mobile device over a wireless network that causes the second mobile device to display contents of the second application image buffer on a second display device associated with the second mobile device.

Abstract: A video frame producer, a method of generating content frames and a video viewing device are disclosed herein. In one embodiment, the video frame producer includes: (1) a content provider configured to generate content frames for a display and (2) a viewing smoother configured to direct the content provider to generate the content frames at a frame rate based on a display refresh rate of the display.

Abstract: Embodiments of the present invention are directed to a novel approach for realistically modeling sub-surface scattering effects in three-dimensional objects of graphically rendered images. In an embodiment, an indirection map is generated for an image by analyzing the triangle mesh of one or more three-dimensional objects in the image and identifying pairs of edges between adjacent triangles in the mesh that have the same spatial locations in the three-dimensional representations, but which have different locations in the texture map. For each of these edges, the opposite triangle in each pair is projected into their corresponding edge's two-dimensional space. This allows samples which cross a seam in the two dimensional representation that would otherwise sample out into invalid data to be redirected to the spatially correct region of the texture and generate consistent results with non-seam areas.

Abstract: Disclosed herein is a GPU for improved multitasking by a user, a GPU computing system including the GPU and a method of manufacturing a GPU system. In one embodiment, the GPU includes: (1) a video overlayer configured to create an operating area over a portion of a video image generated by the graphical processing unit and (2) an overlay interface configured to provide a virtual space input to the video overlayer to operate a virtual machine within the operating area.

Abstract: Embodiments of the present invention are directed to a novel approach for realistically modeling sub-surface scattering effects in three-dimensional objects of graphically rendered images. In an embodiment, an indirection map is generated for an image by analyzing the triangle mesh of one or more three-dimensional objects in the image and identifying pairs of edges between adjacent triangles in the mesh that have the same spatial locations in the three-dimensional representations, but which have different locations in the texture map. For each of these edges, the opposite triangle in each pair is projected into their corresponding edge's two-dimensional space. This allows samples which cross a seam in the two dimensional representation that would otherwise sample out into invalid data to be redirected to the spatially correct region of the texture and generate consistent results with non-seam areas.

Abstract: Provided herein is a voltage level shifter, an apparatus including a voltage level shifter and a method of converting voltages between input and output power domains. In one embodiment, the voltage level shifter includes: (1) an input circuit configured to receive a data signal from an input power domain and a power down signal from a output power domain and (2) a transition circuit coupled to the input circuit and configured to receive the data signal and an inverted signal of the power down signal, wherein the input circuit and the transition circuit are both configured to connect to a supply voltage of the output power domain as a power source.

Abstract: Efficient and effective permission confidential information protection systems and methods are described. The secure information protection systems and methods facilitate storage of confidential information in a manner safe from rogue software access. In one embodiment, a confidential information protection method is implemented in hardware and facilitates protection against software and/or Operating System hacks. In one exemplary implementation, a confidential information protection method includes setting a permission sticky bit flag to a default state upon system set up. The permission sticky bit flag access permission indication is adjusted at system reset in accordance with an initial application instruction. Access to the confidential information is restricted in accordance with the permission sticky bit and the permission sticky bit is protected from adjustments attempting to violate the permission indication.