Patents Assigned to NVidia
  • Publication number: 20150143347
    Abstract: A software development environment (SDE) and a method of compiling integrated source code. One embodiment of the SDE includes: (1) a parser configured to partition an integrated source code into a host code partition and a device code partition, the host code partition including a reference to a device variable, (2) a translator configured to: (2a) embed device machine code, compiled based on the device code partition, into a modified host code, (2b) define a pointer in the modified host code configured to be initialized, upon execution of the integrated source code, to a memory address allocated to the device variable, and (2c) replace the reference with a dereference to the pointer, and (3) a host compiler configured to employ a host library to compile the modified host code.
    Type: Application
    Filed: November 20, 2013
    Publication date: May 21, 2015
    Applicant: NVIDIA CORPORATION
    Inventors: Stephen Jones, Mark Hairgrove, Jaydeep Marathe, Vivek Kini, Bastiaan Aarts
  • Publication number: 20150138697
    Abstract: Provided for herein is a protection device for an electronic device, comprising (1) a cover having a cover width, cover height and cover thickness; and (2) a spindle attached to an edge of the cover, the spindle configured to cooperatively engage a groove formed in a housing of the electronic device and couple the cover to the electronic device.
    Type: Application
    Filed: May 23, 2014
    Publication date: May 21, 2015
    Applicant: NVIDIA CORPORATION
    Inventors: Siarhei Murauyou, Tommy Lee, Glenn Wernig, Khashayar Anoosheh, Nelson Au
  • Publication number: 20150139543
    Abstract: A system, method, and computer program product are provided for enhancing an image utilizing a hyper-clarity transform. In use, an image is identified. Additionally, the identified image is enhanced, utilizing a hyper-clarity transform. Further, the enhanced image is returned.
    Type: Application
    Filed: February 4, 2014
    Publication date: May 21, 2015
    Applicant: NVIDIA Corporation
    Inventor: Michael Edwin Stewart
  • Publication number: 20150141092
    Abstract: Provided for herein is an electronic device. The electronic device, in one example, includes a housing having a housing width, housing height, housing thickness, and a front and a back, and a display positioned proximate the front of the housing. The electronic device, in this aspect, further includes a magnetic or ferromagnetic rail positioned proximate the back of the housing, the magnetic or ferromagnetic rail configured to assist in providing multiple viewing angles for the electronic device.
    Type: Application
    Filed: May 23, 2014
    Publication date: May 21, 2015
    Applicant: Nvidia Corporation
    Inventors: Siarhei Murauyou, Tommy Lee, Glenn Wernig, Khashayar Anoosheh, Nelson Au
  • Publication number: 20150138065
    Abstract: A head mounted integrated interface (HMII) is presented that may include a wearable head-mounted display unit supporting two compact high resolution screens for outputting a right eye and left eye image in support of the stereoscopic viewing, wireless communication circuits, three-dimensional positioning and motion sensors, and a processing system which is capable of independent software processing and/or processing streamed output from a remote server. The HMII may also include a graphics processing unit capable of also functioning as a general parallel processing system and cameras positioned to track hand gestures. The HMII may function as an independent computing system or as an interface to remote computer systems, external GPU clusters, or subscription computational services, The HMII is also capable linking and streaming to a remote display such as a large screen monitor.
    Type: Application
    Filed: November 21, 2013
    Publication date: May 21, 2015
    Applicant: NVIDIA CORPORATION
    Inventor: Robert Alfieri
  • Publication number: 20150143058
    Abstract: A system, method, and computer program product are provided for utilizing a data pointer table pre-fetcher. In use, an assembly of a data pointer table within a main memory is identified. Additionally, the data pointer table is pre-fetched from the main memory. Further, data is sampled from the pre-fetched data pointer table. Further still, the sampled data is stored within a data pointer table cache.
    Type: Application
    Filed: November 15, 2013
    Publication date: May 21, 2015
    Applicant: NVIDIA Corporation
    Inventors: PrasannaKumar Shripal Kole, Chung-Hong Lai, Rahul Jain
  • Publication number: 20150138228
    Abstract: A system, method, and computer program product are provided for implementing anti-aliasing operations using a programmable sample pattern table. The method includes the steps of receiving an instruction that causes one or more values to be stored in one or more corresponding entries of the programmable sample pattern table and performing an anti-aliasing operation based on at least one value stored in the programmable sample pattern table. At least one value is selected from the programmable sample pattern table based on, at least in part, a location of one or more corresponding pixels.
    Type: Application
    Filed: November 15, 2013
    Publication date: May 21, 2015
    Applicant: NVIDIA Corporation
    Inventors: Eric B. Lum, Jeffrey Alan Bolz, Timothy Paul Lottes, Rui Manuel Bastos, Barry Nolan Rodgers, Gerald F. Luiz
  • Patent number: 9036686
    Abstract: A modem and a method of placing a modem in an online data state. In one embodiment, the modem includes: (1) a digital interface configured to receive, via an AT channel thereof, a standard AT command directing an AT channel of the modem to exit a command state and enter an online data state and (2) a command processor coupled to the digital interface and configured to: extract channel designation data received as a standard parameter of the standard AT command, cause a channel designated by the channel designation data and separate from the AT channel to enter the online data state, and allow the AT channel to remain in the command state.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: May 19, 2015
    Assignee: NVIDIA CORPORATION
    Inventors: Bruno De Smet, Flavien Delorme, Fabien Besson
  • Patent number: 9038080
    Abstract: A system and method for detecting, filtering, prioritizing and reporting shared memory hazards are disclosed. The method includes, for a unit of hardware operating on a block of threads, mapping a plurality of shared memory locations assigned to the unit to a tracking table. The tracking table comprises initialization information for each shared memory location. The method also includes, for an instruction of a program within a barrier region, identifying a potential conflict by identifying a second access to a location in shared memory within a block of threads executed by the hardware unit. First information associated with a first access and second information associated with the second access to the location is determined. Filter criteria is applied to the first and second information to determine whether the instruction causes a reportable hazard. The instruction is reported when it causes the reportable hazard.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: May 19, 2015
    Assignee: NVIDIA CORPORATION
    Inventors: Vyas Venkataraman, Manjunath Kudlur, Vinod Grover
  • Patent number: 9035957
    Abstract: An efficient pipeline debug statistics system and method are described. In one embodiment, an efficient pipeline debug is utilized in a graphics processing pipeline of a handheld device. In one embodiment, a pipeline debug statistics system includes a plurality of pipeline stages with probe points, a central statistic component, and a debug control component. The plurality of pipeline stages with probe points perform pipeline operations. The central statistic block gathers information from the probe points. The debug control component directs the gathering of information from the probe points. In one exemplary implementation, debug control component can direct gathering of information at a variety of levels and abstraction.
    Type: Grant
    Filed: August 15, 2007
    Date of Patent: May 19, 2015
    Assignee: NVIDIA CORPORATION
    Inventors: Justin Michael Mahan, Christopher J. Mills, Edward A. Hutchins
  • Publication number: 20150134916
    Abstract: A cache filter is described. More specifically, some implementations include techniques for classification of memory requests including calculating a probability that one or more memory regions are associated with a particular memory request, selecting one or more regions of the memory to receive memory requests based on the probability associated with the one or more regions, receiving one or more memory requests, determining that at least one of the memory requests is associated with one of the one or more selected regions of the memory, and providing the at least one memory request to the memory.
    Type: Application
    Filed: November 12, 2013
    Publication date: May 14, 2015
    Applicant: NVIDIA Corporation
    Inventors: Sudnya Padalikar, Gregory Fredrick Diamos
  • Publication number: 20150130967
    Abstract: In an apparatus according to one embodiment of the present invention, a video system is disclosed. The video system comprises a pre-processing module, an auto-exposure module, and an image sensor. The image sensor is operable to simultaneously capture a first image at a long exposure and a second image at a short exposure capture. The auto-exposure module is operable to determine an average brightness of a scene for video/image capturing, wherein the determined brightness achieves a desired image quality. The auto-exposure module is further operable to select a dynamic range necessary to preserve desired details in a captured scene. The auto-exposure module is further operable to instruct the image sensor to capture the first image and the second image with a selected exposure ratio to achieve the desired dynamic range. The pre-processing module is operable to combine the first image and the second image into a final image with the desired dynamic range.
    Type: Application
    Filed: November 13, 2013
    Publication date: May 14, 2015
    Applicant: NVIDIA Corporation
    Inventor: Sean Pieper
  • Publication number: 20150130915
    Abstract: An apparatus and system are provided for adjusting the depth of stereoscopic video content. The apparatus comprises a frame that supports a first lens and a second lens. The first lens is associated with a first image in a stereoscopic image pair and the second lens is associated with a second image in the stereoscopic image pair. An interface for controlling a parameter associated with the stereoscopic image pair is integrated into the frame of the apparatus. The system includes a display device configured to display stereoscopic video content and coupled to the apparatus for controlling the stereoscopic video content.
    Type: Application
    Filed: November 8, 2013
    Publication date: May 14, 2015
    Applicant: NVIDIA Corporation
    Inventors: Nilesh Angadrao More, Harsha Kumar CC, Saurabh Kumar
  • Publication number: 20150130850
    Abstract: A system and method are provided for displaying a lower power user interface on an liquid crystal display (LCD) panel using localized backlight control. The method includes the step of identifying a subset of light emitting elements included in a backlight for the LCD panel, where the backlight includes a plurality of light emitting elements. The subset of light emitting elements consumes less power when operated individually or in combination with other subsets of light emitting elements than the total backlight with all light emitting elements simultaneously active. The method also includes the steps of activating the subset of light emitting elements to at least partially illuminate the LCD panel while at least one light emitting element is not activated, adjusting an image for a user interface based on a compensation map corresponding to the subset of light emitting elements, and displaying the adjusted image on the LCD panel.
    Type: Application
    Filed: January 7, 2014
    Publication date: May 14, 2015
    Applicant: NVIDIA Corporation
    Inventor: David Wyatt
  • Patent number: 9031393
    Abstract: An electronic system for enhancing camera focusing on a portable electronic device is disclosed. The system comprises a body, a bus, and a camera module coupled to the bus and comprising a photosensitive substrate and a lens assembly wherein the lens assembly comprises a lens capable of being selectively moved to a distance from the photosensitive substrate for light focus thereon. Further, it comprises an accelerometer coupled to the bus and configured to generate orientation information, said orientation information indicating contemporaneous orientation of the body with respect to a predetermined reference. It also comprises a memory and a processor coupled to the bus. The memory comprises instructions that when executed implement an autofocus program configured to automatically determine the distance based on: 1) image data captured by said camera module; and 2) the orientation information generated by the accelerometer.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: May 12, 2015
    Assignee: NVIDIA Corporation
    Inventors: Guanghua Gary Zhang, Katharine Ip, Michael Lin
  • Patent number: 9030480
    Abstract: One embodiment of the present invention sets forth a method for analyzing the performance of a graphics processing pipeline. A first workload and a second workload are combined together in a pipeline to generate a combined workload. The first workload is associated with a first instance and the second workload is associated with a second instance. A first and second initial event are generated for the combined workload, indicating that the first and second workloads have begun processing at a first position in the graphics processing pipeline. A first and second final event are generated, indicating that the first and second workloads have finished processing at a second position in the graphics processing pipeline.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: May 12, 2015
    Assignee: NVIDIA Corporation
    Inventors: Roger L. Allen, Ziyad S. Hakura, Thomas Melvin Ogletree
  • Patent number: 9032101
    Abstract: A method for providing access to hardware devices by a processor without causing conflicts with other processors included in a computer system. The method includes receiving a first address map from a first processor and a second address map from a second processor, where each address map includes memory-mapped input/output (I/O) apertures for a set of hardware devices that the processor is configured to access. The method further includes generating a global address map by combining the first address map and the second address map, receiving a first access request from the first processor and routing the first access request to a hardware device based on an address mapping included in the global address map. Advantageously, heterogeneous processors included in multi-processor system can access any hardware device included in the computer system, without modifying the processors, one or more operating systems executed by each processor, or the hardware devices.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: May 12, 2015
    Assignee: NVIDIA Corporation
    Inventors: Michael Brian Cox, Brad W. Simeral
  • Publication number: 20150127860
    Abstract: One embodiment of the present invention includes a hard-coded first device ID. The embodiment also includes a set of fuses that represents a second device ID. The hard-coded device ID and the set of fuses each designate a separate device ID for the device, and each device ID corresponds to a specific operating configuration of the device. The embodiment also includes selection logic to select between the hardcoded device ID and the set of fuses to set the device ID for the device. One advantage of the disclosed embodiments is providing flexibility for engineers who develop the devices while also reducing the likelihood that a third party can counterfeit the device.
    Type: Application
    Filed: November 1, 2013
    Publication date: May 7, 2015
    Applicant: NVIDIA CORPORATION
    Inventors: Jesse Max GUSS, Philip Browning JOHNSON, Chris MARRIOTT, Wojciech Jan TRUTY
  • Publication number: 20150127333
    Abstract: A method for processing a bitstream starts by shifting a bitstream of a first sample of a signal into a buffer. The buffer also holds bits of one or more additional bitstreams for one or more additional samples of the signal. Bits of a first half of the buffer are incrementally compared to corresponding bits of a second half of the buffer. Each bit of the first half of the buffer is compared to a corresponding bit of the second half of the buffer. A computation is performed on each bit of the first half of the buffer that is equal to a corresponding bit of the second half of the buffer. The results of the computations are summed to determine an output value for the first sample of the signal.
    Type: Application
    Filed: November 6, 2013
    Publication date: May 7, 2015
    Applicant: NVIDIA Corporation
    Inventor: Anil UBALE
  • Publication number: 20150123977
    Abstract: A method for synchronizing a plurality of pixel processing units is disclosed. The method includes sending a first trigger to a first pixel processing unit to execute a first operation on a portion of a frame of data. The method also includes sending a second trigger to a second pixel processing unit to execute a second operation on the portion of the frame of data when the first operation has completed. The first operation has completed when the first operation reaches a sub-frame boundary.
    Type: Application
    Filed: November 6, 2013
    Publication date: May 7, 2015
    Applicant: Nvidia Corporation
    Inventors: Mrudula KANURI, Kamal JEET