Abstract: A processing module for a receiver device configured to provide for processing of a frame received by the receiver device from a transmitter device, the at least one frame comprising a plurality of repeating predetermined synchronization symbols for providing synchronization between the processing module and the transmitter device and one or more start-of-frame symbols defining the end of the synchronization symbols, the processing module configured to: perform cross correlation to obtain a cross-correlation function on i) at least a part of the received frame; with ii) a predetermined modulation sequence used to modulate the one or more start-of-frame symbols and not the synchronization symbols; and determine the location of the start-of-frame symbols based on an increase, above a threshold increase, in the cross-correlation function from a negative cross-correlation with the synchronization symbols to a greater cross-correlation with the part of the received frame containing the start-of-frame symbols

Abstract: The present application relates to a direct memory access, DMA, controller for a data processing system and a method of operating the DMA controller is provided. The DMA controller comprises a transfer table, a data path processing block and a comparator logic block. The table comprises at least one transfer descriptor comprising information about a source and destination of a DMA transfer. The data path processing block is provided to be coupled to a system interconnect of the data processing system and configured to receive data from the source of the DMA transfer and to transfer the received data to the destination of the DMA transfer. The comparator logic block is configured to validate the value of the received data against a predefined value range for range checking and to initiate one or more failed range check actions in response to a failed range checking.

Abstract: A signal processing device comprising at least one control unit arranged to receive at least one pack-insert instruction, decode the received at least one pack-insert instruction, and output at least one pack-insert control signal in accordance with the received pack-insert instruction. The signal processing device further comprising at least one pack-insert component arranged to receive at least a first data block to be inserted into a sequence of data blocks to be output to at least one destination register, receive a plurality of further data blocks to be packed within the sequence of data blocks to be output to the at least one destination register, arrange the at least first data block and the plurality of further data blocks into a sequence of data blocks based at least partly on the at least one pack-insert control signal, and output the sequence of data blocks.

Abstract: An integrated circuit includes an array of resistive non-volatile memory cells having a plurality of word lines, a plurality of bit lines, and a plurality of source lines. The integrated circuit includes a sense amplifier coupled to a first bit line of the plurality of bit lines and a corresponding first source line of the plurality of source lines. When a memory cell coupled to the first bit line is selected for a read operation, the sense amplifier is configured to, during a calibration phase of the read operation, store a first voltage representative of a leakage current on the first source line. The sense amplifier is also configured to, during a sense phase of the read operation, apply the stored first voltage to the first bit line and provide a first sense amplifier output indicative of a logic state of the selected memory cell.

Abstract: A packaged microelectronic component includes a substrate and a semiconductor die coupled to a top surface of the substrate. A method of attaching the packaged microelectronic component to a secondary structure entails applying a metal particle-containing material to at least one of a bottom surface of the substrate and a mounting surface of the secondary structure. The packaged microelectronic component and the secondary structure are arranged in a stacked relationship with the metal particle-containing material disposed between the bottom surface and the mounting surface. A low temperature sintering process is performed at a maximum process temperature less than a melt point of the metal particles to transform the metal particle-containing material into a sintered bond layer joining the packaged microelectronic component and the secondary structure. In an embodiment, the substrate may be a heat sink for the packaged microelectronic component and the secondary structure may be a printed circuit board.

Abstract: Embodiments include signal transmission methods and transmitting devices for a multi-antenna wireless communication system. The method comprises mapping one or more modulation symbols onto one or more transmission layers, thereby creating one or more modulated transmission layers and mapping the modulation symbols of the one or more modulated transmission layers onto resource elements of respective one or more time-frequency resource grids. The method further comprises performing precoding for each of the one or more time-frequency resource grids.

Abstract: Each task assigned to a core can be considered an “active” task. Sequential strobe signals of a watchdog signal can be spaced apart in time by a certain duration. The duration between strobe signals is longer than the expected duration of an active task. By knowing that all tasks being monitored are expected to execute within an expected amount of time, the duration between the strobe signals can be set to be longer than that expected amount of time. If a task has not transitioned to inactive by a next strobe, a watchdog error has occurred.

Abstract: There is disclosed a mobile device comprising a processing unit for executing a host application, a user-interactive display and an authentication unit; wherein the authentication unit is arranged to receive an authentication request from the host application; wherein the authentication unit is arranged to cause the display to show a set of pictures in response to receiving the authentication request; wherein the authentication unit is further arranged to identify a selection of at least one picture from said set of pictures; and wherein the authentication unit is further arranged to initiate a verification of said identified selection. Furthermore, a corresponding method of authenticating a user is disclosed, as well as a corresponding computer program, an article of manufacture and a display.

Abstract: The embodiments described herein provide systems and methods for recovering resources in processing devices. Specifically, the embodiments described herein provide techniques for recovering leaked resources allocated to hardware engines in a hardware processing core. As one example, the recovery of resources allocated to hardware engines can be facilitated by making a specified register available to monitoring software. When leaked or otherwise stuck resources are identified, the monitoring software can set the register to trigger the recovery of those resources. This recovery of resources can be then performed by stopping the execution of processes in the hardware engines, invalidating the resources previously allocated to the hardware engines, initializing the resources, and starting the handling of new processes in the hardware engines. This process effectively recovers those resources, and allows those hardware engines to quickly resume operations.

Abstract: Embodiments of a constant-on-time pulse generator circuit for a DC-DC converter, a pulse width calibration circuit for a DC-DC converter, and a method for operating a constant-on-time pulse generator circuit for a DC-DC converter are disclosed. In an embodiment, a constant-on-time pulse generator circuit for a DC-DC converter includes serially connected digital buffers and a latch circuit having a set terminal, a reset terminal, and an output terminal. The set terminal and the reset terminal are coupled to the serially connected digital buffers. The latch circuit is configured to output a pulse signal with a constant pulse width through the output terminal.

Abstract: Embodiments of a method, a device and a computer-readable storage medium are disclosed. In an embodiment, a method for controlling access to a communications medium involves replenishing a credit value assigned to a communications node in a communications round, granting or denying access to the communications medium to the communications node during the communications round based on the credit value, and controlling the credit value in response to granting or denying access to the communications medium to the communications node during the communications round.

Abstract: Methods and apparatuses are provided for evaluating or testing stiction in Microelectromechanical Systems (MEMS) devices utilizing a mechanized shock pulse generation approach. In one embodiment, the method includes the step or process of loading a MEMS device, such as a multi-axis MEMS accelerometer, into a socket provided on a Device-Under-Test (DUT) board. After loading the MEMS device into the socket, a series of controlled shock pulses is generated and transmitted through the MEMS device utilizing a mechanized test apparatus. The mechanized test apparatus may, for example, repeatedly move the DUT board over a predefined motion path to generate the controlled shock pulses. In certain cases, transverse vibrations may also be directed through the tested MEMS device in conjunction with the shock pulses. An output of the MEMS device is then monitored to determine whether stiction of the MEMS device occurs during each of the series of controlled shock pulses.

Abstract: A display system includes a graphics controller, a difference injector, a display controller, a power measurement circuit, an arithmetic controller and an error detector. The graphics controller provides an image frame to the difference injector. The difference injector modifies the image frame by a known image artifact, and provides the image frame and the modified image frame to the display controller. The display controller displays the image frame and the modified image frame at a display screen. The power measurement circuit measures a first power characteristic of the display screen during the display of the image frame and a second power characteristic of the display screen during the display of the modified image frame. The arithmetic controller determines a differential power characteristic based on the first and second power characteristics. The error detector determines whether the differential power characteristics are indicative of the display of a known image artifact.

Abstract: A gain function controller may be configured to: receive a first plurality of sub-band-signals; determine a frequency-domain-gain-function for a second plurality of sub-band-signals, based on: the first plurality of sub-band-signals; a power of a first full-band signal; and a predetermined compression curve; and apply the frequency-domain-gain-function to the second plurality of sub-band-signals to provide a frequency-domain-output-signal.

Abstract: This specification discloses methods and systems for implementing a chip integrated scope (i.e., chip scope (CS)), which is a feature that allows a user to scope RF signals (internally and externally to the DUT (device under test)), by using the RF receive path (including amplifier, filter, ADC, DSP) to capture and store signal traces. In some embodiments, this specification discloses methods and systems to enhance the sampling rate and resolution of these signal traces by using subsampling techniques where a post-processing merges the subsampled traces (with different phase-shifts of say, for example, 0°, 90°, 180°, and 270°) into a single trace that will appear to have a sampling rate that is higher than a pre-determined sampling rate used to collect these subsampled traces.

Abstract: Various embodiments relate to a flyback type SMPS including a primary side controller on a primary side, a first switch on the primary side and a transformer including a primary side winding on the primary side, a secondary side winding on a secondary side and an auxiliary winding on the primary side connected to a first switching regulator wherein the first switching regulator is supplied during a primary stroke from the auxiliary winding when the first switch is on.

Abstract: An integrated circuit includes a digital logic circuit, a multiplexer (MUX) having a first and a second data input, a control input, and an output coupled to an input of the digital logic circuit. The second data input is coupled to receive a high frequency clock signal. The integrated circuit includes a very low frequency (VLF) clock is configured to provide a VLF clock signal when enabled, and a counter coupled to receive the VLF clock signal and configured to toggle an output of the counter upon counting a predetermined number of cycles of the VLF clock signal. The output of the counter is coupled to the first data input of the MUX. The MUX is configured to provide the first data input as the output of the MUX during a low power mode, and otherwise to provide the second data input as the output of the MUX.

Abstract: Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a base flange, retention posts integrally formed with the base flange and extending from the flange frontside in a direction opposite the flange backside, and retention tabs having openings through which the retention posts are received. A molded package body is bonded to the base flange and envelopes, at least in substantial part, the retention posts and the retention tabs. The molded air cavity package further includes package leads extending from the molded package body. In certain implementations, the package leads and the retention tabs comprise singulated portions of a leadframe. Additionally or alternatively, the retention posts may be staked or otherwise physically deformed in a manner preventing disengagement of the retention posts from the retention tabs along a centerline of the molded air cavity package.

Abstract: A method for voltage regulation includes reducing a power consumption of a voltage regulator during an IDLE phase, by disabling a feedback loop configured to regulate an internal voltage to a multiple of a reference voltage in response to the voltage regulator receiving a digital signal from a digital circuit. The internal voltage is proportional to an external voltage supplied to the digital circuit. A regulated accuracy of the external voltage is increased during a MEASUREMENT phase by enabling the feedback loop in response to the voltage regulator receiving the digital signal from the digital circuit.

Abstract: A touch sensitive capacitive keypad system (100) is provided with an analog-to-digital converter, a keypad sensing electrode (114) coupled to measure capacitance voltages using a configurable electrode scan rate, and a controller (120) configured to provide scan-rate independent capacitance voltage measurements from the keypad sensing electrode to the analog-to-digital converter when there is a change in the configurable electrode scan rate by repetitively sampling a capacitance voltage measurements (e.g., 524a-f) from the keypad sensing electrode over a plurality of sequential electrode scan cycles and then discarding a predetermined number of the capacitance voltage measurements (e.g., 524a-b) to generate the scan-rate independent capacitance voltage measurements (e.g., 524c-f) that are provided to the analog-to-digital converter.