Abstract: Systems and methods for electronic devices are presented. A device includes a substrate. An Indium Gallium Nitride (InGaN) nanoring is formed over the substrate. The InGaN nanoring includes an alloy of Indium Nitride (InN) and Gallium Nitride (GaN). The alloy includes at least 6 percent Indium. A GaN layer may be formed over the InGaN nanoring, and a first electrode is formed over the GaN layer. In one embodiment, the alloy includes less than about 70 percent Indium.

Abstract: A method of obscuring the input and output of a modular exponentiation function, including: receiving modular exponentiation parameters including an exponent e having N bits and a modulus m; generating randomly a pre-multiplier; calculating a post-multiplier based upon the pre-multiplier, exponent e, and modulus m; multiplying an input to the modular exponentiation function by the pre-multiplier; performing the modular exponentiation function; and multiplying the output of the modular exponentiation function by the post-multiplier, wherein multiplying an input to the modular exponentiation function by the pre-multiplier, performing the modular exponentiation function, and multiplying the output of the modular exponentiation function by the post-multiplier are split variable operations.

Abstract: It is described an arrangement (560, 660, 760) for fingerprint sensing/verification, comprising: a sensor system (100) comprising plural sensor capacitors (101), each sensor capacitor including a central electrode (103) and a peripheral electrode (105) annularly surrounding the central electrode and being connected to a ground potential; wherein changes of the electric fields between each of the central electrode and the peripheral electrode of the plural sensor capacitors upon positioning a finger (317) close to the sensor system is used to detect the fingerprint.

Abstract: A gesture recognition device (100) for recognising gestures made by a user is disclosed. The device comprises a gesture detector for detecting a gesture made be a user and a gesture analysis block, the gesture analysis block comprising a memory configured to store known gestures, and a pattern recognition block configured to associate a gesture detected by the gesture detector with a known gesture stored in the memory. The device (100) further comprises a magnetic field generator for interacting with a wearable tag (200), the magnetic field generator configured to provide a magnetic force (202) on the wearable tag (200) when a particular gesture is recognised by the gesture analysis block.

Abstract: According to a first aspect of the present disclosure, an electronic device for use in a touch-based user interface is provided, the electronic device comprising a first capacitor, a second capacitor, a third capacitor, and an analog-to-digital converter, wherein: the first capacitor and the second capacitor are switchably coupled to each other; the first capacitor is switchably coupled to an input of the analog-to-digital converter; the second capacitor is coupled to the input of the analog-to-digital converter; the third capacitor is coupled to the first capacitor; the third capacitor is switchably coupled to the second capacitor; the third capacitor is switchably coupled to the input of the analog-to-digital converter. According to a second aspect of the present disclosure, a corresponding method of manufacturing an electronic device for use in a touch-based user interface is conceived.

Abstract: An embodiment of an electronic device includes a circuit component (e.g., a transistor or other component) coupled to the top surface of a substrate. Encapsulation is formed over the substrate and the component. An opening in the encapsulation extends from the encapsulation top surface to a conductive feature on the top surface of the component. A conductive termination structure within the encapsulation opening extends from the conductive feature to the encapsulation top surface. The device also may include a second circuit physically coupled to the encapsulation top surface and electrically coupled to the component through the conductive termination structure. In an alternate embodiment, the conductive termination structure may be located in a trench in the encapsulation that extends between two circuits that are embedded within the encapsulation, where the conductive termination structure is configured to reduce electromagnetic coupling between the two circuits during device operation.

Abstract: According to a first aspect of the present disclosure, a fingerprint sensing system is provided, comprising: at least one sensing element configured and arranged to generate a sensing characteristic; a detection unit configured and arranged to detect changes of said sensing characteristic over time; a processing unit configured and arranged to determine if the changes of said sensing characteristic substantially conform to a predefined liveness function. According to a second aspect of the present disclosure, a corresponding fingerprint sensing method is conceived. According to a third aspect of the present disclosure, a corresponding computer program product is provided.

Abstract: Signal equalization is provided, according to certain aspects, by a frequency-domain equalization circuit, a noise-whitening filter and a noise predictor. A sequencer is used to control ordering of the equalization circuit, a noise-whitening filter and a noise predictor. The equalization circuit provides equalization the frequency domain by converging on symbols of the input signal. The noise-whitening filter and the noise predictor filter colored noise from a signal responsive to the equalization circuit. The sequencer controls operation of the noise-whitening filter by detecting an indication of convergence of the symbols from input signal and causing the noise-whitening filter to commence suppression of colored noise from a signal derived from an output by the equalization circuit.

Abstract: A method of forming a semiconductor device (100) includes depositing a metal oxide (104) over the substrate (102). The depositing includes combining a first metal and oxygen to form the metal oxide having grains and further adding a catalyst during the combining. The catalyst causes the grains to be bigger than would occur in the absence of the catalyst. A conductive layer (202) is formed over the metal oxide.

Abstract: The disclosure relates to a dual-interface integrated circuit (IC) card.

Abstract: A reception device comprising: at least one receiver and a corresponding delay buffer configured to receive portions of data for at least one data stream; wherein based on a request to switch from decoding delayed data portions retrieved from a host device from a first time point to decoding delayed data portions from a different, second time point, the request received while the controller is configured to receive the delayed data portion from said first time point for decoding; the controller is configured to; (a) identify one or more second-time-point delayed data portions to request from the host device; (b) request the one or more identified second-time-point delayed data portions; and (c) while one or both of requesting and receiving the one or more second-time-point delayed data portions, requesting one or more delayed data portions corresponding to the first time.

Abstract: A power supply ready indicator circuit is described. The power supply ready indicator circuit includes a first power-supply-ready-input interfacing with a first power supply rail; a second power-supply-ready-input interfacing with a second power supply rail; and a power ready indicator output. The power supply ready indicator circuit is configured to divide the voltage on the first power supply rail, and to compare the divided voltage with the second power supply rail voltage. The power supply ready indicator circuit generates a power ready signal on the power ready indicator output in response to the divided voltage value being greater than the second power supply rail voltage value. The final value of the first power supply rail voltage is greater than the final value of the second power supply rail voltage.

Abstract: Various embodiments relate to a method for classifying received radio frequency signals, including: receiving an input signal; matched filtering the input signal to produce a correlation result signal; sampling the correlation result signal at a plurality of half-bit-grids and a plurality of bit-grids to produce a set of modulated phase correlation result samples and a set of non-modulated phase correlation result samples; calculating a minimum of the set of modulated phase correlation result samples; calculating a maximum of the set of non-modulated phase correlation result samples; and classifying the input signal as valid data or collision data based on the minimum and the maximum.

Abstract: A control arrangement is disclosed for a switch mode power supply (SMPS), the SMPS comprising an opto-coupler configured to transfer, from a secondary side to a primary side of the switch mode power supply by means of an LED current, a control signal indicative of an error between an amplifier-reference-signal and an amplifier-sensed-signal indicative of an actual value of an output parameter, the control arrangement comprising: an error amplifier configured to integrate the error to determine the LED current; and a feedback loop configured to adjust the magnitude of the LED current by modifying the amplifier-reference-signal or the amplifier-sensed-signal in order to reduce the error. A SMPS comprising such a control arrangement, and a corresponding method is also disclosed.

Abstract: Embodiments of an electrostatic discharge (ESD) protection device and a method of operating an ESD protection device are described. In one embodiment, an ESD protection device includes an NMOS transistor configured to shunt current in response to an ESD pulse and a bigFET connected in parallel with the NMOS transistor. The NMOS transistor includes a source terminal, a gate terminal, and a body. The gate terminal and the body of the NMOS transistor are connected to the source terminal via a resistor. Other embodiments are also described.

Abstract: There is disclosed a method for managing content, including generating, by a service provider, an authenticable management script configured to manage content comprised in a secure element; providing, by the service provider, the authenticable management script to the secure element. Furthermore, there is disclosed a method for managing content, comprising: receiving, by a secure element, an authenticable management script for managing content comprised in the secure element; authenticating, by the secure element, the authenticable management script; executing, by the secure element, the management script if the management script is authentic. Furthermore, there are disclosed corresponding computer program products and a corresponding secure element.

Abstract: A digital synthesizer is described that comprises: a ramp generator configured to generate a signal of frequency control words, FCW, that describes a desired frequency modulated continuous wave; a digitally controlled oscillator, DCO configured to receive the FCW signal; a feedback loop; and a phase comparator coupled to the ramp generator and configured to compare a phase of the FCW output from the ramp generator and a signal fed back from the DCO via the feedback loop and output a N-bit oscillator control signal. The digital synthesizer comprises a gain circuit coupled to a multiplier located between the ramp generator and the DCO and configured to apply at least one gain from a plurality of selectable gains to the N-bit oscillator control signal that set a selectable loop gain of the digital synthesizer and thereby set a selectable loop bandwidth; and calculate and apply a gain offset dependent upon the selected gain that is adapted when the selected gain is changed.

Abstract: The present application relates to an adaptive filter using resource sharing and a method of operating the adaptive filter. The filter comprises at least one computational block, a monitoring block and an offset calculation block. The computational block is configured for adjusting a filter coefficient, ci(n), in an iterative procedure according to an adaptive convergence algorithm. The monitoring block is configured for monitoring the development of the determined filter coefficient, ci(n), during the performing of the iterative procedure. The offset calculation block is configured for determining an offset, Offi, based on a monitored change of the filter coefficient, ci(n), each first time period, T1, and for outputting the determined offset, Offi, to the computational block if the determined filter coefficient, ci(n), has not reached the steady state. The computational block is configured to accept the determined offset, Offi, and to inject the determined offset, Offi, into the iterative procedure.

Abstract: An integrated circuit comprising a transceiver including a transformer. The transformer includes an input coupled to one or more primary windings. The transformer also includes a first differential output coupled to a first set of one or more secondary windings. The transformer further includes a second differential output coupled to a second, different set of one or more secondary windings. A method of making an integrated circuit comprising a transceiver. The method includes forming a plurality of components on and/or in a semiconductor substrate. At least one of the components comprises a transformer. The method includes forming the transformer by forming one or more primary windings coupled to an input, forming a first set of one or more secondary windings coupled to a first differential output, and forming a second, different set of one or more secondary windings coupled to a second differential output.

Abstract: Methods and systems for accessing a memory are provided. One method of accessing a memory includes generating a memory access profile for accesses to a memory array. A memory controller coupled to the memory array is configured using the generated memory access profile. After configuring the memory controller, accesses to the memory array are interleaved based on the memory access profile.