Patents Assigned to NXP
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Patent number: 10393769Abstract: A microelectromechanical device comprising a mass, an electromechanical transducer configured to convert, after damping the mass during a first damping period, displacement of the mass in the first and second directions into corresponding first and second electrical signals during corresponding first and second conversion time periods, a derivative unit configured to generate first and second control signals indicative of the velocity of the mass in the first and second direction, and a controller for providing the first and second control signals to respective first and second one or more electrodes of the electromechanical transducer for simultaneously damping the mass in the first and second directions with a first and second damping forces corresponding to the first and second velocity during the damping time period.Type: GrantFiled: March 8, 2017Date of Patent: August 27, 2019Assignee: NXP USA, Inc.Inventors: Olivier Bernal, Lavinia Elena Ciotirca, Thierry Dominique Yves Cassagnes, Jerome Romain Enjalbert, Helene Catherine Louise Tap
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Patent number: 10391867Abstract: An apparatus in which electric power is generated for an electrical load from differentials in electric field strengths within a vicinity of powerlines includes: a plurality of electrodes separated and electrically insulated from one another for enabling differentials in voltage resulting from differentials in electric field strength experienced there at; and electrical components electrically connected therewith and configurable to establish one or more electric circuits whereby voltage differentials cause a current to flow through the established electric circuit for powering the electrical load.Type: GrantFiled: October 18, 2018Date of Patent: August 27, 2019Assignee: NXP AERONAUTICS RESEARCH, LLCInventors: Steven J. Syracuse, Chad D. Tillman
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Patent number: 10396583Abstract: A wireless mobile communication device having short range functionality that is designed to always be capable of short range functionality, including secure short range functionality by having a first and second energy source where charging of the second energy source may be achieved by the voltage induced by the received short range signal.Type: GrantFiled: January 10, 2013Date of Patent: August 27, 2019Assignee: NXP B.V.Inventors: Philippe Maugars, Patrice Gamand
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Patent number: 10393597Abstract: A device for over-temperature detection having a test mode is presented. The device includes a temperature detection circuit having first and second transistors. The temperature detection circuit is configured so that when an ambient temperature of the temperature detection circuit is less than a temperature threshold, a voltage at an emitter terminal of the second transistor is less than a voltage at an emitter terminal of the first transistor minus VT*ln(N), and when the ambient temperature of the temperature detection circuit is greater than the temperature threshold, the voltage at the emitter terminal of the second transistor is greater than a voltage at the emitter terminal of the first transistor minus VT*ln(N). The device includes a measurement circuit configured to generate an output voltage that is proportional to a difference between the temperature threshold of the temperature detection circuit and the ambient temperature of the temperature detection circuit.Type: GrantFiled: April 4, 2018Date of Patent: August 27, 2019Assignee: NXP USA, Inc.Inventor: John M. Pigott
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Patent number: 10394264Abstract: A back bias voltage generator circuit includes a first resistive element connected in series with a second resistive element; a first amplifier having a first input coupled to an input voltage, a second input coupled to a first node at a first terminal of the first resistive element, and an output coupled to an N-polarity metal-oxide semiconductor (NMOS) bias voltage node. A second amplifier has a first input coupled to a symmetrical voltage, a second input coupled to a second node between a second terminal of the first resistive element and a first terminal of the second resistive element, and an output coupled to a P-polarity metal-oxide semiconductor (PMOS) bias voltage node and the second terminal of the second resistive element. The symmetrical voltage is between a highest supply voltage and a lowest supply voltage coupled to the first amplifier.Type: GrantFiled: February 9, 2018Date of Patent: August 27, 2019Assignee: NXP USA, Inc.Inventors: Ricardo Pureza Coimbra, Javier Mauricio Olarte Gonzalez, Ivan Carlos Ribeiro do Nascimento, Felipe Ricardo Clayton, Stefano Pietri, Charles Eric Seaberg
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Patent number: 10396974Abstract: An apparatus includes signal control circuitry, a phase-locked loop (PLL), and a correlation circuit. The signal control circuitry provides a reference clock signal carrying pseudo-random phase noise and as derived from an application clock signal and pseudo-random noise. The PLL, responsive to the reference clock signal carrying the pseudo-random phase noise, provides an output signal that is related to the phase of the reference clock signal. The correlation circuit self-tests the PLL by cross-correlating a signal corresponding to the output signal from the phase detector with the pseudo-random noise and, in response, by assessing results of the cross-correlation relative to a known threshold indicative of a performance level of the PLL.Type: GrantFiled: July 20, 2018Date of Patent: August 27, 2019Assignee: NXP B.V.Inventors: Jan-Peter Schat, Ulrich Moehlmann
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Patent number: 10386413Abstract: An integrated circuit includes a plurality of state retention power gating (SRPG) flip-flops coupled in a first chain, wherein the first chain has a first scan input and a first scan output; a pseudo random pattern generator (PRPG) configured to generate test patterns in response to seeds; a multiplexer (MUX) coupled between the PRPG and the first scan input and coupled to receive a select signal; and response compression logic coupled to the first scan output and configured to generate a test signature in response to an output pattern provided at the first scan output. The MUX is configured to, when the select signal has a first value, couple a first output of the PRPG to the first scan input, and, when the select signal has a second value, couple an inversion of the first output of the PRPG to the first scan input.Type: GrantFiled: September 14, 2016Date of Patent: August 20, 2019Assignee: NXP USA, Inc.Inventors: Andrew H. Payne, Jose A. Lyon, Colin MacDonald
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Patent number: 10386243Abstract: An on-chip temperature sensor generates a proportional to absolute temperature current and sloped bandgap reference current with transistor offset cancelled using chopping circuitry and dynamic element matching circuitry with resistor-based current mirrors. A digital successive approximation register (SAR) code provided to a digital to analog converter (DAC) is adjusted until current output by the DAC matches the PTAT current.Type: GrantFiled: November 28, 2016Date of Patent: August 20, 2019Assignee: NXP USA, Inc.Inventors: Firas N. Abughazaleh, Venkata Rama Mohan Reddy Mooraka
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Patent number: 10390440Abstract: In a die-substrate assembly, a copper inter-component joint is formed by bonding corresponding copper interconnect structures together directly, without using solder. The copper interconnect structures have distal layers of (111) crystalline copper that enable them to bond together at a relatively low temperature (e.g., below 300° C.) compared to the relatively high melting point (about 1085° C.) for the bulk copper of the rest of the interconnect structures. By avoiding the use of solder, the resulting inter-component joint will not suffer from the adverse IMC/EM effects of conventional, solder-based joints. The distal surfaces of the interconnect structures may be curved (e.g., one concave and the other convex) to facilitate mating the two structures and improve the reliability of the physical contact between the two interconnect structures. The bonding may be achieved using directed microwave radiation and microwave-sensitive flux, instead of uniform heating.Type: GrantFiled: February 1, 2018Date of Patent: August 20, 2019Assignee: NXP B.V.Inventors: Tsung Nan Lo, Chung Hsiung Ho
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Patent number: 10390200Abstract: Embodiments of methods and systems for operating a communications device that communicates via inductive coupling are described. In an embodiment, a method for operating a communications device that communicates via inductive coupling involves obtaining transmission output power information related to the communications device and measuring a detuning condition based on the transmission output power information. Other embodiments are also described.Type: GrantFiled: December 19, 2016Date of Patent: August 20, 2019Assignee: NXP B.V.Inventors: Gernot Hueber, Johannes Bruckbauer, Erich Merlin
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Microelectronic devices with multi-layer package surface conductors and methods of their fabrication
Patent number: 10388607Abstract: An embodiment of a device includes a package body having a first sidewall, a top surface, and a bottom surface, and multiple pads that are exposed at the first sidewall and that are electrically coupled to one or more electrical components embedded within the package body. The device also includes a package surface conductor coupled to the first sidewall. The package surface conductor extends between and electrically couples the multiple pads, and the package surface conductor is formed from a first surface layer and a second surface layer formed on the first surface layer. The first surface layer directly contacts the multiple pads and the first sidewall and is formed from one or more electrically conductive first materials, and the second surface layer is formed from one or more second materials that are significantly more resistive to materials that can be used to remove the first materials.Type: GrantFiled: December 17, 2014Date of Patent: August 20, 2019Assignee: NXP USA, Inc.Inventors: Zhiwei Gong, Scott M. Hayes, Michael B. Vincent -
Patent number: 10387687Abstract: A method of trust provisioning a device, including: receiving, by a hardware security module (HSM), a list of instructions configured to produce trust provisioning information; performing, by the HSM, a constraint check on the list of instructions including performing a symbolic execution of the list of instructions; receiving confidential inputs; executing, by the HSM, the list of instructions on the confidential inputs when the list of instructions passes the constraint check; outputting, by the HSM, trust provisioning information.Type: GrantFiled: April 7, 2017Date of Patent: August 20, 2019Assignee: NXP B.V.Inventors: Florian Boehl, Clemens Orthacker, Klaus Martin Potzmader, Andreas Daniel Sinnhofer, Christian Steger
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Patent number: 10389522Abstract: The disclosure relates to secure data storage and retrieval, in particular to methods and circuits for securely storing data to reduce the possibility of leakage via side channel attacks. Embodiments disclosed include a method of storing a value comprising a series of words, the method comprising: i) combining in a series of XOR operations a word of a first portion of the value, a word of a second portion of the value and an output word of a first random number generator to provide a first combined word; ii) storing the first combined word in a shift register; and iii) repeating steps i) and ii) for each successive word of the first and second portions of the value.Type: GrantFiled: February 4, 2017Date of Patent: August 20, 2019Assignee: NXP B.V.Inventor: Sebastien Riou
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Patent number: 10389517Abstract: A method for performing a secure function in a data processing system is provided. In accordance with one embodiment, the method includes generating and encoding an encryption key. The encoded encryption key may be encrypted in a key store in a trusted execution environment (TEE) of the data processing system. The encrypted encryption key may encrypted, stored, and decrypted in the key store in the TEE, but used in a white-box implementation to perform a secure function. The secure function may include encrypting a value in the white-box implementation for securing a monetary value on, for example, a smart card. In one embodiment, each time an encryption key or decryption key is used, it is changed to a new key. The method makes code lifting and rollback attacks more difficult for an attacker because the key is stored separately from, for example, a white-box implementation in secure storage.Type: GrantFiled: June 27, 2016Date of Patent: August 20, 2019Assignee: NXP B.V.Inventors: Wilhelmus Petrus Adrianus Johannus Michiels, Jan Hoogerbrugge, Joppe Willem Bos
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Patent number: 10384001Abstract: One example discloses a fluid flow device, including: a drop chamber, having an interior, a fluid input, and a fluid output; a drop detector coupled to the drop chamber and configured to detect a fluid drop at the fluid input; a pressure sensor configured to monitor a pressure in the interior of the drop chamber; and a flow rate device configured to determine a fluid flow rate based on a number of fluid drops detected over a time period, and the pressure in the interior of the drop chamber.Type: GrantFiled: January 17, 2017Date of Patent: August 20, 2019Assignee: NXP B.V.Inventors: Axel Nackaerts, Micha Benjamin Disselkoen
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Patent number: 10389406Abstract: One example discloses a near-field device, comprising: a near-field receiver coupled to a near-field receiver antenna and a decoder circuit; wherein the near-field receiver antenna is configured to be capacitively coupled at a first location of a first substance; wherein the near-field receiver antenna is configured to receive a first near-field signal from the first substance through the receiver's capacitive coupling; and wherein the decoder circuit is configured to compare an attribute of the first near-field signal to an attribute of a second near-field signal received from a second substance.Type: GrantFiled: July 5, 2017Date of Patent: August 20, 2019Assignee: NXP B.V.Inventors: Anthony Kerselaers, Pieter Verschueren, Liesbeth Gommé
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Patent number: 10386470Abstract: A radar system for a motor vehicle is describe including a plurality (M) of transmitters for transmitting a radar signal, a receiver for receiving the transmitted radar signal reflected by an object, a signal re-constructor coupled to the receiver. Each transmitter is configured to transmit at least part of a frequency modulated continuous wave signal during a time period T having N sample time periods of duration T/N, and in each of the N sample time periods combinations of at least some of the transmitters transmit. The signal re-constructor is configured to determine the coordinates of an object with respect to the radar system from N measurements of the received frequency modulated continuous wave signal, each of the N measurements being made for a time period of T/N. The radar system may reduce the detection time for objects while maintaining the angular resolution.Type: GrantFiled: February 22, 2017Date of Patent: August 20, 2019Assignee: NXP B.V.Inventor: Zoran Zivkovic
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Patent number: 10386398Abstract: According to a first aspect of the present disclosure, an electronic device is provided which comprises: a substrate; an integrated circuit; a layer of conductive glue between the substrate and the integrated circuit; at least one first electrode connected to the conductive glue and at least one second electrode connected to the conductive glue; wherein the first electrode and the second electrode are arranged to receive a voltage generator input, such that a capacitance develops between said first electrode and second electrode, wherein at least a part of said capacitance develops through the layer of conductive glue; and wherein the first electrode and the second electrode are arranged to output said capacitance. According to a second aspect of the present disclosure, a corresponding method of manufacturing an electronic device is conceived.Type: GrantFiled: October 8, 2016Date of Patent: August 20, 2019Assignee: NXP B.V.Inventor: Thomas Suwald
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Publication number: 20190250210Abstract: A method, system, and architecture (100) for adaptively field testing for hardware faults on an integrated circuit device includes a central quality assurance server (121) which receives specified hardware metric data (131) monitored at an integrated circuit device (110) in the field, identifies prioritized built-in self-test (BIST) fault detection tests (134) based on the specified hardware metric data, securely downloads the prioritized BIST fault detection tests (132) to the integrated circuit device for execution to identify a first hardware fault at the integrated circuit device, and then receives diagnosis information (133) identifying the first hardware fault from the integrated circuit device which is used to update the prioritized BIST fault detection tests.Type: ApplicationFiled: February 9, 2018Publication date: August 15, 2019Applicant: NXP USA, Inc.Inventors: Xiao Sun, Wen Chen, Jayanta Bhadra
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Patent number: 10379899Abstract: A data processing system can comprise a first module having a workspace and configured to execute a task that can request access to a frame in a system memory, a queue manager configured to store a frame descriptor which identifies the frame in the system memory, and a memory access engine coupled to the first module and the queue manager. The memory access engine copies requested segments of the frame to the workspace and has a working frame unit to store a segment handle identifying a location and size of each requested segment copied to the workspace of the first module. The memory access engine tracks history of a requested segment by updating the working frame unit when the requested segment in the workspace is modified by the executing task.Type: GrantFiled: November 18, 2015Date of Patent: August 13, 2019Assignee: NXP USA, Inc.Inventors: John F. Pillar, Michael Kardonik, Bernard Marchand, Peter W. Newton, Mark A. Schellhorn