Abstract: A system includes an RF signal source configured to output an RF signal at a first frequency, and a first controller configured to generate a first data signal encoding instructions at a second frequency. A first filter is coupled to the RF signal source. The first filter is a low pass filter having a cutoff frequency between the first frequency and the second frequency. The first filter is configured to couple to a first end of a cable. A second filter is coupled to the first controller. The second filter is a high pass filter having a cutoff frequency between the first frequency and the second frequency. The second filter is configured to couple to the first end of the cable. The system includes an impedance matching network configured to couple to a second end of the cable. A first electrode is coupled to the impedance matching network.

Abstract: Various embodiments relate to a memory controller configured to read data from a memory array, including: an error correction codes (ECC) encoder configured to encode data stored in the memory array; an ECC decoder configured to decode first data read from the memory array based upon a first read request and detect errors in the first data read from the memory array; and a fault controller configured to: command the memory controller to read other data from the memory array when the ECC detects an error; command the memory controller to re-read the first data from the memory array; when the ECC detects an error; compare the re-read first data to the read first data; and signal a fault attack when the re-read first data is different from the read first data.

Abstract: A GPIO includes a transmitter having an output stage connected to the I/O pad and adapted to supply transmit data to an I/O pad in response to output data generated by a low voltage core logic operating within a functional voltage range for transmit operations; a receiver adapted to supply receive data to the low voltage core logic operating within the functional voltage range in response to input data received at the I/O pad for receive operations; a VLV transmitter adapted to supply VLV transmit data to the output stage of the transmitter and not directly to the I/O pad in response to output test data generated by the low voltage core logic; and a VLV receiver adapted to supply VLV receive data to the low voltage core logic operating within a low core supply voltage range in response to input data received from the output stage of the transmitter.

Abstract: A voltage glitch detector includes a ring oscillator, a plurality of counters, a combined result circuit, and a result evaluation circuit. The ring oscillator includes a plurality of series-connected stages. An output of a last stage of the ring oscillator is coupled to an input of a first stage of the ring oscillator. Each counter of the plurality of counters has an input coupled to a node located between two stages of the plurality of series-connected stages. The combined result circuit is coupled to each of the plurality of counters. The combined result circuit combines the count values received from each counter of the plurality of counters to provide a combined result. The result evaluation circuit is coupled to compare the combined result with a reference value to determine when a voltage glitch is detected.

Abstract: One example discloses a first wireless device, including: a band-steering device including a band-detection element and a band-steering element; wherein the band-detection element is configured to receive a first signal from a second wireless device and detect from the first signal if the second device has multi-band capability; and wherein the band-steering element is configured to respond to the first signal by transmitting a second signal to the second device in a preferred band.

Abstract: An apparatus in which electric power is generated for an electrical load from differentials in electric field strengths within a vicinity of powerlines includes: a plurality of electrodes separated and electrically insulated from one another for enabling differentials in voltage resulting from differentials in electric field strength experienced there at; and electrical components electrically connected therewith and configurable to establish one or more electric circuits whereby voltage differentials cause a current to flow through the established electric circuit for powering the electrical load.

Abstract: Various embodiments relate to a method for power save operation by a non-access point (non-AP) multi-link device (MLD), wherein a plurality of links are established between the non-AP MLD and an AP MLD, including: setting, by the non-AP MLD, a QoS capability for a first access category to a first state on all links of the plurality of links that the non-AP MLD operates; transmitting, by the non-AP MLD, a first management frame to the AP MLD, wherein the first management frame is used to request a multi-link setup with the AP MLD, and wherein the first management frame includes a first element that comprises the setting of the QoS capability for the first access category; receiving, by the non-AP MLD, a second management frame from the AP MLD, wherein the second management frame includes information for an association ID (AID) that corresponds to the non-AP MLD, wherein the AID is assigned to the non-AP MLD regardless of the number of links in the plurality of links; and receiving, by the non-AP MLD, a third m

Abstract: Design and methods for implementing a Rational Ratio Multiplier (RRM) with close to 50% duty cycle. This invention gives an optimal way to implement an RRM that saves both area and power for a given design and is able to achieve a good accuracy of the output clock with a difference between the high period and the low period of the output clock by only half a cycle of the input clock which is the closest to get to a 50% duty cycle clock.

Abstract: In accordance with a first aspect of the present disclosure, a communication device is provided, comprising: an ultra-wideband (UWB) transceiver configured to communicate with an external communication device; a processing unit configured to switch the UWB transceiver between different transceiver modes of operation while the UWB transceiver receives or transmits a data frame; wherein the different transceiver modes of operation include a ranging mode, an angle-of-arrival (AoA) mode and/or a radar mode. In accordance with a second aspect of the present disclosure, a corresponding method of operating a communication device is conceived. In accordance with a third aspect of the present disclosure, a corresponding computer program is provided.

Abstract: A system and method for a memory system are provided. A memory device includes an array of non-volatile memory cells. A memory controller is connected to the array of non-volatile memory cells. The memory controller is configured to perform the steps of receiving a request to read a value of a memory flag, wherein the memory flag includes a 2-bit value stored in a first memory cell and a second memory cell of the array of non-volatile memory cells, reading a first value of the first memory cell, reading a second value of the second memory cell, and determining the value of the memory flag based on the first value and the second value. In embodiments, the memory flag may have more than 2-bits.

Abstract: A first error is determined between a bandgap reference output voltage of a bandgap reference circuit at a first temperature and a target voltage. A second temperature of the bandgap reference circuit is measured. A bandgap reference output voltage of the bandgap reference circuit is predicted at the second temperature and based on the first error. A second error is determined between the bandgap reference output voltage and the target voltage. A trim parameter of the bandgap reference circuit is determined based on the second error. The bandgap reference circuit is set with the trim parameter, where a third error between a bandgap reference output voltage of the bandgap reference with the trim parameter is less than the second error.

Abstract: A communications system (300) comprising: an antenna (320) that comprises a plurality of serially connected sub-antenna elements (322); and a signal generator (324) configured to provide a transmission signal to the antenna (320) for propagating along the sub-antenna elements (322). The transmission signal comprises a plurality of serial symbol packets. The signal generator (324) is configured to set the phase of the serial symbol packets such that when they align with predefined ones of the sub-antenna elements (322) the antenna (322) provides a beamformed signal.

Abstract: In accordance with a first aspect of the present disclosure, a system is provided for facilitating detecting an unauthorized access to an object, the system comprising: a plurality of ultra-wideband (UWB) communication nodes; a controller operatively coupled to said plurality of UWB communication nodes, wherein the controller is configured to: cause at least one of the UWB communication nodes to transmit one or more UWB messages to other UWB communication nodes of said plurality of UWB communication nodes; receive a channel impulse response (CIR) estimate and/or one or more parameters relating to said CIR output by the UWB communication nodes in response to receiving said UWB messages; analyze said CIR estimate and/or said parameters relating to the CIR to detect said unauthorized access to the object. In accordance with a second aspect of the present disclosure, a corresponding method is conceived for facilitating detecting an unauthorized access to an object.

Abstract: Embodiments of a method and an apparatus for wireless communications are disclosed. In an embodiment, a method for wireless communications involves generating a Physical Layer Protocol Data Unit (PPDU) that includes a resource unit (RU), wherein a size of the RU is less than a signal bandwidth and wherein data corresponding to the RU is distributed onto a disjoint set of subcarriers included in a frequency unit, and transmitting the PPDU using the disjoint set of subcarriers in accordance with a power spectrum density (PSD) limit.

Abstract: A method for forming a packaged integrated circuit device includes providing a semiconductor wafer having a plurality of integrated circuit devices, each integrated circuit device extending into the semiconductor wafer to a first depth, and grinding a backside of the silicon wafer to no more than the first depth. The method further includes forming a backside cut between the integrated circuit devices. The backside cut extends to within the first depth, but the backside cut does not extend completely through the semiconductor wafer. The backside cut exposes a plurality of edges of each of the integrated circuit devices. The method further includes depositing, on the backside of the wafer, a metallization layer on a bottom surface of the integrated circuit devices and on the edges.

Abstract: A cost-effective process and structure is provided for a thermal dissipation element for semiconductor device packages incorporating antennas that can incorporate RF/EMI shielding from the antenna elements. Certain embodiments provide incorporated antenna element structures as part of the same process. These features are provided using a selectively-plated thermal dissipation structure that is formed to provide shielding around semiconductor device dies that are part of the package. In some embodiments, the thermal dissipation structure is molded to the semiconductor device, thereby permitting a thermally efficient close coupling between a device die requiring thermal dissipation and the dissipation structure itself.

Abstract: In one example, a radar circuit uses computer processing circuitry for processing data corresponding to reflection signals via a sparse array. Output data indicative of signal magnitude associated with the reflection signals is generated, and then angle-of-arrival information is discerned therefrom by (e.g., iteratively): correlating the output data with at least one spatial frequency support vector indicative of a correlation peak for the output data; generating upper-side and lower-side support vectors which are neighbors along the spatial frequency spectrum for said at least one spatial frequency support vector, and providing, via a correlation of the upper-side and lower-side support vectors and said at least one spatial frequency support vector, at least one new vector that is more refined along the spatial frequency spectrum for said at least one spatial frequency support vector.

Abstract: A temperature sensor includes a sensing element and a load. Multiple different currents pass through the sensing element in a sequential manner. Based on each current that passes through the sensing element, the sensing element outputs a complementary-to-absolute-temperature (CTAT) voltage and another current. Further, the currents that pass through the sensing element and the currents that the sensing element output separately pass through the load and result in the generation of multiple load voltages across the load. A current density ratio of the temperature sensor is determined based on the load voltages generated across the load. Further, a temperature value indicative of a temperature sensed by the temperature sensor is generated based on the current density ratio and the CTAT voltages outputted by the sensing element based on the different currents that pass therethrough.

Abstract: Radio frequency (RF) packages containing substrates having coefficient of thermal expansion (CTE) matched mount pads are disclosed, as are methods for fabricating RF packages and substrates. In embodiments, the RF package contains a high thermal performance substrate including a metallic base structure, which has a frontside facing a first RF power die and a first die attach region on the frontside of the base structure. A first CTE matched mount pad is bonded to the metallic base structure and covers the first die attach region. The first CTE mount pad has a CTE greater than the CTE of RF power die and less than the CTE of the metallic base structure. An electrically-conductive bonding material attaches the RF power die to the first CTE matched mount pad, while RF circuitry integrated into first RF power die is electrically coupled to the metallic base structure through the mount pad.

Abstract: A register management system is coupled to a register. The register management system receives an address and functional data for a write operation to be performed on the register. The functional data includes write bits and mask bits associated with the write bits. One or more mask bits having a first logic state indicate that associated one or more write bits are to be written to the register, respectively. Based on the address, the register management system selects a first half of the register or a second half of the register to perform the write operation. Further, the register management system writes the one or more write bits associated with the one or more mask bits having the first logic state to one or more storage elements of the first half of the register or the second half of the register, respectively.