Abstract: The processor system includes a processor coupled to a memory having a plurality of memory banks and a region configurable as a heap region. At least one memory bank is allocated to the heap region dependent on a predetermined memory size required for execution of at least one cryptographic operation. At least one further memory bank is allocated to the heap region. The processor system may switch between first and second operating states. The first operating state has a lower power consumption than the second operating state. The processor system switches between a first and second operating mode by setting at least one memory bank and at least one further memory bank to an active state. The processor system switches between the second and first operating mode by setting at least one memory bank to a retention state and the at least one further memory bank to a power-down state.

Abstract: In accordance with a first aspect of the present disclosure, a system is provided, comprising: a user device to be monitored for unauthorized displacement, an ultra-wideband (UWB) communication unit configured to set up a UWB communication channel with an external localization device and to perform at least one localization operation through said UWB communication channel, and a processing unit configured to detect said unauthorized displacement of the user device by analyzing an output of said localization operation. In accordance with a second aspect of the present disclosure, a localization device is provided, comprising: an ultra-wideband (UWB) communication unit configured to set up a UWB communication channel with an external system and to perform at least one localization operation through said UWB communication channel, and a processing unit configured to detect an unauthorized displacement of a user device comprised in said external system by analyzing an output of said localization operation.

Abstract: A semiconductor device comprises a substrate including a set of interconnect pads, a die mounted on the substrate, wherein the die includes circuitry that cannot withstand typical lead-free (Pb-free) solder reflow temperature during reflow process, and a reinforcing interposer including a first set of interconnect pads and a second set of interconnect pads. Low temperature solder material connects one of the set of interconnect pads on the substrate to a corresponding one of the first set of interconnect pads on the reinforcing interposer. A printed circuit board includes a set of interconnect pads. Low temperature solder material connects one of the set of interconnect pads of the printed circuit board to a corresponding one of the second set of interconnect pads of the reinforcing interposer. The low temperature solder material has a reflow temperature below typical Pb-free solder material.

Abstract: Stable switching is disclosed for a power factor correction boost converter using an input voltage and an output voltage. In one example, a boost converter control system includes a gate driver coupled to a switch of a boost converter to generate a drive signal to control switching of the switch, wherein a period of the drive signal is adjusted using a current adjustment signal. A current control loop is coupled to the gate driver to receive a sensed input current from the boost converter and a desired input current and to generate the current adjustment signal to the gate driver. A current limiter is coupled to the gate driver and the current control loop to determine a duty cycle of the switch, to determine a maximum input current in response to the duty cycle, and to restrict the desired input current to below the maximum input current.

Abstract: Exemplary aspects are directed to a radar-based detection circuit or system with signal reception circuitry to receive reflection signals in response to radar signals transmitted towards objects. The system may include logic/computer circuitry and a multi-input multi-output (MIMO) virtual array to enhance resolution or remove ambiguities otherwise present in processed reflection signals. The MIMO array may include sparse linear arrays, each being associated with a unique antenna-element spacing from among a set of unique co-prime antenna-element spacings.

Abstract: A packet is transmitted from a remote device over a communication network. A fragment detector detects one or more fragments in a field of the packet, where the field is associated with a session layer or higher abstraction layer of an open systems interconnect (OSI) model. Fragment information is extracted from the packet which indicates one or more of a last fragment index associated with a last fragment of one or more fragment in the packet and a fragment count indicative of a number of fragments associated with a message which is fragmented. Interrupts associated with the packet with other interrupts associated with other packets are coalesced based on one or more of the last fragment index and the fragment count.

Abstract: A system for data communication between electronic devices comprises a first electronic device that is a resource-constrained device; and a second electronic device that exchanges data with the first electronic device. One of the first electronic device and the second electronic device generates a message in a data unit frame complying with a protocol stack that includes a Constrained Application Protocol (CoAP) message on a data link layer in the absence of a User Datagram Protocol (UDP) layer.

Abstract: A semiconductor device includes a semiconductor substrate, a first semiconductor region of a first semiconductor type, formed within the semiconductor substrate, wherein the first semiconductor region includes a first doped region formed in a lower portion of the first semiconductor region and a second doped region formed over the first doped region in an upper portion of the first semiconductor region. A defect layer having an upper surface formed in an upper portion of the first doped region. A second semiconductor region of a second semiconductor type is formed over the first semiconductor region.

Abstract: In accordance with a first aspect of the present disclosure, a communication node is provided, comprising: an ultra-wideband (UWB) communication unit configured to enable UWB communication with a plurality of external communication nodes; a processing unit configured to perform ranging sessions between the communication node and said external communication nodes, wherein said ranging sessions comprise one or more distance measurements based on messages exchanged through the UWB communication unit between the communication node and said external communication nodes; and a prioritization unit configured to prioritize said ranging sessions in dependence on at least one previously measured distance between the communication node and the respective external communication nodes. In accordance with a second aspect of the present disclosure, a method of operating a communication node is provided.

Abstract: A method and apparatus are described for controlling the phase of an interleaved boost converter using cycle ring time. In an embodiment, a cycle controller generates a first drive signal to control switching of a first converter and a second drive signal to control switching of a second converter, the controller receives a first cycle signal from the first converter and a second cycle signal from the second converter, wherein the first cycle signal and the second cycle signal have a power phase time and a ringing phase time. The cycle controller determines a master ringing phase time of the first cycle signal and applies the master ringing phase time to the second cycle signal to determine a slave ringing phase time. The cycle controller generates the second drive signal in accordance with the slave ringing phase time.

Abstract: There is described an RFID IC, comprising: i) an RFID interface configured to receive a digitally modulated signal, wherein the digitally modulated signal comprises: a first slot with a first pulse, and a second slot with a second pulse; and ii) a processing unit configured to a) determine a first position of the first pulse in the first slot, b) filter a region that follows the determined first position of the first pulse, c) determine a second position of the second pulse in the second slot, and, if the second position of the second pulse cannot be determined in the second slot, assume that the second position of the second pulse in the second slot is at the filtered region.

Abstract: A transmission line includes a signal conductor and one or more return conductors, one or more of which having a stepped multi-layer structure. The return conductors may be disposed at opposite sides of the signal conductor. The return conductors may be multi-layer structures. At least some layers of each return conductor may have a stepped arrangement that defines a curve, such as an exponential curve. Additionally or alternatively, the signal conductor may be a stepped multi-layer structure, where at least some layers of the signal conductor may define a curve, such as an exponential curve. The signal conductor may be disposed at one or more upper layers of the transmission line or may be embedded at one or more layers near the center of the transmission line.

Abstract: A Remap Address Space Controller controls access to an address space by selectively remapping a physical address of a transaction received from a controller to form a remapped physical address according to a current execution context of the controller. The selective remapping is based on a determination of whether the current execution context of the controller allows the transaction to access the address space. Remap Address Space Controller selectively provides the transaction with the remapped physical address to a memory bus based on the determination of whether the current execution context of the controller allows the transaction to access the address space.

Abstract: Embodiments of a circuit, system, and method are disclosed. In an embodiment, a circuit includes first and second microstrip transmission lines. The first and second microstrip transmission lines include linearly arranged conductive strips on the circuit and a slotline formation extends between the first microstrip transmission line and the second microstrip transmission line so that the slotline formation is configured to electromagnetically couple the first microstrip transmission line to the second microstrip transmission line during operation of the circuit. In addition, the circuit includes at least one controllable capacitance circuit electrically connected to at least one of the first microstrip transmission line and the second microstrip transmission line, where a magnitude of a capacitance value of the at least one controllable capacitance circuit (e.g., including a barium strontium titanate (BST) capacitor) is controllable (e.g.

Abstract: A security module (460) for a CAN node (402). The security module (460) comprises: a RXD input interface for receiving data from a CAN bus (404), and a TXD output interface for transmitting data to the CAN bus (404). The security module (460) is configured to: receive a CAN frame from the CAN bus via the RXD input interface; compare an identifier of the received CAN frame with at least one identifier associated with a local controller (410); and upon detection of a match between the identifier of the received CAN frame and the at least one identifier associated with the local controller (410), output an error signal to the CAN bus via the TXD output interface by setting a predetermined plurality of consecutive bits (682) in the CAN frame to a dominant value. The predetermined plurality of consecutive bits (682) identifies a security error to CAN nodes connected to the CAN bus (404) and is at least 10 consecutive bits.

Abstract: A voltage regulator is provided. The voltage regulator includes a shunt transistor and a feedback circuit. The shunt transistor has a first current electrode coupled to a first voltage source terminal, a second current electrode coupled to a second voltage source terminal, a control electrode coupled to receive a reference voltage, and a body electrode. The feedback circuit has an input terminal coupled to the body electrode of the shunt transistor, and an output terminal coupled to the control electrode of the shunt transistor. The voltage regulator is suitable for use in a passive RFID device to protect the device from over-voltage damage. In another embodiment, a method for regulating a voltage is provided.

Abstract: A radar system, apparatus, architecture, and method are provided for generating a difference co-array virtual aperture by using a radar control processing unit to coherently combine virtual array apertures from multiple small aperture radar devices to construct a sparse MIMO virtual array aperture and to construct an extended difference co-array virtual array aperture that is larger than the MIMO virtual array aperture by using an FFT hardware accelerator to perform spectral-domain auto-correlation based processing of the sparse MIMO virtual array aperture to fill in holes in the sparse MIMO virtual array aperture and to suppress spurious sidelobes caused by holes in the sparse MIMO virtual array aperture.

Abstract: An antenna system for a mobile communications base station and a method of operating a communications network including a base station is described. The antenna system includes an antenna array for beamforming and is configured either as a radar sensor, a communications antenna or a combined radar sensor. A radar image may be used to determine a map of objects in the vicinity of the antenna system and to adapt the beam-steering or beamforming of the antenna system.

Abstract: In accordance with the first aspect of the present disclosure, an ultra-wideband communication node is provided, comprising: an ultra-wideband communication unit configured to transmit one or more ultra-wideband frames to an external device; a processing unit configured to determine scrambled timestamp sequences for said ultra-wideband frames; wherein the processing unit is further configured to determine designated time slots, within which said scrambled timestamp sequences are to be received by said external device.

Abstract: A wireless communication system include user equipment which includes a receive antenna for receiving mmWave signals from a base station transmitter. The system also includes a barrier configured to focus electromagnetic radiation carrying the mmWave signals onto the receive antenna of the user equipment.