Abstract: A receiver system comprising: an input terminal configured to receive input signalling comprising a plurality of antenna-signals, wherein the plurality of antenna-signals each comprise information that corresponds to a first-frequency-bin and a second-frequency-bin. AoA-blocks can determine a first-angle-of-arrival and a second-angle-of-arrival associated with the first- and second-frequency-bins. A first-weighting-determination-block configured to, based on the first-angle-of-arrival and the second-angle-of-arrival, either: set first-weighting-values as values for constructively combining the information that corresponds to the first-frequency-bins of the plurality of antenna-signals; or set first-weighting-values as values for destructively combining the information that corresponds to the first-frequency-bins of the plurality of antenna-signals.

Abstract: An integrated circuit senses attempts to access security-related data stored in registers connectable into a scan chain when the attempt includes locally and selectively asserting a scan-enable signal at a corresponding branch of the scan-enable tree when the integrated circuit is in a secure functional mode. When such an attempt is detected, the integrated circuit (i) generates a security warning that causes a reset of the security-related data and/or (ii) engages a bypass switch to disconnect the scan chain from the respective output terminal to preclude the security-related data from being shifted out of the IC via the scan chain.

Abstract: Systems and methods for providing an output signal based at least in part upon an input signal and a clock signal in a manner in which jitter is avoided or diminished, including for example a digital-to-analog converter (DAC), are disclosed herein. In one example embodiment, such a system includes an output signal generating component, a first component having a first switch and a variable characteristic, and a plurality of second components each having a respective additional switch and a respective fixed characteristic. A value of the variable characteristic is set at least in part based upon input and clock signals so that, when the variable characteristic influences at least indirectly the generating of the output signal by the output signal generating component, the output signal attains a first level that at least indirectly depends upon a phase of the clock signal relative to the input signal.

Abstract: A cell monitoring apparatus includes a processor and memory arranged to execute code representing a linear time-invariant state transition model and a non-linear observation model are provided to model a rechargeable cell using at least a non-linear open circuit voltage, an internal resistance, a time-invariant distortion voltage across a reactive component block, and a distortion current component constituting an error of measurement of current flowing through the reactive component block. An estimator unit performs extended Kalman filtering in respect of the state transition model and the observation model using the input state data in order to generate output state data. The processor is arranged to evaluate a criterion associated with at least part of the output state data and to generate a control signal in response to evaluation of the criterion.

Abstract: Multi-port power prediction for power management of data storage devices is disclosed. For certain embodiments, a host interface within a port multiplier receives host messages from a host device for a plurality of data storage devices. The port multiplier then uses a plurality of ports to forward device messages to the data storage devices based upon the host messages. A power prediction controller determines target data storage devices for access commands within the host messages and generates power commands to adjust power modes for target data storage devices to place the target data storage devices in active power modes prior to access according to the access commands from the host device. Power up latency is thereby reduced or eliminated for the target data storage devices.

Abstract: A method and apparatus are provided for navigating source code (112) by capturing a program trace data history (134) from a target (150) in response to execution of application executable code (123) thereon and decorating the source code blocks (252) on a graphical user interface viewer (251) by displaying an execution instance control indicator (253-255) corresponding to each detected execution instance, where an execution instance control enables control of which execution instance is displayed and an execution instance indicator displays information about the sequence of instructions that were executed at runtime in that execution instance.

Abstract: There is disclosed a controller for a DC-DC converter comprising a series arrangement of a high-side switch and low-side switch with a half-bridge node therebetween, the controller comprising a high-side part for driving the high-side switch and configured to be powered, when the low-side switch is open, by a rechargeable power supply connected between the half-bridge node and a power supply node, the high-side part comprising a level shifter, driver, latch part comprising a latch having set and reset inputs and configured to latch the driver to either an on-state or an off-state, and a further circuit, wherein the latch part is configured and adapted to prevent the further circuit from drawing current from the power supply unless at least one of the set input is high and the driver is in the on-state. A DC-DC converter having such a controller is also disclosed, as are methods of operating a converter.

Abstract: A transponder is disclosed. The transponder includes a resonant circuit serving as an antenna, a load modulation module coupled to the resonant circuit, a current source coupled to the resonant circuit and a command interpreter configured to interpret a received initialization command. The command interpreter is configured to monitor input communication for a stop command signal and a charge & talk bit and if the charge & talk bit is not received within a predetermined time interval after receiving the stop command signal, the load modulation module is activated to provide a signal for transmission by modifying an incoming carrier wave through the load modulation module. If the charge & talk bit is received within the predetermined time after receiving the stop command signal, the current source is activated to provide a signal for transmission by generating pulses of current.

Abstract: A non-volatile flip flop integrated circuit includes a master latch circuit, a slave latch circuit coupled to the master latch circuit, and a non-volatile memory array coupled to the slave latch circuit. The non-volatile memory array includes a first pair of memory cells coupled to the slave latch circuit, and a second pair of memory cells coupled to the slave latch circuit in parallel with the first pair of memory cells. The first and second pair of memory cells are configured to store data from the slave latch circuit, and to restore data to the slave latch circuit.

Abstract: Air cavity packages and methods for producing air cavity packages containing sintered bonded components, multipart window frames, and/or other unique structural features are disclosed. In one embodiment, a method for fabricating an air cavity package includes the step or process of forming a first metal particle-containing precursor layer between a base flange and a window frame positioned over the base flange. A second metal particle-containing precursor layer is further formed between the base flange and a microelectronic device positioned over the base flange. The metal particle-containing precursor layers are sintered substantially concurrently at a maximum processing temperature less than melt point(s) of metal particles within the layers to produce a first sintered bond layer from the first precursor layer joining the window frame to the base flange and to produce a second sintered bond layer from the second precursor layer joining the microelectronic device to the base flange.

Abstract: A device includes a variable gain amplifier, a voltage shifter, a variable gain amplifier half replica module, and an analog to digital converter. The variable gain amplifier includes an input terminal to receive an input signal, an output terminal to provide a first output signal that is biased based on a first common-mode voltage reference. The voltage shifter circuit includes first and second input terminals, and an output terminal to provide, to the analog to digital converter, a third output signal that is biased based on a second common-mode voltage reference. The variable gain amplifier half replica module includes an output terminal coupled to the second input terminal of the voltage shifter circuit, the variable gain amplifier half replica module to control the third output signal of the voltage shifter circuit based on the first common-mode voltage reference and the second common-mode voltage reference.

Abstract: A system that holds a liquid such as water includes an electrode coupling the system to a surface. A capacitance sensor is coupled to the electrode. A processor is coupled to the capacitance sensor. The processor is adapted to receive a signal from the capacitance sensor to determine whether the liquid is present at the surface and to send one or more indication signals if liquid is present at the surface. A response circuit coupled to the processor causes the system to take responsive action in response to receipt of an indication signal. Responsive action includes causing the system to perform a failsafe action, such as automatic shutdown. A communication circuit notifies a user that a fault has occurred in the system over a network.

Abstract: Disclosed is a method to control the synchronous rectification in a power converter including a primary winding and a secondary winding, including detecting a peak current in a secondary winding, determining a blanking threshold based on the peak current, and blanking a turning off of a synchronous rectifier (SR) switch for a blanking time based on the blanking threshold.

Abstract: A lateral test flow arrangement for a test molecule is disclosed, comprising: a test strip for transporting an analyte away from a sampling region and towards an absorbing region, the test strip having therein and remote from the sampling region, a test region for functionalization with a molecule which binds to the test molecule or to a conjugate of the test molecule; a sensing test capacitor having electrodes extending across the test strip at least partially aligned with the test region and being physically isolated therefrom; a reference test capacitor having electrodes extending across the test strip and being physically isolated therefrom; and an electronic circuit configured to measure a time-dependant capacitance difference between the sensing test capacitor and the reference test capacitor. A method for carrying out that lateral flow tests is also disclosed, as are test systems and in particular pregnancy test systems.

Abstract: A one-time programmable (OTP) latch includes a memory cell having a first non-volatile (NV) resistive element and a second NV resistive element, cross-coupled inverter circuitry, a first transistor having a first current electrode coupled to a first node of the cross-coupled inverter circuitry and a second current electrode coupled to a first terminal of the first NV resistive element, and a second transistor having a first current electrode coupled to a second node of the cross-coupled inverter circuitry, different from the first node, and a second current electrode coupled to a first terminal of the second NV resistive element. The OTP latch also includes write circuitry coupled to the memory cell and configured to program only one of the first NV resistive element or the second NV resistive element to an OTP state while the cross-coupled inverter circuitry is isolated from the memory cell by the first and second transistors.

Abstract: An RF amplifier includes a harmonic filter with a plurality of shunt filter legs. The harmonic filter provides a suppressing frequency range for a harmonic frequency of a carrier frequency in a range of carrier frequencies. Each of the shunt filter legs includes capacitor, inductor, and a node coupled between the capacitor and inductor. Each node of the shunt filter leg is coupled to at least one other node of another shunt filter leg of the filter with a resistive element. The harmonic filter includes a first shunt filter leg that has a resonant frequency between the center frequency and (1/1.220) times the center frequency and a second shunt filter leg that has a resonant frequency between the center frequency and 1.220 times the center frequency.

Abstract: A peripheral and central device in a wireless network, such as a Bluetooth Low Energy network, may maintain privacy while connecting. During connecting energy in the peripheral device may be saved by linking an advertised address of the peripheral device to a resolvable private address of the central device, thereby providing an early indication if the central device is, according to the peripheral device, allowed to connect to the peripheral device. Hence a peripheral device performing such linking may have an improved resistance to a denial-of-service attack.

Abstract: Circuitry is configured to store data in response to a phase transition of an input clock. The circuitry uses a master-slave latch configuration. Each of the master and slave latches includes respective feedback circuits, input circuits, and selection circuits. The feedback circuits drive outputs of the respective latches to values that are responsive to data stored in the latches. The input circuits drive the output of the respective latches to values that are responsive to data on an input of the latches. The selection circuits select between the feedback and input circuits based upon the phase of a clock signal.

Abstract: The disclosure relates to a control arrangement for a SMPS, the control arrangement comprising: an input terminal configured to receive a feedback-signal (V1) representative of an output of the SMPS; a normal-mode-processing-arrangement-configured to process the feedback-signal and provide a normal-mode-control-signal for operating the SMPS in a normal mode of operation; a burst-mode-processing-arrangement configured to process the feedback-signal and provide a burst-mode-control-signal for operating the SMPS in a burst mode of operation; and a feedback-control-processing-arrangement configured to operate the SMPS such that the feedback signal in the normal mode of operation has a predetermined relationship with the feedback signal in the burst mode of operation.

Abstract: A circuit and method for determining an ambient temperature for an electronic device having a loudspeaker are described. An amplifier drives the loudspeaker and first circuitry is configure to determine an overall temperature of the loudspeaker or the amplifier. Second circuitry is configured to determine a change in temperature of the loudspeaker or the amplifier resulting from power dissipated in the loudspeaker or the amplifier. Third circuitry is configured to subtract a signal representative of the change in temperature from a signal representative of the overall temperature and output a signal representative of the ambient temperature for the electronic device.