Patents Assigned to NXP
  • Voice coil motor and loudspeaker controller
    Patent number: 9913041
    Abstract: A voice coil motor controller configured to determine a voltage across and a current through a voice coil motor having an input signal supplied thereto and determine its impedance therefrom, the controller further configured to identify asymmetry in variations of said impedance over time to determine an asymmetry value, the controller further configured to provide for control of said voice coil motor using said asymmetry value.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: March 6, 2018
    Assignee: NXP B.V.
    Inventor: Lise Daubigny
  • Configurable power domain and method
    Patent number: 9912335
    Abstract: Aspects of this disclosure are directed to level-shifting approaches with communications between respective circuits. As may be implemented in accordance with one or more embodiments characterized herein, a voltage level of communications passed between respective circuits are selectively shifted. Where the respective circuits operate under respective power domains that are shifted in voltage range relative to one another, the voltage level of the communications is shifted. This approach may, for example, facilitate power-savings for stacked circuits in which a low-level voltage of one circuit is provided as a high-level voltage for another circuit. When the respective circuits operate under a common power domain, the communications are passed directly between the respective circuits (e.g., bypassing any level-shifting, and facilitating fast communication).
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: March 6, 2018
    Assignee: NXP B.V.
    Inventors: Ajay Kapoor, Kristof Blutman, Jose Pineda de Gyvez, Arnoud van der Wel
  • Output impedance matching circuit for RF amplifier devices, and methods of manufacture thereof
    Patent number: 9911703
    Abstract: A packaged RF amplifier device includes a transistor and an output circuit. The transistor includes a control terminal and first and second current carrying terminals. The output circuit is coupled between the first current carrying terminal and an output lead. The output circuit includes first and second inductive elements coupled in series. The first inductive element, which may be a first bondwire array or an integrated inductance, is coupled between the first current carrying terminal and a node. The second inductive element, which includes a second bondwire array, is coupled between the node and the output lead. The device also includes a shunt circuit with a shunt capacitor and a third bondwire array coupled between the first current carrying terminal and the shunt capacitor. The first and second inductive elements and the third bondwire array are configured to have a desired mutual inductance.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: March 6, 2018
    Assignee: NXP USA, INC.
    Inventors: Olivier Lembeye, Damon G. Holmes, Ning Zhu
  • Security controlled multi-processor system
    Patent number: 9910990
    Abstract: Embodiments of the present disclosure provide systems and methods for implementing a secure processing system having a first processor that is certified as a secure processor. The first processor only executes certified and/or secure code. An isolated second processor executes non-secure (e.g., non-certified) code within a sandbox. The boundaries of the sandbox are enforced (e.g., using a hardware boundary and/or encryption techniques) such that code executing within the sandbox cannot access secure elements of the secure processing system located outside the sandbox. The first processor manages the memory space and the applications that are permitted to run on the second processor.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: March 6, 2018
    Assignee: NXP B.V.
    Inventors: Mark L. Buer, Jacob Mendel
  • Systems and methods for calibrating a temperature detection module
    Patent number: 9909934
    Abstract: A determination is made if a temperature of a system has exceeded a hot threshold or a cold threshold. At room temperature, a first adjustment is determined for first nominal settings. The first nominal settings are for a first input to a first comparator. At room temperature, a second adjustment is determined for second nominal settings. The second nominal settings are for a first input to a second comparator. The temperature is monitored, during normal operation of the system, using a temperature dependent voltage with the first comparator adjusted with the first adjustment and second comparator adjusted with the second adjustment.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: March 6, 2018
    Assignee: NXP USA, Inc.
    Inventors: Jose A. Camarena, Khoi B. Mai, Dale J. McQuirk
  • Communications enabled apparatus with a multi-MAC manager and a method of operating thereof
    Patent number: 9913076
    Abstract: The present application relates to a networking device with multi-MAC manager and a method of operating thereof. The multi-MAC manager receiving a request issued in the context of a medium access control, MAC, instance, determines the MAC, instance, to which the request relates and determines whether the PHY part is available for allocation or already allocated to the MAC instance. If the PHY is available, at least the PHY part of the communications interface is allocated to the MAC instance and the received request is passed to the PHY part for further processing thereat. At least the allocated PHY part is released once a service requested by the received request is completed.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: March 6, 2018
    Assignee: NXP USA, Inc.
    Inventors: Razvan-Tudor Stanescu, Paul Marius Bivol, George-Lucian Capraru
  • RFID transponder and method for supplying energy thereto
    Patent number: 9911075
    Abstract: A RFID transponder includes an active load modulation unit and an energy harvesting unit coupled to the active load modulation unit. The active load modulation unit performs active load modulation on transmitted signals. The energy harvesting unit harvests RF energy from the ambient environment, converts the RF energy to DC energy, stores the DC energy, and supplies the DC energy to the active load modulation unit.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: March 6, 2018
    Assignee: NXP B.V.
    Inventors: Peter Thueringer, Franz Amtmann
  • Reduction of silicon area for ethernet PFC protocol implementation in queue based network processors
    Patent number: 9912604
    Abstract: In a pipelined network processor, a first stage in the pipeline is responsive to receipt of a pause indication from a third stage. The pause indication is associated with one of a plurality of ports and priority classes of frames advancing through the pipeline. The first stage asserts a hold indication to a second stage in response to the pause indication. The second stage is responsive to the hold indication by marking frames associated with the one of a plurality of ports and priority classes as they arrive from the pipeline at the second stage by returning them to the first stage interface instead of transmitting them to the third stage. The marked frames are stored in memory external to the network processor.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: March 6, 2018
    Assignee: NXP USA, Inc.
    Inventors: Roman Nos, Noam Efrati, Sagi Gurfinkel
  • Protected mode for global platform complaint smart cards
    Patent number: 9910610
    Abstract: A multiple application smart card uses hardware firewalls and an internal communications scheme to isolate applications from different service providers. A first application from a first service provider is stored within a first supplemental security domain of a memory device on the multiple application smart card. A second application from a second service provider is stored within a second SSD of the memory device. A hardware firewall is located between the first and second applications of the first and second SSDs. The hardware firewall prevents direct data access between the first and second applications of the first and second SSDs.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: March 6, 2018
    Assignee: NXP B.V.
    Inventors: Ralf Malzahn, Francesco Gallo
  • System and method for temperature sensing in an internal combustion engine
    Patent number: 9909932
    Abstract: A system for determining a temperature of a first portion of an engine, and related circuit, and related method of operation, are disclosed. In one example embodiment, the system includes a wheel having a plurality of magnetic teeth, and an electrical circuit including a variable reluctance sensor (VRS) including at least one winding, the VRS being positioned proximate the wheel, where the VRS is in thermal contact with the first portion, and a comparator having first and second input terminals and an output terminal, where the comparator is configured to output an output signal at the output terminal. Either the output signal or a further signal generated by the electrical circuit is at least indirectly indicative of a resistance of the at least one winding, whereby an indication of the temperature of the first portion can be determined based upon the output signal or further signal.
    Type: Grant
    Filed: January 2, 2015
    Date of Patent: March 6, 2018
    Assignee: NXP USA, Inc.
    Inventors: William E. Edwards, Michael R. Garrard
  • FAN-OUT WAFER LEVEL PACKAGES HAVING PREFORMED EMBEDDED GROUND PLANE CONNECTIONS
    Publication number: 20180063948
    Abstract: Fan-Out Wafer Level Packages (FO-WLPs) having Embedded Ground Plane (EGP) connections are provided. In one embodiment, the FO-WLP includes a molded package body having a frontside and an opposing backside. An EGP and a first preformed EGP connection are contained within the molded package body. The first preformed EGP connection is bonded to the EGP and extends therefrom to the backside of the molded package body. The FO-WLP further includes an electrically-conductive structure, such as an Electromagnetic Interference (EMI) shield, provided on the backside of the molded package body. The electrically-conductive structure is electrically coupled to the EGP through the first preformed EGP connection.
    Type: Application
    Filed: October 27, 2017
    Publication date: March 1, 2018
    Applicant: NXP USA, INC.
    Inventor: MICHAEL B. VINCENT
  • Transistors with field plates resistant to field plate material migration and methods of their fabrication
    Patent number: 9905658
    Abstract: An embodiment of a transistor includes a semiconductor substrate, spaced-apart source and drain electrodes coupled to the semiconductor substrate, a gate electrode coupled to the semiconductor substrate between the source and drain electrodes, a dielectric layer over the gate electrode and at least a portion of the semiconductor substrate, and a field plate structure over the dielectric layer, wherein the field plate structure includes a gold-containing material and one or more migration inhibiting materials.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: February 27, 2018
    Assignee: NXP USA, INC.
    Inventors: Darrell G. Hill, Stephen H. Kilgore, Craig A. Gaw
  • Semiconductor device and method of making
    Patent number: 9905687
    Abstract: Laterally diffused metal-oxide-semiconductor (LDMOS) device is disclosed. The device is surrounded by an isolation ring and a buried layer of a first doping type, that is of the same type as its source and drain regions of the same doping type. A control gate of the device includes step gate dielectric.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: February 27, 2018
    Assignee: NXP USA, Inc.
    Inventors: Ronghua Zhu, Xin Lin, Jiang-Kai Zuo
  • On-die signal measurement circuit and method
    Patent number: 9906355
    Abstract: There is provided a method, apparatus and integrated circuit for measuring a signal, the apparatus comprising a plurality of sample stages arranged in series, each sample stage comprising a delay element, and a sample element, wherein an input of the sample element is coupled to an output of the delay element, and a strobe line for controlling a sample time of the sample elements, the strobe line comprising a plurality of strobe delay elements arranged in series, wherein an output of each strobe delay element is coupled to one or more sample elements.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: February 27, 2018
    Assignee: NXP USA, Inc.
    Inventors: Michael Priel, Leonid Fleshel, Roman Mostinski, Vladimir Nusimovich
  • Method and apparatus for compensating for a loss of low-frequency signal content of an input signal at a receiver input
    Patent number: 9906249
    Abstract: A compensation circuit is configured to compensate for a loss of low-frequency signal content of an input signal at a receiver input. The compensation circuit includes a switching circuit and a summing circuit coupled to the switching circuit. The switching circuit is configured to receive a first plurality of digitized values sampled from a receiver output signal. The summing circuit is configured to generate a summation signal based on a combination of a first plurality of input values selected by the switching circuit. The selecting is based on the first plurality of digitized values. The compensation circuit is configured to provide to the receiver input a compensation signal to compensate for the loss of the low-frequency signal content from the input signal. The compensation signal is based on the summation signal and is a function of at least one gain value.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: February 27, 2018
    Assignee: NXP USA, Inc.
    Inventors: Mirembe A. Musisi-Nkambwe, Martin J. Bayer, Jeffrey A. Porter
  • Power converter with load switch fault protection
    Patent number: 9906145
    Abstract: An apparatus for delivering power to a load, which comprises a power converter that converts input power at a primary side to an output power and to a supply voltage to a secondary side. On the secondary side, a load switch is located on a current path to the load. A secondary-side control circuitry controls the load switch to operate in an ON mode in which current is provided to the load, and in response to a fault condition corresponding a voltage drop across the load switch exceeding a threshold value, activates circuitry on the secondary side. The circuitry, in response to the fault condition, causes the primary-side control circuitry to limit an extent to which the power converter is capable of supplying power.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: February 27, 2018
    Assignee: NXP B.V.
    Inventors: Wilhelmus Hinderikus Maria Langeslag, Jeroen Kleinpenning
  • General encoding functions for modular exponentiation encryption schemes
    Patent number: 9906368
    Abstract: Various embodiments relate to a method of encoding data and related device and non-transitory machine readable storage medium, the method including: determining a set of digits, X, representative of a value to be encoded; determining a set of factor values, S, to be used in generating an encoded value, wherein the set of factor values, S, is a set of input value factors for a modular exponentiated digital signature process; for a given digit, x, of the set of digits, X, determining at least one factor value, s, of the set of factor values, S, corresponding to the given digit, x; and including the at least one factor value, s, in an encoded value.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: February 27, 2018
    Assignee: NXP B.V.
    Inventors: Joppe Bos, Michaël Peeters
  • Device for multiple pan access
    Patent number: 9907106
    Abstract: A networking device for connection to a plurality of personal area networks is described which operates according to a layer model having a PHY layer, at least a first MAC layer and a second MAC layer, and a third layer situated functionally between the PHY layer and the at least first and second MAC layers. The first and second MAC layers are arranged to support first and second protocol stacks, respectively, to access first and second respective PANs using frequency hopping spread spectrum techniques and first and second sets of parameters respectively. The first and second MAC layers are arranged to provide the first and second sets of parameters, respectively, to the third layer, which is arranged to allocate access to the PHY layer to both the first and second MAC layers in accordance with their respective sets of parameters.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: February 27, 2018
    Assignee: NXP USA, Inc.
    Inventors: Razvan-Tudor Stanescu, Sorin Alexandru Bora, George-Lucian Capraru
  • RSA decryption using multiplicative secret sharing
    Patent number: 9906505
    Abstract: An embodiment features an RSA process in which the private key is separated into shares. Decryption (and authentication and other RSA objectives) may be accomplished by successive modular exponentiation of, for example, a ciphertext or a signature.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: February 27, 2018
    Assignee: NXP B.V.
    Inventors: Michael Michel Patrick Peeters, Ventzislav Nikov
  • Modular exponentiation using look-up tables
    Patent number: 9904516
    Abstract: Various embodiments relate to a method of encoding data and a related device and non-transitory machine readable storage medium, including: determining a plurality of factors of a value, b, to be exponentiated; retrieving, from a lookup table, a plurality of lookup table entries associated with the plurality of factors; calculating a product of the plurality of lookup table entries; and calculating a residue of the product using a cryptographic key modulus, N, to produce an exponentiated value, s.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: February 27, 2018
    Assignee: NXP B.V.
    Inventors: Joppe Bos, Michaël Peeters