Abstract: An integrated circuit design tool apparatus includes a processing resource configured to support a circuit simulator, a circuit sensitivity optimizer and a circuit sensitivity calculator. The circuit sensitivity optimizer is adapted to communicate to the circuit simulator a first dynamic list of selected devices of the circuit; and a second dynamic list of selected process parameters associated with the selected devices of the first dynamic list. The circuit simulator is configured to communicate to the circuit sensitivity calculator, a performance metrics of the circuit in response thereto. The circuit sensitivity calculator is configured to determine one sensitivity coefficient for each device of the first dynamic list in response thereto. The circuit sensitivity calculator is further configured to determine and communicate to the circuit sensitivity optimizer a variance of the performance metrics and also adapted to gradually determine whether or not to further communicate with the circuit simulator.

Abstract: An integrated circuit package comprises a dielectric material, a first stack comprising at least a first electrically isolating layer and a second electrically isolating layer arranged at a first side of the integrated circuit package, an electrically conductive material arranged on a second side opposed to the first side, and an integrated antenna structure for transmitting and/or receiving a radio frequency signal arranged between the first and second electrically isolating layers. The electrically conductive material is separated from the integrated antenna structure by at least the dielectric material and the first electrically isolating layer, arranged to partly overlap the integrated antenna structure and to reflect the radio frequency signal received by the electrically conductive material through at least the first electrically isolating layer and the dielectric material to the first side.

Abstract: A power supply having a primary side and a secondary side is disclosed. The power supply includes a main transformer having a first side and a second side. The first side is coupled to the primary side and the second side coupled to the secondary side. The power supply further includes a primary switch coupled to the first side and a synchronous rectification switch coupled to the second side. A controller is included for driving the primary switch and the synchronous rectification switch in several operation modes including the operation in continuous conduction mode. The controller is configured to determine and set a time between turning-off of the synchronous rectification switch and turning-on of the primary switch based on sampling of the peak voltage at the drain of the synchronous rectification switch and selecting the time that corresponds with the lowest peak voltage on the drain of the synchronous rectification switch.

Abstract: In a processing system, a method includes transmitting a timer expiration notification from a timer management component of a processor to one or more other components of the processor in response to expiration of a timer. The method further includes transmitting, from a component of the processor that requested instantiation of the timer, a timer release confirmation message to the timer management component in response to the timer expiration notification, the timer release confirmation message confirming that the component has released the timer. The method also includes preventing reallocation of a timer identifier (ID) associated with the timer to another timer after the expiration of the timer and until receipt of the timer release confirmation message at the timer management component.

Abstract: Embodiments of methods and systems for automatic power control (APC) in a communications device that communicates via inductive coupling are described. In an embodiment, a method for APC in a communications device that communicates via inductive coupling involves storing a universal APC table for the communications device, adjusting the universal APC table in response to at least one system parameter, and controlling a transmission configuration of the communications device based on the adjusted APC table. Other embodiments are also described.

Abstract: An electronic device comprising a first power switch connectable or connected between a first voltage source and a load is proposed. The first power switch assumes a conductive state in response to a power-on request and a non-conductive state in response to a power-off request, for energizing and deenergizing the load, so that a voltage across the first power switch tends to a positive high level when the first power switch is in the non-conductive state and to a positive low level when the first power switch is in the conductive state. The device further comprises a second power switch connectable or connected between a second voltage source and the load. The second power switch assumes a conductive state in response to the power-on request and a non-conductive state when the voltage across the first power switch is below a defined switch-off threshold lower than the high level. The second voltage source thus assists the first voltage source in powering up the load.

Abstract: A device to cancel noise in broadcast signal is disclosed. The device a first port to connect to a main antenna, a second port to connect to a noise antenna, a processor coupled to the first port and the second port to measure the broadcast signal received at the first port and a noise signal received at the second port to derive a first set of coefficients, a first adaptive filter coupled to the first port and the processor and a second adaptive filter coupled to the second port and the processor. The first adaptive filter and the second adaptive filters are configurable based on the first set of coefficients to remove the high energy parts of a frequency spectrum of signals received at the first port and the second ports respectively.

Abstract: A Doherty amplifier includes an output combining network that has a first combining network input coupled to a main amplifier path, a lowest-order combining network input coupled to a lowest-order peaking amplifier path, and N?2 additional combining network inputs coupled to other peaking amplifier paths. A final summing node is coupled to the combining network output, and is directly coupled to the first combining network input. N?2 intermediate summing nodes are coupled to the N?2 additional combining network inputs. An offset line is coupled between the lowest-order combining network input and a lowest-order summing node. A longest phase delay imparted by the output combining network on a peaking RF signal between the lowest-order combining network input and the final summing node is greater than all other phase delays imparted on any other RF signal provided to the first combining network input and the N?2 additional combining network inputs.

Abstract: A loudspeaker drive circuit uses a dynamic range compressor to implement a non-linear gain function between the input signal to the dynamic range compressor and an output signal from the dynamic range compressor. The output is used to drive a loudspeaker, and the operating parameters of the dynamic range compressor are varied in dependence on a criterion, such as the estimated voice coil temperature, the power consumption or the acoustical distortion.

Abstract: There is disclosed a user interface unit for an electronic device, said user interface unit comprising a two-dimensional capacitive sensor structure, wherein the capacitive sensor structure comprises an array of corner sensor elements each comprising a capacitor over its area, and wherein the capacitive sensor structure further comprises a central sensor element located between the corner sensor elements and comprising a capacitor over its area. Furthermore, there is disclosed a corresponding electronic device, as well as a corresponding method of manufacturing a user interface unit for an electronic device.

Abstract: Aspects of the disclosure are directed to communications between respective power domains (circuitry) that may operate in a stacked arrangement in which the each domain operates over a different voltage range. A first circuit provides differential outputs that vary between first and second voltage levels, based on transitions of an input signal received from a first one of the power domains. First and second driver circuits are respectively coupled to the first and second differential outputs. A third driver circuit operates with the first and second circuits to level-shift the input signal from the first power domain to an output signal on a second power domain by driving an output circuit at the second voltage level in response to the input signal being at the first voltage level, and driving the output circuit at a third voltage level in response to the input signal being at the second voltage level.

Abstract: Deep trench isolation structures and systems and methods including the same are disclosed herein. The systems include a semiconductor device. The semiconductor device includes a semiconductor body, a device region, and the deep trench isolation structure. The deep trench isolation structure is configured to electrically isolate the device region from other device regions that extend within the semiconductor body. The deep trench isolation structure includes an isolation trench, a dielectric material that extends within the isolation trench, a first semiconducting region, and a second semiconducting region. The methods include methods of operating an integrated circuit device that includes a plurality of semiconductor devices that include the disclosed deep trench isolation structures.

Abstract: A circuit for tuning an impedance matching network is disclosed. The circuit includes a current sensor, a control circuit coupled to the current sensor and a reference current source and a tunable capacitor coupled to the control circuit. The control circuit is configured to generate a control signal based on an output of the current sensor, wherein the control signal is configured to vary a capacitance of the tunable capacitor.

Abstract: A method of automatically generating a set of test layouts for testing a design rule checking tool is described. A layout is a point in a space of several coordinates, and the design rule comprises N design constraints numbered 1 to N, wherein N is greater or equal two and each design constraint is a boolean-valued function of one or more of the coordinates. The set of test layouts includes: one or more zero-error layouts; one or more one-error layouts; and one or more two-error layouts. A zero-error layout is a layout that satisfies all of the design constraints. A one-error layout is a layout that violates exactly one of the design constraints. A two-error layout is a layout that violates exactly two of the design constraints.

Abstract: A voltage controlled oscillator (VCO) comprising a first supply node, a second supply node, an oscillation transistor, a biasing network, an output node and a feedback network is described. The VCO is be powered by a supply voltage applied across the first and second supply nodes. The oscillation transistor and the biasing network are connected in series between the first supply node and the second supply node. The output node is connected to the oscillation transistor so as to deliver an oscillatory output signal. The feedback network provides an oscillatory feedback signal from the output node to the biasing network. The feedback network comprises a capacitive element and a transmission line connected in series for transferring the feedback signal. The VCO may be integrated in a radar device, for example.

Abstract: According to a first aspect of the present disclosure, a signal processing system is provided, comprising: a receiving unit configured to receive at least one signal that comprises a plurality of multipath components; a verification unit configured to correlate at least one multipath component under test with a reference signal derived from one or more of said plurality of multipath components. According to a second aspect of the present disclosure, a corresponding signal processing method is conceived. According to a third aspect of the present disclosure, a corresponding computer program is provided.

Abstract: A temporal-miss handler includes updating a data leaf in a tree-structured database of a communications processor with a plurality of threads. A search for the data leaf includes generating at least one search result for one of the plurality of threads. A sufficiency of a temporal separation, between updating the data leaf and searching for the data leaf, to retrieve the data leaf is determined. Each search result is cleared when the temporal separation is insufficient. A new search is performed when the temporal separation is insufficient.

Abstract: An encryption module and method for performing an encryption/decryption process executes two cryptographic operations in parallel in multiple stages. The two cryptographic operations are executed such that different rounds of the two cryptographic operations are performed in parallel by the same instruction or the same finite state machine (FSM) state for hardware implementation.

Abstract: One example discloses a multi-sensor assembly, comprising: a first temperature sensor, having a first thermal profile; a second temperature sensor, having a second thermal profile different from the first thermal profile; wherein the first and second temperature sensors are mounted on a set of lead-frames; wherein the first and second temperature sensors include a first heat path input coupled to an ambient environment, and a second heat path input coupled to at least one of the lead-frames; and wherein the first and second sensors and set of lead-frames are included in a single multi-sensor assembly. Another example discloses a method of manufacture for the multi-sensor assembly.

Abstract: There is disclosed a method of transferring data using a tag, said tag comprising an RF interface unit, a host interface unit and a memory, the method comprising: the RF interface unit connects the tag to an RF device; the host interface unit connects the tag to a host device; the tag enters into a pass-through mode; in said pass-through mode, the tag transfers data, either in a first configured transfer direction, from the RF device to the host device, or, in a second configured transfer direction, from the host device to the RF device; in said pass-through mode, the tag buffers said data in the memory. Furthermore, a corresponding computer program product and a corresponding tag are disclosed.