Abstract: Fan-Out Wafer Level Packages (FO-WLPs) and methods for fabricating FO-WLPs containing Embedded Ground Planes (EGPs) and backside EGP interconnect structures are provided. In one embodiment, the method includes electrically coupling an EGP to a backside terminal of a first microelectronic device through a backside EGP interconnect structure. A molded package body is formed around the first microelectronic device, the EGP, and the EGP interconnect structure. The molded package body has a frontside at which the EGP is exposed. One or more Redistribution Layers are formed over the frontside of the molded packaged body and contain at least one interconnect line electrically coupled to the backside contact through the EGP and the backside EGP interconnect structure.

Abstract: Embodiments include methods of forming a semiconductor device having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within area of the substrate contained by the isolation structure, and a diode circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a source region of the first conductivity type, and the diode circuit is connected between the isolation structure and the source region. The diode circuit may include one or more Schottky diodes and/or PN junction diodes. In further embodiments, the diode circuit may include one or more resistive networks in series and/or parallel with the Schottky and/or PN diode(s).

Abstract: Embodiments of systems and methods for performing channel estimation on Orthogonal frequency-division multiplexing (OFDM) signals are described. In one embodiment, a method for performing channel estimation on an OFDM signal involves performing blind channel phase estimation on an OFDM signal to obtain channel phase information and performing blind channel magnitude estimation on the OFDM signal to obtain channel magnitude information. Each of performing blind channel phase estimation on the OFDM signal and performing blind channel magnitude estimation on the OFDM signal involves detecting and suppressing a signal path of the OFDM signal. Other embodiments are also described.

Abstract: A heating system is described for generating heat and bringing heat to a semiconductor device under test. The heating system comprises a conduction heating unit comprising a heating resistor, a thermal contact area for thermally contacting the semiconductor device under test, and a thermally conductive and electrically insulating connection between the heating resistor and the thermal contact area. The heating resistor is operable to generate a user-defined amount of heat and arranged to provide a part of the heat generated by the heating resistor to the thermal contact area via the thermally conductive and electrically insulating connection. It is also described that the heating system may further comprise a convection heating chamber operable to provide a user-defined heat-controlled convection to the semiconductor device under test. A method of testing a semiconductor device using a heating system is also described.

Abstract: Disclosed is an integrated circuit comprising a substrate (10) carrying plurality of circuit elements (20); a plurality of sensing electrodes (34) over said substrate, each sensing electrode being electrically connected to at least one of said circuit elements; and a plurality of wells (50) for receiving a sample, each sensing electrode defining the bottom of one of said wells, wherein each sensing electrode comprises at least one portion (34?) extending upwardly into said well. A method of manufacturing such an IC is also disclosed.

Abstract: A device is described. The device includes a chip, a reflector, and an antenna. The reflector is disposed on a surface of the chip. The reflector is a metalized layer on the surface of the chip.

Abstract: In an embodiment, a method for performing forward error correction (FEC) on protected data packets is disclosed. The method involves creating a FEC table having columns for application data and columns for error-correction data (EC data). Then, a number of protected application data packets are received and placed in the FEC table. If an application data packet is received, then the application data from the packet is placed in the application data column. If an application data packet is not received, generated zeroes are placed in the application data column. Once the application data columns of the FEC table are full, EC data corresponding to the application data is received and placed in the EC data columns of the FEC table. The rows of the FEC table are then fed to the decoder for error correction.

Abstract: A system for programming integrated circuit (IC) dies formed on a wafer includes an optical transmitter that outputs a digital test program as an optical signal. At least one optical sensor (e.g., photodiode) is formed with the IC dies on the wafer. The optical sensor detects and receives the optical signal. A processor formed on the wafer converts the optical signal to the digital test program and the digital test program is stored in memory on the wafer in association with one of the IC dies. The optical transmitter does not physically contact the dies, but can flood an entire surface of the wafer with the optical signal so that all of the IC dies are concurrently programmed with the digital test program.

Abstract: A signal processing circuit comprising: a first signal processor configured to produce a first output signal suitable for driving a first headphone speaker; a second signal processor configured to produce a second output signal suitable for driving a second headphone speaker; a third signal processor configured to receive the first input signal and/or the second input signal and to produce a third output signal suitable for driving a first loudspeaker; and simultaneously provide the first output signal to the first headphone speaker, the second output signal to the second headphone speaker, and the third output signal to the first loudspeaker.

Abstract: Various embodiments relate to a method, machine-readable medium, and a system for preventing demagnetization of a magnetically sensitive object comprising detecting, by a first identification sensor at a wireless charging transceiver, a foreign object; determining, by a processor using information from the first identification sensor, whether the foreign object is magnetically sensitive; and responsive to a determination that the foreign object is magnetically sensitive, preventing the wireless charging transceiver from operating.

Abstract: An electronic device for generating an error signal in response to an electrostatic discharge perturbation is described. The device may comprise: a detection unit for generating a detection signal in response to said electrostatic discharge perturbation, said detection signal correlating in time with said electrostatic discharge perturbation; a clock for generating a clock signal having a clock period; and a protection unit for generating an error signal in response to said detection signal only when a duration of said detection signal exceeds a predefined multiple of said clock period. A method of generating an error signal in response to an electrostatic discharge perturbation, for protecting electronic circuitry, is also disclosed.

Abstract: A display controller device for processing image data has a data processor for generating a display signal. The device has a writeback unit having an input coupled to the display signal and an output coupled to a debug interface. The writeback unit has a slice controller for defining a set of slices of the image and consecutively selecting slices of the set, and a slice selector for sampling pixel data from a selected slice. A slice buffer is coupled between the slice selector and the debug output for temporarily storing the selected pixel data. The slice controller transfers the selected pixel data to the debugger and subsequently selects a next slice until all slices of the set have been transferred. The debug system receives the slices and regenerates and displays the image.

Abstract: A method of detecting irregular high current flow within an integrated circuit (IC) device is described. The method comprises obtaining infrared (IR) emission information for the IC device, identifying at least one functional component within the IC device comprising a high current flow, based at least partly on the obtained IR emission information, obtaining IR emission information for at least one reference component within the IC device, and determining whether the high current flow of the at least one functional component comprises an irregular high current flow based at least partly on a comparison of respective IR emission information for the at least one functional component and the at least one reference component.

Abstract: An RF circuit and method for detecting the amount of phase shift applied to an RF signal. An RF heating apparatus including the RF circuit. The RF circuit includes a phase shifter operable to apply a phase shift to a reference signal to produce a phase shifted reference signal. The RF circuit also includes a phase detector operable to detect a phase difference between the phase shifted RF signal and the phase shifted reference signal. The phase detector has a reduced input range at a frequency of the phase shifted RF signal. The RF circuit further includes a controller operable to control the phase shifter to set the phase of the phase shifted reference signal so that the phase difference between the phase shifted RF signal and the phase shifted reference signal falls within the reduced input range of the phase detector.

Abstract: Systems and methods relating to voltage monitoring across isolation barriers are disclosed herein. In one example embodiment, an isolation system includes a low voltage circuit portion including a first control logic portion, and a high voltage circuit portion including a second control logic portion and an analog-to-digital converter portion. The system further includes a first transistor device having a first terminal coupled at least indirectly to a first connection having a first voltage level and a second terminal coupled at least indirectly to a second connection having a second voltage level. The first control logic portion governs provision of an output signal generated based at least indirectly upon the second voltage level. Due to a galvanic barrier, the output signal can be provided for receipt by another device in a manner that avoids exposure of that device to an undesirably high current or power level.

Abstract: Embodiments of a current mirror for a constant-current light-emitting diode (LED) driver system and a constant-current LED driver integrated circuit (IC) device having the current mirror are described. In one embodiment, a current mirror includes at least one current mirror cell. Each of the at least one current mirror cell includes semiconductor circuits configured to generate an output current based on a reference current and a control module configured to alternately and continuously charge the semiconductor circuits in response to non-overlapping clock signals.

Abstract: In an embodiment, an integrated circuit (IC) device for detecting fault attacks is disclosed. In the embodiment, the IC device includes a main CPU core, memory coupled to the main CPU core, and a co-processor core including a checksum generation module, the co-processor core coupled to the main CPU core, wherein the main CPU core is configured to direct the co-processor core to process data from the memory and the co-processor core is configured to process the data, in part, by feeding internal signals to the checksum generation module and wherein the co-processor core is further configured to return a checksum value generated by the checksum generation module to the main CPU core.

Abstract: Embodiments of an amplifier for a constant-current light-emitting diode (LED) driver circuit and a constant-current LED driver integrated circuit (IC) device having the amplifier are described. In one embodiment, an amplifier includes a folded cascode input stage including chopping switch circuits configured to perform frequency chopping to reduce an input offset of the amplifier and a rail-to-rail output stage connected to the folded cascode input stage. The rail-to-rail output stage includes slew rate enhancement circuits.

Abstract: A device includes a semiconductor substrate, a first constituent transistor including a first plurality of transistor structures in the semiconductor substrate connected in parallel with one another, and a second constituent transistor including a second plurality of transistor structures in the semiconductor substrate connected in parallel with one another. The first and second constituent transistors are disposed laterally adjacent to one another and connected in parallel with one another. Each transistor structure of the first plurality of transistor structures has a lower resistance in a saturation region of operation than each transistor structure of the second plurality of transistor structures.

Abstract: A low leakage current switch device (110) is provided which includes a GaN-on-Si substrate (11, 13) with one or more device mesas (41) in which isolation regions (92, 93) are formed using an implant mask (81) to implant ions (91) into an upper portion of the mesa sidewalls and the peripheral region around each elevated surface of the mesa structures exposed by the implant mask, thereby preventing the subsequently formed gate electrode (111) from contacting the peripheral edge and sidewalls of the mesa structures.