Abstract: A device includes vertically and laterally spaced sensors that sense different physical stimuli. Fabrication of the device entails forming a device structure having a first and second wafer layers with a signal routing layer interposed between them. Active transducer elements of one or more sensors are formed in the first wafer layer and a third wafer layer is attached with the second wafer layer to produce one or more cavities in which the active transducer elements are located. A trench extends through the second wafer and through a portion of the signal routing layer. The trench electrically isolates a region of the second wafer layer surrounded by the trench from a remainder of the second wafer layer. Another active transducer element of another sensor is formed in this region. The transducer element formed in the second wafer layer may be a diaphragm for a pressure sensor of the sensor device.

Abstract: Semiconductor device structures and related fabrication methods are provided. An exemplary semiconductor device structure includes a body region of semiconductor material having a first conductivity type, a source region of semiconductor material having a second conductivity type within the body region, a junction isolation region of semiconductor material having the second conductivity type, a drain region of semiconductor material having the second conductivity type, and first and second drift regions of semiconductor material having the second conductivity type. The first drift region resides laterally between the drain region and the junction isolation region, the junction isolation region resides laterally between the first drift region and the second drift region, and the second drift region resides laterally between the body region and the junction isolation region.

Abstract: A current sense circuit for a PWM driver comprises: a PWM control circuit comprising: a first switching device arranged to receive a PWM signal from the PWM driver whose current is to be sensed; and a second switching device whose supply current is arranged to track the sensed current of the PWM driver. An ADC is operably coupled to the first and second switching device. The ADC comprises: a DAC arranged to provide a current sense to the second switching device that tracks the current passing through the PWM driver; a first comparator arranged to receive and compare an output current from the DAC and an output current from the first switching device; and a first successive approximation register arranged to receive an output from the comparator and provide: a first output to the ADC; and a second output that provides a representation of the sensed current.

Abstract: The present invention relates to a method for fabricating an electronic component, comprising fabricating, on a substrate (102) at least one integrated MIM capacitor (114) having a top capacitor electrode (118) and a bottom capacitor electrode (112) at a smaller distance from the substrate than the top capacitor electrode; fabricating an electrically insulating first cover layer (120) on the top capacitor electrode, which first cover layer partly or fully covers the top capacitor electrode and is made of a lead-containing dielectric material; thinning the first cover layer; fabricating an electrically insulating second cover layer (124) on the first cover layer, which second cover layer partly or fully covers the first cover layer and has a dielectric permittivity smaller than that of the first cover layer; and fabricating an electrically conductive resistor layer (126) on the second cover layer, which resistor layer has a defined ohmic resistance.

Abstract: Radio frequency/electromagnetic interference (RF/EMI) shielding within redistribution layers of a fan-out wafer level package is provided. By using RDL metal layers to provide the shielding, additional process steps are avoided (e.g., incorporating a shielding lid or applying conformal paint on the package back side). Embodiments use metal filled trench vias in the RDL dielectric layers to provide metal “walls” around the RF sensitive signal lines through the dielectric layer regions of the RDL. These walls are coupled to ground, which isolates the signal lines from interference or noise generated outside the walls.

Abstract: An equalizer for equalizing a composite signal originating from a given number of simultaneous data streams able to be received over a communication channel, on a given number of antennas, at one or more radio units, in a wireless communication system. The equalizer performs matrix operations when the number of receiving antennas associated with the composite signal is lower than the number of antennas supported by the equalizer. The channel matrix and the signal and interference covariance matrices are manipulated. The antenna dimension is increased, padding is then added and the transmitted signal vector is finally determined based on the altered matrices. A baseband processing unit, a method and a computer program are also claimed.

Abstract: A multi-core processing system includes a first processing core, a second processing core, a task manager coupled to the first and second processing cores. The task manager is operable to receive context information of a task from the first processing core and provide the context information to the second processing core. The second processing core continues executing the task using the context information.

Abstract: A voltage regulator circuit arranged to receive a voltage supply signal, and to output a regulated voltage signal is described. The voltage regulator circuit comprises at least one switched mode power supply component selectively configurable to perform regulation of the voltage supply signal, at least one linear voltage regulator component selectively configurable to perform regulation of the voltage supply signal, and at least one controller component.

Abstract: The embodiments described herein provide an antifuse that includes a substrate material and an isolation trench formed in the substrate material, where the isolation trench has a first side and a second side opposite the first side. An electrode is positioned above the substrate material and proximate to the first side of the isolation trench. An insulating layer is disposed between the electrode and the substrate material. So configured, a voltage or current applied between the electrode and the substrate material causes a rupture in the insulating layer and creates a current path through the insulating layer and under the isolation trench to the substrate material proximate the second side of the isolation trench.

Abstract: An electronic device includes a semiconductor die having a lower surface, a sintered metallic layer underlying the lower surface of the semiconductor die, a thermally conductive flow layer underlying the sintered metallic layer, and a thermally conductive substrate underlying the thermally conductive flow layer.

Abstract: A start-up method for a self-powered gate drive circuit driving a power transistor gate. The method comprises charging, with a single-supply voltage, a first supply capacitor of a first gate drive circuit; switching on a first power transistor by applying a current supplied by a discharge of the first supply capacitor of the first gate drive circuit to the gate of the first power transistor; charging a second supply capacitor of the first gate drive circuit using an output signal from the first power transistor; and re-charging the first supply capacitor by applying a current supplied by a discharge of the second supply capacitor to the first capacitor.

Abstract: Voltage regulator with extended minimum to maximum current ratio. In some embodiments, a low-dropout (LDO) voltage regulator disposed within a semiconductor package may include an inner loop; and an outer loop coupled to the inner loop, wherein: the inner loop is configured to control a load response of the LDO voltage regulator and to reduce at least one of: a printed circuit board (PCB) effect on the outer loop, a packaging effect on the outer loop, or a parasitic effect on the outer loop; the outer loop is configured to control a voltage at an output of the LDO voltage regulator; the output of the LDO voltage regulator is coupled to an integrated circuit within the semiconductor package; and the PCB, package, and parasitic effects comprise inductive or resistive effects caused by elements disposed outside of the semiconductor package.

Abstract: A radio frequency (RF) signal can be produced with an RF frequency that is responsive to a frequency reference (FREF) clock. An inductive-capacitive (LC) tank oscillator circuit can generate the RF signal. A digital to time converter (DTC) circuit can operate, for a first edge of the FREF clock, in a baseline mode that has a first delay, and for a subsequent edge of the FREF clock, in a delay mode that introduces a second delay value to the FREF clock. A controller circuit can enable the LC-tank oscillator circuit in response to a first edge of the FREF clock and to set or increase the second delay value of the delay mode as a function of the frequency of the RF signal. A phase detector circuit can detect, for the subsequent edge of the FREF clock, a phase difference between the FREF clock and the RF signal.

Abstract: Embodiments of a driver circuit for a power stage of a class-D amplifier and a class-D amplifier are described. In one embodiment, a driver circuit for a power stage of a class-D amplifier includes serially connected transistor devices connected to a gate terminal of a power transistor of the power stage of the class-D amplifier, a voltage generator connected between a gate terminal of a first transistor device of the serially connected transistor devices and a source terminal of the power transistor, and a current multiplier connected between the gate terminal of the power transistor and one of a source terminal and a drain terminal of the first transistor device. The current multiplier is configured to produce an output current that is proportional to a current at the one of the source terminal and the drain terminal of the first transistor device.

Abstract: A method for authorizing a service is disclosed. In the embodiment, the method involves receiving a packet carried via a first power signal according to an inductive wireless power transfer communications protocol, the packet received at a power receiver within a mobile device, extracting a password from the received packet, storing the extracted password in memory within the mobile device, transmitting the stored password in a packet via a second power signal according to the inductive wireless transfer communications protocol to authorize a service.

Abstract: In a method for transmitting an NFC application, a secure channel is established by way of a proxy between a Trusted Service Manager and an NFC device via a computing device including the proxy and via an RFID reader being a part of the computing device. The NFC application received at the computing device from the Trusted Service Manager is channeled through the secure channel to the NFC device utilizing the proxy.

Abstract: An electrostatic discharge (ESD) protection device includes a semiconductor substrate, a base region in the semiconductor substrate and having a first conductivity type, an emitter region in the base region and having a second conductivity type, a collector region in the semiconductor substrate, spaced from the base region, and having the second conductivity type, a breakdown trigger region having the second conductivity type, disposed laterally between the base region and the collector region to define a junction across which breakdown occurs to trigger the ESD protection device to shunt ESD discharge current, and a gate structure supported by the semiconductor substrate over the breakdown trigger region and electrically tied to the base region and the emitter region. The lateral width of the breakdown trigger region is configured to establish a voltage level at which the breakdown occurs.

Abstract: A method of performing a keyed cryptographic operation mapping an input message to an output message, wherein the cryptographic operation includes at least one round including a non-linear mapping function configured to map input data to output data, including: splitting the input data into n split input data, wherein the splitting of the input data varies based upon the value of the input message; inputting each split input data into the non-linear mapping function to obtain n split output data, wherein a combination the n split output data indicates an output data, wherein the output data results when the input data is input to the non-linear mapping function.

Abstract: A method of processing data comprising performing a sequence of operation instructions with variable operand size, wherein respective size codes for different source and destination operands are obtained and registered separately from performing the sequence of operation instructions, and the sequence of operation instructions is performed using operand sizes defined by the registered size codes, the operation instructions of the sequence not themselves containing size codes.

Abstract: Various embodiments include a method for binding a secure software application to a mobile device wherein the mobile device includes a processor and a subscriber identity module (SIM) card, including transmitting, by the processor, an authentication challenge to the SIM card; receiving an authentication response from the SIM card; verifying the authentication response from the SIM card; and enabling the secure software application when the authentication response from the SIM card is verified.